Add xe_hpg ocl unit tests

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>

opencl/test/unit_test/helpers/CMakeLists.txt

@@ -21,6 +21,7 @@ set(IGDRCL_SRCS_tests_helpers
     ${CMAKE_CURRENT_SOURCE_DIR}/heap_assigner_ocl_tests.cpp
     ${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_default_tests.cpp
     ${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_tests.cpp
+    ${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_tests_dg2_or_below.cpp
     ${CMAKE_CURRENT_SOURCE_DIR}/kmd_notify_tests.cpp
     ${CMAKE_CURRENT_SOURCE_DIR}/memory_management_tests.cpp
     ${CMAKE_CURRENT_SOURCE_DIR}/memory_properties_helpers_tests.cpp
@@ -56,6 +57,13 @@ if(TESTS_XEHP_AND_LATER)
   )
 endif()
 
+if(TESTS_DG2_AND_LATER)
+  list(APPEND IGDRCL_SRCS_tests_helpers
+       ${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_tests_dg2_and_later.cpp
+       ${CMAKE_CURRENT_SOURCE_DIR}/test_preamble_dg2_and_later.cpp
+  )
+endif()
+
 get_property(NEO_CORE_PREAMBLE_TESTS GLOBAL PROPERTY NEO_CORE_PREAMBLE_TESTS)
 
 target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_helpers})

opencl/test/unit_test/helpers/hw_helper_tests_dg2_and_later.cpp

@@ -0,0 +1,163 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/hw_helper.h"
+#include "shared/source/os_interface/hw_info_config.h"
+#include "shared/test/common/cmd_parse/gen_cmd_parse.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/helpers/hw_helper_tests.h"
+#include "shared/test/common/helpers/unit_test_helper.h"
+
+#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
+#include "test.h"
+
+#include "pipe_control_args.h"
+
+using PipeControlHelperTestsDg2AndLater = ::testing::Test;
+using HwHelperTestsDg2AndLater = Test<ClDeviceFixture>;
+
+HWTEST2_F(PipeControlHelperTestsDg2AndLater, WhenAddingPipeControlWAThenCorrectCommandsAreProgrammed, IsAtLeastXeHpgCore) {
+    using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
+    using MI_SEMAPHORE_WAIT = typename FamilyType::MI_SEMAPHORE_WAIT;
+    uint8_t buffer[128];
+    uint64_t address = 0x1234567887654321;
+    HardwareInfo hardwareInfo = *defaultHwInfo;
+    bool requiresMemorySynchronization = (MemorySynchronizationCommands<FamilyType>::getSizeForAdditonalSynchronization(hardwareInfo) > 0) ? true : false;
+
+    for (auto ftrLocalMemory : ::testing::Bool()) {
+        LinearStream stream(buffer, 128);
+        hardwareInfo.featureTable.ftrLocalMemory = ftrLocalMemory;
+
+        MemorySynchronizationCommands<FamilyType>::addPipeControlWA(stream, address, hardwareInfo);
+
+        if (MemorySynchronizationCommands<FamilyType>::isPipeControlWArequired(hardwareInfo) == false) {
+            EXPECT_EQ(0u, stream.getUsed());
+            continue;
+        }
+
+        GenCmdList cmdList;
+        FamilyType::PARSE::parseCommandBuffer(cmdList, stream.getCpuBase(), stream.getUsed());
+        EXPECT_EQ(requiresMemorySynchronization ? 2u : 1u, cmdList.size());
+
+        PIPE_CONTROL expectedPipeControl = FamilyType::cmdInitPipeControl;
+        expectedPipeControl.setCommandStreamerStallEnable(true);
+        expectedPipeControl.setHdcPipelineFlush(true);
+        expectedPipeControl.setUnTypedDataPortCacheFlush(true);
+        auto it = cmdList.begin();
+        auto pPipeControl = genCmdCast<PIPE_CONTROL *>(*it);
+        ASSERT_NE(nullptr, pPipeControl);
+        EXPECT_TRUE(memcmp(&expectedPipeControl, pPipeControl, sizeof(PIPE_CONTROL)) == 0);
+
+        if (requiresMemorySynchronization) {
+            if (UnitTestHelper<FamilyType>::isAdditionalMiSemaphoreWaitRequired(hardwareInfo)) {
+                MI_SEMAPHORE_WAIT expectedMiSemaphoreWait;
+                EncodeSempahore<FamilyType>::programMiSemaphoreWait(&expectedMiSemaphoreWait, address,
+                                                                    EncodeSempahore<FamilyType>::invalidHardwareTag,
+                                                                    MI_SEMAPHORE_WAIT::COMPARE_OPERATION::COMPARE_OPERATION_SAD_NOT_EQUAL_SDD,
+                                                                    false);
+                auto pMiSemaphoreWait = genCmdCast<MI_SEMAPHORE_WAIT *>(*(++it));
+                ASSERT_NE(nullptr, pMiSemaphoreWait);
+                EXPECT_TRUE(memcmp(&expectedMiSemaphoreWait, pMiSemaphoreWait, sizeof(MI_SEMAPHORE_WAIT)) == 0);
+            }
+        }
+    }
+}
+
+HWTEST2_F(PipeControlHelperTestsDg2AndLater, WhenSettingExtraPipeControlPropertiesThenCorrectValuesAreSet, IsAtLeastXeHpgCore) {
+    using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
+
+    for (auto ftrLocalMemory : ::testing::Bool()) {
+        HardwareInfo hardwareInfo = *defaultHwInfo;
+        hardwareInfo.featureTable.ftrLocalMemory = ftrLocalMemory;
+
+        PipeControlArgs args{};
+        MemorySynchronizationCommands<FamilyType>::setPostSyncExtraProperties(args, hardwareInfo);
+
+        if (ftrLocalMemory) {
+            EXPECT_TRUE(args.hdcPipelineFlush);
+            EXPECT_TRUE(args.unTypedDataPortCacheFlush);
+        } else {
+            EXPECT_FALSE(args.hdcPipelineFlush);
+            EXPECT_FALSE(args.unTypedDataPortCacheFlush);
+        }
+    }
+}
+
+HWTEST2_F(PipeControlHelperTestsDg2AndLater, whenSettingCacheFlushExtraFieldsThenExpectHdcAndUnTypedDataPortFlushSet, IsAtLeastXeHpgCore) {
+    PipeControlArgs args;
+
+    MemorySynchronizationCommands<FamilyType>::setCacheFlushExtraProperties(args);
+    EXPECT_TRUE(args.hdcPipelineFlush);
+    EXPECT_TRUE(args.unTypedDataPortCacheFlush);
+}
+
+HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenRequestedCacheFlushesWhenProgrammingPipeControlThenFlushHdcAndUnTypedDataPortCache, IsAtLeastXeHpgCore) {
+    using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
+
+    uint32_t buffer[sizeof(PIPE_CONTROL) * 2] = {};
+    LinearStream stream(buffer, sizeof(buffer));
+
+    PipeControlArgs args;
+    args.hdcPipelineFlush = true;
+    args.unTypedDataPortCacheFlush = true;
+    args.compressionControlSurfaceCcsFlush = true;
+    MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
+
+    auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
+    EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
+    EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush());
+    EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
+}
+
+HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenDebugVariableSetWhenProgrammingPipeControlThenFlushHdcAndUnTypedDataPortCache, IsAtLeastXeHpgCore) {
+    using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
+    DebugManagerStateRestore restore;
+    DebugManager.flags.FlushAllCaches.set(true);
+
+    uint32_t buffer[sizeof(PIPE_CONTROL) * 2] = {};
+    LinearStream stream(buffer, sizeof(buffer));
+
+    PipeControlArgs args;
+    MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
+
+    auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
+    EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
+    EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush());
+    EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
+}
+
+HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenDebugDisableCacheFlushWhenProgrammingPipeControlWithCacheFlushThenExpectDebugOverrideFlushHdcAndUnTypedDataPortCache, IsAtLeastXeHpgCore) {
+    using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
+    DebugManagerStateRestore restore;
+    DebugManager.flags.DoNotFlushCaches.set(true);
+
+    uint32_t buffer[sizeof(PIPE_CONTROL) * 2] = {};
+    LinearStream stream(buffer, sizeof(buffer));
+
+    PipeControlArgs args;
+    args.hdcPipelineFlush = true;
+    args.unTypedDataPortCacheFlush = true;
+    args.compressionControlSurfaceCcsFlush = true;
+    MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
+
+    auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
+    EXPECT_FALSE(pipeControl->getHdcPipelineFlush());
+    EXPECT_FALSE(pipeControl->getUnTypedDataPortCacheFlush());
+    EXPECT_FALSE(pipeControl->getCompressionControlSurfaceCcsFlush());
+}
+
+HWTEST2_F(HwHelperTestsDg2AndLater, givenXeHPGAndLaterPlatformWhenCheckingIfUntypedDataPortCacheFlushIsRequiredThenReturnTrue, IsAtLeastXeHpgCore) {
+    auto &hwHelper = HwHelper::get(renderCoreFamily);
+    EXPECT_TRUE(hwHelper.additionalPipeControlArgsRequired());
+}
+
+using HwInfoConfigTestDg2AndLater = ::testing::Test;
+
+HWTEST2_F(HwInfoConfigTestDg2AndLater, givenDg2AndLaterPlatformWhenAskedIfHeapInLocalMemThenTrueIsReturned, IsAtLeastXeHpgCore) {
+    const auto &hwInfoConfig = *HwInfoConfig::get(defaultHwInfo->platform.eProductFamily);
+    EXPECT_TRUE(hwInfoConfig.heapInLocalMem(*defaultHwInfo));
+}

opencl/test/unit_test/helpers/hw_helper_tests_dg2_or_below.cpp

@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/hw_helper.h"
+
+#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
+#include "test.h"
+
+using namespace NEO;
+
+using HwHelperDg2OrBelowTests = Test<ClDeviceFixture>;
+
+using isDG2OrBelow = IsAtMostProduct<IGFX_DG2>;
+HWTEST2_F(HwHelperDg2OrBelowTests, WhenGettingIsKmdMigrationSupportedThenFalseIsReturned, isDG2OrBelow) {
+    auto &hwHelper = HwHelper::get(hardwareInfo.platform.eRenderCoreFamily);
+    EXPECT_FALSE(hwHelper.isKmdMigrationSupported(hardwareInfo));
+}

opencl/test/unit_test/helpers/test_preamble_dg2_and_later.cpp

@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/command_stream/stream_properties.h"
+#include "shared/source/debug_settings/debug_settings_manager.h"
+#include "shared/source/os_interface/hw_info_config.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/unit_test/preamble/preamble_fixture.h"
+
+#include "opencl/source/helpers/hardware_commands_helper.h"
+#include "test.h"
+
+using namespace NEO;
+
+using PreambleCfeStateDg2AndLater = PreambleFixture;
+using IsDG2AndLater = IsAtLeastXeHpgCore;
+
+HWTEST2_F(PreambleCfeStateDg2AndLater, whenprogramVFEStateIsCalledWithProperAdditionalKernelExecInfoThenProperStateIsSet, IsDG2AndLater) {
+    using CFE_STATE = typename FamilyType::CFE_STATE;
+
+    HardwareInfo hwInfo = *defaultHwInfo;
+    const auto &hwInfoConfig = *HwInfoConfig::get(productFamily);
+
+    hwInfo.platform.usRevId = hwInfoConfig.getHwRevIdFromStepping(REVISION_B, hwInfo);
+
+    if (!hwInfoConfig.isDisableOverdispatchAvailable(hwInfo)) {
+        GTEST_SKIP();
+    }
+
+    auto pVfeCmd = PreambleHelper<FamilyType>::getSpaceForVfeState(&linearStream, hwInfo, EngineGroupType::RenderCompute);
+    StreamProperties properties{};
+    properties.frontEndState.disableOverdispatch.value = 1;
+    PreambleHelper<FamilyType>::programVfeState(pVfeCmd, hwInfo, 0u, 0, 0, properties);
+    parseCommands<FamilyType>(linearStream);
+    auto cfeStateIt = find<CFE_STATE *>(cmdList.begin(), cmdList.end());
+    ASSERT_NE(cmdList.end(), cfeStateIt);
+    auto cfeState = reinterpret_cast<CFE_STATE *>(*cfeStateIt);
+    EXPECT_TRUE(cfeState->getComputeOverdispatchDisable());
+
+    cmdList.clear();
+    pVfeCmd = PreambleHelper<FamilyType>::getSpaceForVfeState(&linearStream, hwInfo, EngineGroupType::RenderCompute);
+    properties.frontEndState.disableOverdispatch.value = 0;
+    PreambleHelper<FamilyType>::programVfeState(pVfeCmd, hwInfo, 0u, 0, 0, properties);
+    parseCommands<FamilyType>(linearStream);
+    cfeStateIt = find<CFE_STATE *>(cmdList.begin(), cmdList.end());
+    cfeStateIt++;
+    ASSERT_NE(cmdList.end(), cfeStateIt);
+    cfeState = reinterpret_cast<CFE_STATE *>(*cfeStateIt);
+    EXPECT_FALSE(cfeState->getComputeOverdispatchDisable());
+}
+
+HWTEST2_F(PreambleCfeStateDg2AndLater, givenSetDebugFlagWhenPreambleCfeStateIsProgrammedThenCFEStateParamsHaveSetValue, IsDG2AndLater) {
+    using CFE_STATE = typename FamilyType::CFE_STATE;
+
+    uint32_t expectedValue1 = 1u;
+
+    DebugManagerStateRestore dbgRestore;
+
+    DebugManager.flags.CFEComputeOverdispatchDisable.set(expectedValue1);
+
+    uint64_t expectedAddress = 1 << CFE_STATE::SCRATCHSPACEBUFFER_BIT_SHIFT;
+    auto pVfeCmd = PreambleHelper<FamilyType>::getSpaceForVfeState(&linearStream, *defaultHwInfo, EngineGroupType::RenderCompute);
+    StreamProperties emptyProperties{};
+    PreambleHelper<FamilyType>::programVfeState(pVfeCmd, *defaultHwInfo, 0u, expectedAddress, 16u, emptyProperties);
+
+    parseCommands<FamilyType>(linearStream);
+    auto cfeStateIt = find<CFE_STATE *>(cmdList.begin(), cmdList.end());
+    ASSERT_NE(cmdList.end(), cfeStateIt);
+
+    auto cfeState = reinterpret_cast<CFE_STATE *>(*cfeStateIt);
+
+    EXPECT_EQ(expectedValue1, cfeState->getComputeOverdispatchDisable());
+}