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fix: program RenderTargetCacheFlush in PC prior to PIPELINE_SELECT

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- fix code by removing csStallOnly that skipped seeting RTCF flag

Related-To: NEO-9194

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
This commit is contained in:
Mateusz Hoppe
2024-10-09 15:15:32 +00:00
committed by Compute-Runtime-Automation
parent e690217227
commit 31265edfee
3 changed files with 25 additions and 6 deletions
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3
shared/source/helpers/preamble_xe_hpg_and_xe_hpc.inl
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2023 Intel Corporation
* Copyright (C) 2023-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -27,7 +27,6 @@ void PreambleHelper<Family>::programPipelineSelect(LinearStream *pCommandStream,
if (MemorySynchronizationCommands<Family>::isBarrierPriorToPipelineSelectWaRequired(rootDeviceEnvironment)) {
PipeControlArgs args;
args.csStallOnly = true;
args.renderTargetCacheFlushEnable = true;
MemorySynchronizationCommands<Family>::addSingleBarrier(*pCommandStream, args);
}