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Fix for ReadWriteBufferRect with misaligned hostPtr

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Change-Id: I026f3512e6501b7e3a4cd5b9b6e9010a0b3b8a72
This commit is contained in:
Hoppe, Mateusz
2019-01-08 18:20:52 +01:00
committed by sys_ocldev
parent 8feab5e570
commit 3381dc258b
5 changed files with 172 additions and 6 deletions
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8
runtime/command_queue/enqueue_read_buffer_rect.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2017-2018 Intel Corporation
* Copyright (C) 2017-2019 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -83,11 +83,15 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
dstPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
}
void *alignedDstPtr = alignDown(dstPtr, 4);
size_t dstPtrOffset = ptrDiff(dstPtr, alignedDstPtr);
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcMemObj = buffer;
dc.dstPtr = dstPtr;
dc.dstPtr = alignedDstPtr;
dc.srcOffset = bufferOrigin;
dc.dstOffset = hostOrigin;
dc.dstOffset.x += dstPtrOffset;
dc.size = region;
dc.srcRowPitch = bufferRowPitch;
dc.srcSlicePitch = bufferSlicePitch;

8
runtime/command_queue/enqueue_write_buffer_rect.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2017-2018 Intel Corporation
* Copyright (C) 2017-2019 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -82,10 +82,14 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBufferRect(
srcPtr = reinterpret_cast<void *>(hostPtrSurf.getAllocation()->getGpuAddressToPatch());
}
void *alignedSrcPtr = alignDown(srcPtr, 4);
size_t srcPtrOffset = ptrDiff(srcPtr, alignedSrcPtr);
BuiltinDispatchInfoBuilder::BuiltinOpParams dc;
dc.srcPtr = srcPtr;
dc.srcPtr = alignedSrcPtr;
dc.dstMemObj = buffer;
dc.srcOffset = hostOrigin;
dc.srcOffset.x += srcPtrOffset;
dc.dstOffset = bufferOrigin;
dc.size = region;
dc.srcRowPitch = hostRowPitch;