refactor: remove not needed code

Related-To: NEO-7527

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
This commit is contained in:
Mateusz Jablonski
2023-09-27 09:15:56 +00:00
committed by Compute-Runtime-Automation
parent cb730d11f4
commit 3a21b3b228
113 changed files with 16 additions and 14838 deletions

View File

@@ -103,7 +103,6 @@ struct CmdServicesMemTraceVersion {
Ehl = 28,
Dg1 = 30,
Adls = 37,
XeHP_SDV = 29,
Adlp = 34,
Adln = 34,
Dg2 = 36,

View File

@@ -61,27 +61,6 @@ DEVICE(0x7D60, MtlHwConfig)
#endif
#endif
#ifdef SUPPORT_XE_HP_CORE
#ifdef SUPPORT_XE_HP_SDV
DEVICE(0x0201, XehpSdvHwConfig)
DEVICE(0x0202, XehpSdvHwConfig)
DEVICE(0x0203, XehpSdvHwConfig)
DEVICE(0x0204, XehpSdvHwConfig)
DEVICE(0x0205, XehpSdvHwConfig)
DEVICE(0x0206, XehpSdvHwConfig)
DEVICE(0x0207, XehpSdvHwConfig)
DEVICE(0x0208, XehpSdvHwConfig)
DEVICE(0x0209, XehpSdvHwConfig)
DEVICE(0x020A, XehpSdvHwConfig)
DEVICE(0x020B, XehpSdvHwConfig)
DEVICE(0x020C, XehpSdvHwConfig)
DEVICE(0x020D, XehpSdvHwConfig)
DEVICE(0x020E, XehpSdvHwConfig)
DEVICE(0x020F, XehpSdvHwConfig)
DEVICE(0x0210, XehpSdvHwConfig)
#endif
#endif
#ifdef SUPPORT_GEN12LP
#ifdef SUPPORT_TGLLP

View File

@@ -37,12 +37,6 @@ DEVICE_CONFIG(DG2_G12_A0, Dg2HwConfig, dg2G12DeviceIds, XE_FAMILY, XE_HPG_RELEAS
#endif
#endif
#ifdef SUPPORT_XE_HP_CORE
#ifdef SUPPORT_XE_HP_SDV
DEVICE_CONFIG(XEHP_SDV, XehpSdvHwConfig, xeHpSdvDeviceIds, XE_FAMILY, XE_HP_RELEASE)
#endif
#endif
#ifdef SUPPORT_GEN12LP
#ifdef SUPPORT_TGLLP
DEVICE_CONFIG(TGL, TgllpHw1x6x16, tgllpDeviceIds, GEN12LP_FAMILY, GEN12LP_RELEASE)

View File

@@ -22,12 +22,6 @@
#endif
#endif
#ifdef SUPPORT_XE_HP_CORE
#ifdef SUPPORT_XE_HP_SDV
#include "shared/source/xe_hp_core/xe_hp_sdv/device_ids_configs_xe_hp_sdv.h"
#endif
#endif
#ifdef SUPPORT_GEN12LP
#ifdef SUPPORT_TGLLP
#include "shared/source/gen12lp/tgllp/device_ids_configs_tgllp.h"

View File

@@ -1,9 +0,0 @@
#
# Copyright (C) 2021-2022 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(SUPPORT_XE_HP_CORE)
add_subdirectories()
endif()

View File

@@ -1,26 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/aub_command_stream_receiver.h"
#include "shared/source/command_stream/aub_command_stream_receiver_hw_xehp_and_later.inl"
#include "shared/source/helpers/array_count.h"
#include "shared/source/helpers/populate_factory.h"
namespace NEO {
typedef XeHpFamily Family;
static auto gfxCore = IGFX_XE_HP_CORE;
template <>
void populateFactoryTable<AUBCommandStreamReceiverHw<Family>>() {
extern AubCommandStreamReceiverCreateFunc aubCommandStreamReceiverFactory[IGFX_MAX_CORE];
UNRECOVERABLE_IF(!isInRange(gfxCore, aubCommandStreamReceiverFactory));
aubCommandStreamReceiverFactory[gfxCore] = AUBCommandStreamReceiverHw<Family>::create;
}
template class AUBCommandStreamReceiverHw<Family>;
} // namespace NEO

View File

@@ -1,31 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/aub/aub_mapper_base.h"
#include "shared/source/helpers/constants.h"
#include "shared/source/xe_hp_core/hw_cmds.h"
#include "aubstream/engine_node.h"
namespace NEO {
struct XeHpFamily;
template <>
struct AUBFamilyMapper<XeHpFamily> {
enum { device = AubMemDump::DeviceValues::XeHP_SDV };
using AubTraits = AubMemDump::Traits<device, MemoryConstants::GfxAddressBits>;
static const AubMemDump::LrcaHelper *const csTraits[aub_stream::NUM_ENGINES];
static const MMIOList globalMMIO;
static const MMIOList *perEngineMMIO[aub_stream::NUM_ENGINES];
typedef AubMemDump::AubDump<AubTraits> AUB;
};
} // namespace NEO

View File

@@ -1,20 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/aub/aub_helper_xehp_and_later.inl"
#include "shared/source/aub_mem_dump/aub_mem_dump.h"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
namespace NEO {
struct XeHpFamily;
using Family = NEO::XeHpFamily;
constexpr static auto deviceValue = AubMemDump::DeviceValues::XeHP_SDV;
template class AubHelperHw<Family>;
} // namespace NEO
#include "shared/source/aub_mem_dump/aub_mem_dump_xehp_and_later.inl"

View File

@@ -1,105 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_container/command_encoder.h"
#include "shared/source/command_container/command_encoder.inl"
#include "shared/source/command_container/command_encoder_raytracing_xehp_and_later.inl"
#include "shared/source/command_container/command_encoder_xehp_and_later.inl"
#include "shared/source/command_container/encode_compute_mode_tgllp_and_later.inl"
#include "shared/source/helpers/gfx_core_helper.h"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
using Family = NEO::XeHpFamily;
#include "shared/source/command_container/command_encoder_tgllp_and_later.inl"
#include "shared/source/command_container/image_surface_state/compression_params_tgllp_and_later.inl"
#include "shared/source/command_container/image_surface_state/compression_params_xehp_and_later.inl"
#include "shared/source/helpers/cache_flush_xehp_and_later.inl"
namespace NEO {
template <>
void EncodeDispatchKernel<Family>::adjustTimestampPacket(WALKER_TYPE &walkerCmd, const HardwareInfo &hwInfo) {
}
template <>
inline void EncodeSurfaceState<Family>::encodeExtraCacheSettings(R_SURFACE_STATE *surfaceState, const EncodeSurfaceStateArgs &args) {
}
template <>
void EncodeSurfaceState<Family>::encodeImplicitScalingParams(const EncodeSurfaceStateArgs &args) {
auto surfaceState = reinterpret_cast<R_SURFACE_STATE *>(args.outMemory);
bool enablePartialWrites = args.implicitScaling;
bool enableMultiGpuAtomics = enablePartialWrites;
if (DebugManager.flags.EnableMultiGpuAtomicsOptimization.get()) {
enableMultiGpuAtomics = args.useGlobalAtomics && (enablePartialWrites || args.areMultipleSubDevicesInContext);
}
surfaceState->setDisableSupportForMultiGpuAtomics(!enableMultiGpuAtomics);
surfaceState->setDisableSupportForMultiGpuPartialWrites(!enablePartialWrites);
if (DebugManager.flags.ForceMultiGpuAtomics.get() != -1) {
surfaceState->setDisableSupportForMultiGpuAtomics(!!DebugManager.flags.ForceMultiGpuAtomics.get());
}
if (DebugManager.flags.ForceMultiGpuPartialWrites.get() != -1) {
surfaceState->setDisableSupportForMultiGpuPartialWrites(!!DebugManager.flags.ForceMultiGpuPartialWrites.get());
}
}
template <>
void EncodeDispatchKernel<Family>::appendAdditionalIDDFields(INTERFACE_DESCRIPTOR_DATA *pInterfaceDescriptor, const HardwareInfo &hwInfo, const uint32_t threadsPerThreadGroup, uint32_t slmTotalSize, SlmPolicy slmPolicy) {
}
template <>
void EncodeDispatchKernel<Family>::programBarrierEnable(INTERFACE_DESCRIPTOR_DATA &interfaceDescriptor, uint32_t value, const HardwareInfo &hwInfo) {
interfaceDescriptor.setBarrierEnable(value);
}
template <>
void EncodeDispatchKernel<Family>::adjustInterfaceDescriptorData(INTERFACE_DESCRIPTOR_DATA &interfaceDescriptor, const Device &device, const HardwareInfo &hwInfo, const uint32_t threadGroupCount, const uint32_t numGrf) {
const auto &productHelper = device.getProductHelper();
if (productHelper.isDisableOverdispatchAvailable(hwInfo)) {
interfaceDescriptor.setThreadGroupDispatchSize(INTERFACE_DESCRIPTOR_DATA::THREAD_GROUP_DISPATCH_SIZE_TG_SIZE_1);
}
if (DebugManager.flags.ForceThreadGroupDispatchSize.get() != -1) {
interfaceDescriptor.setThreadGroupDispatchSize(static_cast<INTERFACE_DESCRIPTOR_DATA::THREAD_GROUP_DISPATCH_SIZE>(
DebugManager.flags.ForceThreadGroupDispatchSize.get()));
}
}
template <>
void adjustL3ControlField<Family>(void *l3ControlBuffer) { ; }
template void flushGpuCache<Family>(LinearStream *commandStream, const Range<L3Range> &ranges, uint64_t postSyncAddress, const HardwareInfo &hwInfo);
template struct EncodeDispatchKernel<Family>;
template struct EncodeStates<Family>;
template struct EncodeMath<Family>;
template struct EncodeMathMMIO<Family>;
template struct EncodeIndirectParams<Family>;
template struct EncodeSetMMIO<Family>;
template struct EncodeMediaInterfaceDescriptorLoad<Family>;
template struct EncodeStateBaseAddress<Family>;
template struct EncodeStoreMMIO<Family>;
template struct EncodeSurfaceState<Family>;
template struct EncodeComputeMode<Family>;
template struct EncodeAtomic<Family>;
template struct EncodeSemaphore<Family>;
template struct EncodeBatchBufferStartOrEnd<Family>;
template struct EncodeMiFlushDW<Family>;
template struct EncodeMiPredicate<Family>;
template struct EncodeMemoryPrefetch<Family>;
template struct EncodeMiArbCheck<Family>;
template struct EncodeWA<Family>;
template struct EncodeEnableRayTracing<Family>;
template struct EncodeNoop<Family>;
template struct EncodeStoreMemory<Family>;
template struct EncodeMemoryFence<Family>;
template struct EnodeUserInterrupt<Family>;
} // namespace NEO

View File

@@ -1,159 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/xe_hp_core/hw_cmds.h"
#include "shared/source/xe_hp_core/hw_info.h"
using Family = NEO::XeHpFamily;
#include "shared/source/command_stream/command_stream_receiver_hw_xehp_and_later.inl"
#include "shared/source/helpers/blit_commands_helper_xehp_and_later.inl"
#include "shared/source/helpers/populate_factory.h"
#include "shared/source/helpers/state_base_address_xehp_and_later.inl"
namespace NEO {
static auto gfxCore = IGFX_XE_HP_CORE;
template <>
bool ImplicitFlushSettings<Family>::defaultSettingForNewResource = true;
template <>
bool ImplicitFlushSettings<Family>::defaultSettingForGpuIdle = true;
template class ImplicitFlushSettings<Family>;
template <>
void populateFactoryTable<CommandStreamReceiverHw<Family>>() {
extern CommandStreamReceiverCreateFunc commandStreamReceiverFactory[2 * IGFX_MAX_CORE];
commandStreamReceiverFactory[gfxCore] = DeviceCommandStreamReceiver<Family>::create;
}
template <>
MemoryCompressionState CommandStreamReceiverHw<Family>::getMemoryCompressionState(bool auxTranslationRequired, const HardwareInfo &hwInfo) const {
auto memoryCompressionState = MemoryCompressionState::NotApplicable;
const auto &productHelper = getProductHelper();
if (productHelper.allowStatelessCompression(hwInfo)) {
memoryCompressionState = auxTranslationRequired ? MemoryCompressionState::Disabled : MemoryCompressionState::Enabled;
}
return memoryCompressionState;
}
template <>
GraphicsAllocation *CommandStreamReceiverHw<Family>::getClearColorAllocation() {
constexpr uint32_t clearColorSize = 16u;
static uint8_t clearColorBuffer[clearColorSize];
if (DebugManager.flags.UseClearColorAllocationForBlitter.get()) {
if (clearColorAllocation == nullptr) {
auto lock = this->obtainUniqueOwnership();
if (clearColorAllocation == nullptr) {
AllocationProperties properties{rootDeviceIndex, clearColorSize, AllocationType::BUFFER, osContext->getDeviceBitfield()};
properties.flags.readOnlyMultiStorage = true;
properties.flags.flushL3RequiredForRead = properties.flags.flushL3RequiredForWrite = false;
clearColorAllocation = getMemoryManager()->allocateGraphicsMemoryWithProperties(properties, clearColorBuffer);
}
}
}
return clearColorAllocation;
}
template <>
void CommandStreamReceiverHw<Family>::programPerDssBackedBuffer(LinearStream &commandStream, Device &device, DispatchFlags &dispatchFlags) {
}
template <>
size_t CommandStreamReceiverHw<Family>::getCmdSizeForPerDssBackedBuffer(const HardwareInfo &hwInfo) {
return 0;
}
template <>
void CommandStreamReceiverHw<Family>::addPipeControlBefore3dState(LinearStream &commandStream, DispatchFlags &dispatchFlags) {}
template <>
void BlitCommandsHelper<Family>::appendClearColor(const BlitProperties &blitProperties, typename Family::XY_BLOCK_COPY_BLT &blitCmd) {
using XY_BLOCK_COPY_BLT = typename Family::XY_BLOCK_COPY_BLT;
if (DebugManager.flags.UseClearColorAllocationForBlitter.get()) {
blitCmd.setSourceClearValueEnable(XY_BLOCK_COPY_BLT::CLEAR_VALUE_ENABLE::CLEAR_VALUE_ENABLE_ENABLE);
blitCmd.setDestinationClearValueEnable(XY_BLOCK_COPY_BLT::CLEAR_VALUE_ENABLE::CLEAR_VALUE_ENABLE_ENABLE);
auto clearColorAddress = blitProperties.clearColorAllocation->getGpuAddress();
blitCmd.setSourceClearAddressLow(static_cast<uint32_t>(clearColorAddress & 0xFFFFFFFFULL));
blitCmd.setSourceClearAddressHigh(static_cast<uint32_t>(clearColorAddress >> 32));
blitCmd.setDestinationClearAddressLow(static_cast<uint32_t>(clearColorAddress & 0xFFFFFFFFULL));
blitCmd.setDestinationClearAddressHigh(static_cast<uint32_t>(clearColorAddress >> 32));
}
}
template class CommandStreamReceiverHw<Family>;
template <>
void BlitCommandsHelper<Family>::appendExtraMemoryProperties(typename Family::XY_BLOCK_COPY_BLT &blitCmd, const RootDeviceEnvironment &rootDeviceEnvironment) {
using XY_BLOCK_COPY_BLT = typename Family::XY_BLOCK_COPY_BLT;
auto hwInfo = rootDeviceEnvironment.getHardwareInfo();
const auto &productHelper = rootDeviceEnvironment.getHelper<ProductHelper>();
if (GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_B, *hwInfo, productHelper) &&
productHelper.getLocalMemoryAccessMode(*hwInfo) == LocalMemoryAccessMode::CpuAccessAllowed) {
blitCmd.setSourceTargetMemory(XY_BLOCK_COPY_BLT::TARGET_MEMORY::TARGET_MEMORY_SYSTEM_MEM);
blitCmd.setDestinationTargetMemory(XY_BLOCK_COPY_BLT::TARGET_MEMORY::TARGET_MEMORY_SYSTEM_MEM);
}
}
template <>
void BlitCommandsHelper<Family>::appendExtraMemoryProperties(typename Family::XY_COLOR_BLT &blitCmd, const RootDeviceEnvironment &rootDeviceEnvironment) {
using XY_COLOR_BLT = typename Family::XY_COLOR_BLT;
auto hwInfo = rootDeviceEnvironment.getHardwareInfo();
const auto &productHelper = rootDeviceEnvironment.getHelper<ProductHelper>();
if (GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_B, *hwInfo, productHelper) &&
productHelper.getLocalMemoryAccessMode(*hwInfo) == LocalMemoryAccessMode::CpuAccessAllowed) {
blitCmd.setDestinationTargetMemory(XY_COLOR_BLT::DESTINATION_TARGET_MEMORY::DESTINATION_TARGET_MEMORY_SYSTEM_MEM);
}
}
template struct BlitCommandsHelper<Family>;
template void BlitCommandsHelper<Family>::appendColorDepth<typename Family::XY_BLOCK_COPY_BLT>(const BlitProperties &blitProperties, typename Family::XY_BLOCK_COPY_BLT &blitCmd);
template void BlitCommandsHelper<Family>::appendBlitCommandsForBuffer<typename Family::XY_BLOCK_COPY_BLT>(const BlitProperties &blitProperties, typename Family::XY_BLOCK_COPY_BLT &blitCmd, const RootDeviceEnvironment &rootDeviceEnvironment);
const Family::COMPUTE_WALKER Family::cmdInitGpgpuWalker = Family::COMPUTE_WALKER::sInit();
const Family::CFE_STATE Family::cmdInitCfeState = Family::CFE_STATE::sInit();
const Family::INTERFACE_DESCRIPTOR_DATA Family::cmdInitInterfaceDescriptorData = Family::INTERFACE_DESCRIPTOR_DATA::sInit();
const Family::MI_BATCH_BUFFER_START Family::cmdInitBatchBufferStart = Family::MI_BATCH_BUFFER_START::sInit();
const Family::MI_BATCH_BUFFER_END Family::cmdInitBatchBufferEnd = Family::MI_BATCH_BUFFER_END::sInit();
const Family::PIPE_CONTROL Family::cmdInitPipeControl = Family::PIPE_CONTROL::sInit();
const Family::STATE_COMPUTE_MODE Family::cmdInitStateComputeMode = Family::STATE_COMPUTE_MODE::sInit();
const Family::_3DSTATE_BINDING_TABLE_POOL_ALLOC Family::cmdInitStateBindingTablePoolAlloc =
Family::_3DSTATE_BINDING_TABLE_POOL_ALLOC::sInit();
const Family::MI_SEMAPHORE_WAIT Family::cmdInitMiSemaphoreWait = Family::MI_SEMAPHORE_WAIT::sInit();
const Family::RENDER_SURFACE_STATE Family::cmdInitRenderSurfaceState = Family::RENDER_SURFACE_STATE::sInit();
const Family::POSTSYNC_DATA Family::cmdInitPostSyncData = Family::POSTSYNC_DATA::sInit();
const Family::MI_SET_PREDICATE Family::cmdInitSetPredicate = Family::MI_SET_PREDICATE::sInit();
const Family::MI_LOAD_REGISTER_IMM Family::cmdInitLoadRegisterImm = Family::MI_LOAD_REGISTER_IMM::sInit();
const Family::MI_LOAD_REGISTER_REG Family::cmdInitLoadRegisterReg = Family::MI_LOAD_REGISTER_REG::sInit();
const Family::MI_LOAD_REGISTER_MEM Family::cmdInitLoadRegisterMem = Family::MI_LOAD_REGISTER_MEM::sInit();
const Family::MI_STORE_DATA_IMM Family::cmdInitStoreDataImm = Family::MI_STORE_DATA_IMM::sInit();
const Family::MI_STORE_REGISTER_MEM Family::cmdInitStoreRegisterMem = Family::MI_STORE_REGISTER_MEM::sInit();
const Family::MI_NOOP Family::cmdInitNoop = Family::MI_NOOP::sInit();
const Family::MI_REPORT_PERF_COUNT Family::cmdInitReportPerfCount = Family::MI_REPORT_PERF_COUNT::sInit();
const Family::MI_ATOMIC Family::cmdInitAtomic = Family::MI_ATOMIC::sInit();
const Family::PIPELINE_SELECT Family::cmdInitPipelineSelect = Family::PIPELINE_SELECT::sInit();
const Family::MI_ARB_CHECK Family::cmdInitArbCheck = Family::MI_ARB_CHECK::sInit();
const Family::STATE_BASE_ADDRESS Family::cmdInitStateBaseAddress = Family::STATE_BASE_ADDRESS::sInit();
const Family::MEDIA_SURFACE_STATE Family::cmdInitMediaSurfaceState = Family::MEDIA_SURFACE_STATE::sInit();
const Family::SAMPLER_STATE Family::cmdInitSamplerState = Family::SAMPLER_STATE::sInit();
const Family::BINDING_TABLE_STATE Family::cmdInitBindingTableState = Family::BINDING_TABLE_STATE::sInit();
const Family::MI_USER_INTERRUPT Family::cmdInitUserInterrupt = Family::MI_USER_INTERRUPT::sInit();
const Family::MI_CONDITIONAL_BATCH_BUFFER_END cmdInitConditionalBatchBufferEnd = Family::MI_CONDITIONAL_BATCH_BUFFER_END::sInit();
const Family::L3_CONTROL Family::cmdInitL3Control = Family::L3_CONTROL::sInit();
const Family::L3_FLUSH_ADDRESS_RANGE Family::cmdInitL3FlushAddressRange = Family::L3_FLUSH_ADDRESS_RANGE::sInit();
const Family::MI_FLUSH_DW Family::cmdInitMiFlushDw = Family::MI_FLUSH_DW::sInit();
const Family::XY_BLOCK_COPY_BLT Family::cmdInitXyBlockCopyBlt = Family::XY_BLOCK_COPY_BLT::sInit();
const Family::XY_BLOCK_COPY_BLT Family::cmdInitXyCopyBlt = Family::XY_BLOCK_COPY_BLT::sInit();
const Family::XY_FAST_COLOR_BLT Family::cmdInitXyColorBlt = Family::XY_FAST_COLOR_BLT::sInit();
const Family::_3DSTATE_BTD Family::cmd3dStateBtd = Family::_3DSTATE_BTD::sInit();
const Family::_3DSTATE_BTD_BODY Family::cmd3dStateBtdBody = Family::_3DSTATE_BTD_BODY::sInit();
const Family::STATE_SIP Family::cmdInitStateSip = Family::STATE_SIP::sInit();
} // namespace NEO

View File

@@ -1,14 +0,0 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/command_stream_receiver_simulated_common_hw_xehp_and_later.inl"
namespace NEO {
typedef XeHpFamily Family;
template class CommandStreamReceiverSimulatedCommonHw<Family>;
} // namespace NEO

View File

@@ -1,24 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/device_command_stream.h"
#include "shared/source/execution_environment/execution_environment.h"
#include "shared/source/xe_hp_core/hw_cmds.h"
#include "create_command_stream_receiver.inl"
namespace NEO {
template <>
CommandStreamReceiver *createDeviceCommandStreamReceiver<XeHpFamily>(bool withAubDump,
ExecutionEnvironment &executionEnvironment,
uint32_t rootDeviceIndex,
const DeviceBitfield deviceBitfield) {
return createCommandStreamReceiver<XeHpFamily>(withAubDump, executionEnvironment, rootDeviceIndex, deviceBitfield);
}
} // namespace NEO

View File

@@ -1,25 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/debugger/debugger_l0.inl"
#include "shared/source/debugger/debugger_l0_tgllp_and_later.inl"
#include "shared/source/helpers/populate_factory.h"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
namespace NEO {
using GfxFamily = NEO::XeHpFamily;
static auto coreFamily = IGFX_XE_HP_CORE;
template <>
void populateFactoryTable<DebuggerL0Hw<GfxFamily>>() {
extern DebugerL0CreateFn debuggerL0Factory[IGFX_MAX_CORE];
debuggerL0Factory[coreFamily] = DebuggerL0Hw<GfxFamily>::allocate;
}
template class DebuggerL0Hw<GfxFamily>;
} // namespace NEO

View File

@@ -1,6 +0,0 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/

View File

@@ -1,16 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
const HardwareInfo XE_HP_SDV::hwInfo = XehpSdvHwConfig::hwInfo;
const uint64_t XE_HP_SDV::defaultHardwareInfoConfig = 0;
void setupXEHPHardwareInfoImpl(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig, const CompilerProductHelper &compilerProductHelper) {
XE_HP_SDV::setupHardwareInfoBase(hwInfo, setupFeatureTableAndWorkaroundTable, compilerProductHelper);
XehpSdvHwConfig::setupHardwareInfo(hwInfo, setupFeatureTableAndWorkaroundTable, compilerProductHelper);
}
void (*XE_HP_SDV::setupHardwareInfo)(HardwareInfo *, bool, uint64_t, const CompilerProductHelper &) = setupXEHPHardwareInfoImpl;

View File

@@ -1,34 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/aub_command_stream_receiver_hw.h"
#include "shared/source/command_stream/command_stream_receiver_hw.h"
#include "shared/source/command_stream/tbx_command_stream_receiver_hw.h"
#include "shared/source/debugger/debugger_l0.h"
#include "shared/source/helpers/gfx_core_helper.h"
#include "shared/source/helpers/populate_factory.h"
#include "shared/source/xe_hp_core/hw_cmds.h"
namespace NEO {
extern GfxCoreHelper *gfxCoreHelperFactory[IGFX_MAX_CORE];
using Family = XeHpFamily;
static auto gfxFamily = IGFX_XE_HP_CORE;
struct EnableCoreXeHpCore {
EnableCoreXeHpCore() {
gfxCoreHelperFactory[gfxFamily] = &GfxCoreHelperHw<Family>::get();
populateFactoryTable<AUBCommandStreamReceiverHw<Family>>();
populateFactoryTable<CommandStreamReceiverHw<Family>>();
populateFactoryTable<TbxCommandStreamReceiverHw<Family>>();
populateFactoryTable<DebuggerL0Hw<Family>>();
}
};
static EnableCoreXeHpCore enable;
} // namespace NEO

View File

@@ -1,25 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/experimental_command_buffer.inl"
#include "shared/source/xe_hp_core/hw_cmds.h"
namespace NEO {
typedef XeHpFamily GfxFamily;
template void ExperimentalCommandBuffer::injectBufferStart<GfxFamily>(LinearStream &parentStream, size_t cmdBufferOffset);
template size_t ExperimentalCommandBuffer::getRequiredInjectionSize<GfxFamily>() noexcept;
template size_t ExperimentalCommandBuffer::programExperimentalCommandBuffer<GfxFamily>();
template size_t ExperimentalCommandBuffer::getTotalExperimentalSize<GfxFamily>() noexcept;
template void ExperimentalCommandBuffer::addTimeStampPipeControl<GfxFamily>();
template size_t ExperimentalCommandBuffer::getTimeStampPipeControlSize<GfxFamily>() noexcept;
template void ExperimentalCommandBuffer::addExperimentalCommands<GfxFamily>();
template size_t ExperimentalCommandBuffer::getExperimentalCommandsSize<GfxFamily>() noexcept;
} // namespace NEO

View File

@@ -1,156 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/xe_hp_core/aub_mapper.h"
#include "shared/source/xe_hp_core/hw_cmds.h"
using Family = NEO::XeHpFamily;
#include "shared/source/helpers/api_specific_config.h"
#include "shared/source/helpers/constants.h"
#include "shared/source/helpers/extra_allocation_data_xehp_and_later.inl"
#include "shared/source/helpers/flat_batch_buffer_helper_hw.inl"
#include "shared/source/helpers/gfx_core_helper_base.inl"
#include "shared/source/helpers/gfx_core_helper_bdw_to_dg2.inl"
#include "shared/source/helpers/gfx_core_helper_tgllp_and_later.inl"
#include "shared/source/helpers/gfx_core_helper_xehp_and_later.inl"
#include "shared/source/os_interface/product_helper.h"
namespace NEO {
template <>
const AuxTranslationMode GfxCoreHelperHw<Family>::defaultAuxTranslationMode = AuxTranslationMode::Blit;
template <>
uint32_t GfxCoreHelperHw<Family>::getMetricsLibraryGenId() const {
return static_cast<uint32_t>(MetricsLibraryApi::ClientGen::XeHP);
}
template <>
uint32_t GfxCoreHelperHw<Family>::getComputeUnitsUsedForScratch(const RootDeviceEnvironment &rootDeviceEnvironment) const {
if (DebugManager.flags.OverrideNumComputeUnitsForScratch.get() != -1) {
return static_cast<uint32_t>(DebugManager.flags.OverrideNumComputeUnitsForScratch.get());
}
// XeHP products return physical threads
auto hwInfo = rootDeviceEnvironment.getHardwareInfo();
return std::max(hwInfo->gtSystemInfo.MaxSubSlicesSupported, static_cast<uint32_t>(32)) * hwInfo->gtSystemInfo.MaxEuPerSubSlice * (hwInfo->gtSystemInfo.ThreadCount / hwInfo->gtSystemInfo.EUCount);
}
template <>
uint32_t GfxCoreHelperHw<Family>::computeSlmValues(const HardwareInfo &hwInfo, uint32_t slmSize) {
using SHARED_LOCAL_MEMORY_SIZE = typename Family::INTERFACE_DESCRIPTOR_DATA::SHARED_LOCAL_MEMORY_SIZE;
auto slmValue = std::max(slmSize, 1024u);
slmValue = Math::nextPowerOfTwo(slmValue);
slmValue = Math::getMinLsbSet(slmValue);
slmValue = slmValue - 9;
DEBUG_BREAK_IF(slmValue > 7);
slmValue *= !!slmSize;
return slmValue;
}
template <>
void GfxCoreHelperHw<Family>::setL1CachePolicy(bool useL1Cache, typename Family::RENDER_SURFACE_STATE *surfaceState, const HardwareInfo *hwInfo) const {
}
template <>
bool GfxCoreHelperHw<Family>::isBankOverrideRequired(const HardwareInfo &hwInfo, const ProductHelper &productHelper) const {
bool forceOverrideMemoryBankIndex = (GfxCoreHelper::getSubDevicesCount(&hwInfo) == 4 &&
GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo, productHelper));
if (DebugManager.flags.ForceMemoryBankIndexOverride.get() != -1) {
forceOverrideMemoryBankIndex = static_cast<bool>(DebugManager.flags.ForceMemoryBankIndexOverride.get());
}
return forceOverrideMemoryBankIndex;
}
template <>
bool GfxCoreHelperHw<Family>::isSipWANeeded(const HardwareInfo &hwInfo) const {
return hwInfo.platform.usRevId <= ProductHelper::get(hwInfo.platform.eProductFamily)->getHwRevIdFromStepping(REVISION_B, hwInfo);
}
template <>
bool GfxCoreHelperHw<Family>::isBufferSizeSuitableForCompression(const size_t size, const HardwareInfo &hwInfo) const {
if (DebugManager.flags.OverrideBufferSuitableForRenderCompression.get() != -1) {
return !!DebugManager.flags.OverrideBufferSuitableForRenderCompression.get();
}
if (ProductHelper::get(hwInfo.platform.eProductFamily)->allowStatelessCompression(hwInfo)) {
return true;
} else {
return size > KB;
}
}
template <>
const StackVec<uint32_t, 6> GfxCoreHelperHw<Family>::getThreadsPerEUConfigs() const {
return {4, 8};
}
template <>
void MemorySynchronizationCommands<Family>::setBarrierWaFlags(void *barrierCmd) {
auto &pipeControl = *reinterpret_cast<typename Family::PIPE_CONTROL *>(barrierCmd);
pipeControl.setCommandStreamerStallEnable(true);
pipeControl.setHdcPipelineFlush(true);
}
template <>
void MemorySynchronizationCommands<Family>::setBarrierExtraProperties(void *barrierCmd, PipeControlArgs &args) {
auto &pipeControl = *reinterpret_cast<typename Family::PIPE_CONTROL *>(barrierCmd);
pipeControl.setHdcPipelineFlush(args.hdcPipelineFlush);
pipeControl.setCompressionControlSurfaceCcsFlush(args.compressionControlSurfaceCcsFlush);
pipeControl.setWorkloadPartitionIdOffsetEnable(args.workloadPartitionOffset);
pipeControl.setAmfsFlushEnable(args.amfsFlushEnable);
if (DebugManager.flags.FlushAllCaches.get()) {
pipeControl.setHdcPipelineFlush(true);
pipeControl.setCompressionControlSurfaceCcsFlush(true);
}
if (DebugManager.flags.DoNotFlushCaches.get()) {
pipeControl.setHdcPipelineFlush(false);
pipeControl.setCompressionControlSurfaceCcsFlush(false);
}
}
template <>
void MemorySynchronizationCommands<Family>::setPostSyncExtraProperties(PipeControlArgs &args, const HardwareInfo &hwInfo) {
if (hwInfo.featureTable.flags.ftrLocalMemory) {
args.hdcPipelineFlush = true;
}
}
template <>
void MemorySynchronizationCommands<Family>::setCacheFlushExtraProperties(PipeControlArgs &args) {
args.hdcPipelineFlush = true;
}
template <>
bool GfxCoreHelperHw<Family>::unTypedDataPortCacheFlushRequired() const {
return false;
}
template <>
bool GfxCoreHelperHw<Family>::disableL3CacheForDebug(const HardwareInfo &) const {
return true;
}
template <>
uint32_t GfxCoreHelperHw<Family>::calculateAvailableThreadCount(const HardwareInfo &hwInfo, uint32_t grfCount) const {
if (grfCount > GrfConfig::DefaultGrfNumber) {
return hwInfo.gtSystemInfo.ThreadCount / 2u;
}
return hwInfo.gtSystemInfo.ThreadCount;
}
template class GfxCoreHelperHw<Family>;
template class FlatBatchBufferHelperHw<Family>;
template struct MemorySynchronizationCommands<Family>;
template struct LriHelper<Family>;
} // namespace NEO

View File

@@ -1,11 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#ifdef SUPPORT_XE_HP_SDV
#include "hw_cmds_xe_hp_sdv.h"
#endif

View File

@@ -1,152 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/commands/bxml_generator_glue.h"
#include "shared/source/helpers/debug_helpers.h"
#include "shared/source/xe_hp_core/hw_info.h"
#include <cstring>
#include <type_traits>
template <class T>
struct CmdParse;
namespace NEO {
struct XeHpCore {
#include "shared/source/generated/xe_hp_core/hw_cmds_generated_xe_hp_core.inl"
static constexpr uint32_t stateComputeModeForceNonCoherentMask = (0b11u << 3);
static constexpr uint32_t stateComputeModeLargeGrfModeMask = (1u << 15);
static constexpr uint32_t stateComputeModeForceDisableSupportMultiGpuPartialWrites = (1u << 2);
static constexpr uint32_t stateComputeModeForceDisableSupportMultiGpuAtomics = (1u << 1);
static constexpr uint32_t bcsEngineCount = 1u;
static constexpr uint32_t timestampPacketCount = 16u;
static constexpr bool isUsingL3Control = true;
static constexpr bool isUsingMediaSamplerDopClockGate = true;
static constexpr bool supportsSampler = true;
static constexpr bool isUsingGenericMediaStateClear = true;
static constexpr bool isUsingMiMemFence = false;
static constexpr bool isUsingMiSetPredicate = true;
static constexpr bool isUsingMiMathMocs = false;
struct FrontEndStateSupport {
static constexpr bool scratchSize = true;
static constexpr bool privateScratchSize = true;
static constexpr bool computeDispatchAllWalker = false;
static constexpr bool disableEuFusion = false;
static constexpr bool disableOverdispatch = true;
static constexpr bool singleSliceDispatchCcsMode = true;
};
struct StateComputeModeStateSupport {
static constexpr bool threadArbitrationPolicy = false;
static constexpr bool coherencyRequired = true;
static constexpr bool largeGrfMode = true;
static constexpr bool zPassAsyncComputeThreadLimit = false;
static constexpr bool pixelAsyncComputeThreadLimit = false;
static constexpr bool devicePreemptionMode = false;
};
struct StateBaseAddressStateSupport {
static constexpr bool globalAtomics = true;
static constexpr bool bindingTablePoolBaseAddress = true;
};
struct PipelineSelectStateSupport {
static constexpr bool mediaSamplerDopClockGate = true;
static constexpr bool systolicMode = true;
};
struct PreemptionDebugSupport {
static constexpr bool preemptionMode = true;
static constexpr bool stateSip = true;
static constexpr bool csrSurface = false;
};
struct DataPortBindlessSurfaceExtendedMessageDescriptor {
union {
struct {
uint32_t bindlessSurfaceOffset : 25;
uint32_t reserved : 6;
};
uint32_t packed;
};
DataPortBindlessSurfaceExtendedMessageDescriptor() {
packed = 0;
}
void setBindlessSurfaceOffset(uint32_t offsetInBindlessSurfaceHeapInBytes) {
bindlessSurfaceOffset = offsetInBindlessSurfaceHeapInBytes >> 6;
}
uint32_t getBindlessSurfaceOffsetToPatch() {
return bindlessSurfaceOffset << 6;
}
};
static_assert(sizeof(DataPortBindlessSurfaceExtendedMessageDescriptor) == sizeof(DataPortBindlessSurfaceExtendedMessageDescriptor::packed), "");
};
struct XeHpFamily : public XeHpCore {
using PARSE = CmdParse<XeHpFamily>;
using GfxFamily = XeHpFamily;
using WALKER_TYPE = COMPUTE_WALKER;
using VFE_STATE_TYPE = CFE_STATE;
using XY_BLOCK_COPY_BLT = typename GfxFamily::XY_BLOCK_COPY_BLT;
using XY_COPY_BLT = typename GfxFamily::XY_BLOCK_COPY_BLT;
using XY_COLOR_BLT = typename GfxFamily::XY_FAST_COLOR_BLT;
using MI_STORE_REGISTER_MEM_CMD = typename GfxFamily::MI_STORE_REGISTER_MEM;
using TimestampPacketType = uint32_t;
static const COMPUTE_WALKER cmdInitGpgpuWalker;
static const CFE_STATE cmdInitCfeState;
static const INTERFACE_DESCRIPTOR_DATA cmdInitInterfaceDescriptorData;
static const MI_BATCH_BUFFER_END cmdInitBatchBufferEnd;
static const MI_BATCH_BUFFER_START cmdInitBatchBufferStart;
static const PIPE_CONTROL cmdInitPipeControl;
static const STATE_COMPUTE_MODE cmdInitStateComputeMode;
static const _3DSTATE_BINDING_TABLE_POOL_ALLOC cmdInitStateBindingTablePoolAlloc;
static const MI_SEMAPHORE_WAIT cmdInitMiSemaphoreWait;
static const RENDER_SURFACE_STATE cmdInitRenderSurfaceState;
static const POSTSYNC_DATA cmdInitPostSyncData;
static const MI_SET_PREDICATE cmdInitSetPredicate;
static const MI_LOAD_REGISTER_IMM cmdInitLoadRegisterImm;
static const MI_LOAD_REGISTER_REG cmdInitLoadRegisterReg;
static const MI_LOAD_REGISTER_MEM cmdInitLoadRegisterMem;
static const MI_STORE_DATA_IMM cmdInitStoreDataImm;
static const MI_STORE_REGISTER_MEM cmdInitStoreRegisterMem;
static const MI_NOOP cmdInitNoop;
static const MI_REPORT_PERF_COUNT cmdInitReportPerfCount;
static const MI_ATOMIC cmdInitAtomic;
static const PIPELINE_SELECT cmdInitPipelineSelect;
static const MI_ARB_CHECK cmdInitArbCheck;
static const STATE_BASE_ADDRESS cmdInitStateBaseAddress;
static const MEDIA_SURFACE_STATE cmdInitMediaSurfaceState;
static const SAMPLER_STATE cmdInitSamplerState;
static const BINDING_TABLE_STATE cmdInitBindingTableState;
static const MI_USER_INTERRUPT cmdInitUserInterrupt;
static const MI_CONDITIONAL_BATCH_BUFFER_END cmdInitConditionalBatchBufferEnd;
static const L3_CONTROL cmdInitL3Control;
static const L3_FLUSH_ADDRESS_RANGE cmdInitL3FlushAddressRange;
static const MI_FLUSH_DW cmdInitMiFlushDw;
static const XY_BLOCK_COPY_BLT cmdInitXyBlockCopyBlt;
static const XY_BLOCK_COPY_BLT cmdInitXyCopyBlt;
static const XY_FAST_COLOR_BLT cmdInitXyColorBlt;
static const _3DSTATE_BTD cmd3dStateBtd;
static const _3DSTATE_BTD_BODY cmd3dStateBtdBody;
static const STATE_SIP cmdInitStateSip;
static constexpr bool isQwordInOrderCounter = false;
static constexpr bool walkerPostSyncSupport = true;
static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) {
return cmdSetBaseFamily == IGFX_XE_HP_CORE;
}
};
} // namespace NEO

View File

@@ -1,11 +0,0 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#ifdef SUPPORT_XE_HP_SDV
#include "hw_info_xehp.h"
#endif

View File

@@ -1,12 +0,0 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/xe_hp_core/hw_info_xe_hp_core.h"
namespace NEO {
const char *GfxFamilyMapper<IGFX_XE_HP_CORE>::name = "XE_HP_CORE";
} // namespace NEO

View File

@@ -1,20 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/helpers/hw_mapper.h"
namespace NEO {
struct XeHpFamily;
template <>
struct GfxFamilyMapper<IGFX_XE_HP_CORE> {
typedef XeHpFamily GfxFamily;
static const char *name;
};
} // namespace NEO

View File

@@ -1,20 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/helpers/gfx_core_helper.h"
#include "shared/source/image/image_surface_state.h"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
namespace NEO {
using Family = XeHpFamily;
// clang-format off
#include "shared/source/image/image_bdw_and_later.inl"
#include "shared/source/image/image_skl_and_later.inl"
// clang-format on
} // namespace NEO

View File

@@ -1,30 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_container/implicit_scaling.h"
#include "shared/source/command_container/implicit_scaling_xehp_and_later.inl"
#include "shared/source/helpers/api_specific_config.h"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
namespace NEO {
using Family = XeHpFamily;
template <>
bool ImplicitScalingDispatch<Family>::pipeControlStallRequired = true;
template <>
bool ImplicitScalingDispatch<Family>::platformSupportsImplicitScaling(const RootDeviceEnvironment &rootDeviceEnvironment) {
if (ApiSpecificConfig::getApiType() == ApiSpecificConfig::ApiType::OCL) {
return true;
} else {
return false;
}
}
template struct ImplicitScalingDispatch<Family>;
} // namespace NEO

View File

@@ -1,18 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/command_stream_receiver_with_aub_dump.inl"
#include "shared/source/os_interface/linux/device_command_stream.inl"
#include "shared/source/os_interface/linux/drm_command_stream.inl"
#include "shared/source/xe_hp_core/hw_cmds.h"
namespace NEO {
template class DeviceCommandStreamReceiver<XeHpFamily>;
template class DrmCommandStreamReceiver<XeHpFamily>;
template class CommandStreamReceiverWithAUBDump<DrmCommandStreamReceiver<XeHpFamily>>;
} // namespace NEO

View File

@@ -1,30 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/direct_submission/direct_submission_hw.inl"
#include "shared/source/direct_submission/direct_submission_prefetch_mitigation_xe_hp_core_and_later.inl"
#include "shared/source/direct_submission/direct_submission_prefetcher_xe_hp_core_and_later.inl"
#include "shared/source/direct_submission/direct_submission_xe_hp_core_and_later.inl"
#include "shared/source/direct_submission/dispatchers/blitter_dispatcher.inl"
#include "shared/source/direct_submission/dispatchers/dispatcher.inl"
#include "shared/source/direct_submission/dispatchers/render_dispatcher.inl"
#include "shared/source/direct_submission/linux/drm_direct_submission.inl"
#include "shared/source/xe_hp_core/hw_cmds.h"
namespace NEO {
using GfxFamily = XeHpFamily;
template class Dispatcher<GfxFamily>;
template class BlitterDispatcher<GfxFamily>;
template class RenderDispatcher<GfxFamily>;
template class DirectSubmissionHw<GfxFamily, BlitterDispatcher<GfxFamily>>;
template class DirectSubmissionHw<GfxFamily, RenderDispatcher<GfxFamily>>;
template class DrmDirectSubmission<GfxFamily, BlitterDispatcher<GfxFamily>>;
template class DrmDirectSubmission<GfxFamily, RenderDispatcher<GfxFamily>>;
} // namespace NEO

View File

@@ -1,149 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "aubstream/product_family.h"
namespace NEO {
template <>
uint32_t ProductHelperHw<gfxProduct>::getHwRevIdFromStepping(uint32_t stepping, const HardwareInfo &hwInfo) const {
switch (stepping) {
case REVISION_A0:
return 0x0;
case REVISION_A1:
return 0x1;
case REVISION_B:
return 0x4;
}
return CommonConstants::invalidStepping;
}
template <>
uint32_t ProductHelperHw<gfxProduct>::getProductConfigFromHwInfo(const HardwareInfo &hwInfo) const {
return AOT::XEHP_SDV;
}
template <>
uint32_t ProductHelperHw<gfxProduct>::getSteppingFromHwRevId(const HardwareInfo &hwInfo) const {
switch (hwInfo.platform.usRevId) {
case 0x0:
return REVISION_A0;
case 0x1:
return REVISION_A1;
case 0x4:
return REVISION_B;
}
return CommonConstants::invalidStepping;
}
template <>
bool ProductHelperHw<gfxProduct>::isMaxThreadsForWorkgroupWARequired(const HardwareInfo &hwInfo) const {
uint32_t stepping = getSteppingFromHwRevId(hwInfo);
return REVISION_B > stepping;
}
template <>
void ProductHelperHw<gfxProduct>::adjustSamplerState(void *sampler, const HardwareInfo &hwInfo) const {
using SAMPLER_STATE = typename XeHpFamily::SAMPLER_STATE;
auto samplerState = reinterpret_cast<SAMPLER_STATE *>(sampler);
if (DebugManager.flags.ForceSamplerLowFilteringPrecision.get()) {
samplerState->setLowQualityFilter(SAMPLER_STATE::LOW_QUALITY_FILTER_ENABLE);
}
}
template <>
std::string ProductHelperHw<gfxProduct>::getDeviceMemoryName() const {
return "HBM";
}
template <>
bool ProductHelperHw<gfxProduct>::isDirectSubmissionSupported(const HardwareInfo &hwInfo) const {
if (hwInfo.platform.usRevId < ProductHelper::get(hwInfo.platform.eProductFamily)->getHwRevIdFromStepping(REVISION_B, hwInfo)) {
return false;
}
return true;
}
template <>
bool ProductHelperHw<gfxProduct>::isDisableOverdispatchAvailable(const HardwareInfo &hwInfo) const {
return getSteppingFromHwRevId(hwInfo) >= REVISION_B;
}
template <>
bool ProductHelperHw<gfxProduct>::allowCompression(const HardwareInfo &hwInfo) const {
if (hwInfo.gtSystemInfo.EUCount == 256u) {
return false;
}
return true;
}
template <>
bool ProductHelperHw<gfxProduct>::allowStatelessCompression(const HardwareInfo &hwInfo) const {
if (!NEO::ApiSpecificConfig::isStatelessCompressionSupported()) {
return false;
}
if (DebugManager.flags.EnableStatelessCompression.get() != -1) {
return static_cast<bool>(DebugManager.flags.EnableStatelessCompression.get());
}
if (!hwInfo.capabilityTable.ftrRenderCompressedBuffers) {
return false;
}
if (GfxCoreHelper::getSubDevicesCount(&hwInfo) > 1) {
return DebugManager.flags.EnableMultiTileCompression.get() > 0 ? true : false;
}
if (hwInfo.platform.usRevId < getHwRevIdFromStepping(REVISION_B, hwInfo)) {
return false;
}
return true;
}
template <>
LocalMemoryAccessMode ProductHelperHw<gfxProduct>::getDefaultLocalMemoryAccessMode(const HardwareInfo &hwInfo) const {
if (GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo, *this)) {
return LocalMemoryAccessMode::CpuAccessDisallowed;
}
return LocalMemoryAccessMode::Default;
}
template <>
std::pair<bool, bool> ProductHelperHw<gfxProduct>::isPipeControlPriorToNonPipelinedStateCommandsWARequired(const HardwareInfo &hwInfo, bool isRcs) const {
auto isBasicWARequired = true;
auto isExtendedWARequired = hwInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled > 1;
if (DebugManager.flags.ProgramExtendedPipeControlPriorToNonPipelinedStateCommand.get() != -1) {
isExtendedWARequired = DebugManager.flags.ProgramExtendedPipeControlPriorToNonPipelinedStateCommand.get();
}
return {isBasicWARequired, isExtendedWARequired};
}
template <>
bool ProductHelperHw<gfxProduct>::heapInLocalMem(const HardwareInfo &hwInfo) const {
return !GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo, *this);
}
template <>
bool ProductHelperHw<gfxProduct>::extraParametersInvalid(const HardwareInfo &hwInfo) const {
return GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo, *this);
}
template <>
bool ProductHelperHw<gfxProduct>::isBlitterForImagesSupported() const {
return true;
}
template <>
bool ProductHelperHw<gfxProduct>::isImplicitScalingSupported(const HardwareInfo &hwInfo) const {
return true;
}
template <>
std::optional<aub_stream::ProductFamily> ProductHelperHw<gfxProduct>::getAubStreamProductFamily() const {
return aub_stream::ProductFamily::XeHpSdv;
};
} // namespace NEO

View File

@@ -1,52 +0,0 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/xe_hp_core/hw_cmds.h"
namespace NEO {
struct XeHpFamily;
using Family = XeHpFamily;
} // namespace NEO
#include "shared/source/helpers/gfx_core_helper.h"
#include "shared/source/helpers/preamble_xehp_and_later.inl"
namespace NEO {
template <>
void PreambleHelper<Family>::appendProgramVFEState(const RootDeviceEnvironment &rootDeviceEnvironment, const StreamProperties &streamProperties, void *cmd) {
auto &gfxCoreHelper = rootDeviceEnvironment.getHelper<GfxCoreHelper>();
auto &hwInfo = *rootDeviceEnvironment.getHardwareInfo();
auto command = static_cast<typename Family::CFE_STATE *>(cmd);
command->setComputeOverdispatchDisable(streamProperties.frontEndState.disableOverdispatch.value == 1);
command->setSingleSliceDispatchCcsMode(streamProperties.frontEndState.singleSliceDispatchCcsMode.value == 1);
if (DebugManager.flags.CFEComputeOverdispatchDisable.get() != -1) {
command->setComputeOverdispatchDisable(DebugManager.flags.CFEComputeOverdispatchDisable.get());
}
if (DebugManager.flags.CFEWeightedDispatchModeDisable.get() != -1) {
command->setWeightedDispatchModeDisable(DebugManager.flags.CFEWeightedDispatchModeDisable.get());
}
if (DebugManager.flags.CFESingleSliceDispatchCCSMode.get() != -1) {
command->setSingleSliceDispatchCcsMode(DebugManager.flags.CFESingleSliceDispatchCCSMode.get());
}
if (!gfxCoreHelper.isFusedEuDispatchEnabled(hwInfo, false)) {
command->setFusedEuDispatch(true);
}
command->setNumberOfWalkers(1);
if (DebugManager.flags.CFENumberOfWalkers.get() != -1) {
command->setNumberOfWalkers(DebugManager.flags.CFENumberOfWalkers.get());
}
}
template struct PreambleHelper<Family>;
} // namespace NEO

View File

@@ -1,25 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/preemption.h"
#include "shared/source/command_stream/preemption.inl"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
namespace NEO {
using GfxFamily = XeHpFamily;
#include "shared/source/command_stream/preemption_xehp_and_later.inl"
template void PreemptionHelper::programCmdStream<GfxFamily>(LinearStream &cmdStream, PreemptionMode newPreemptionMode,
PreemptionMode oldPreemptionMode, GraphicsAllocation *preemptionCsr);
template size_t PreemptionHelper::getRequiredCmdStreamSize<GfxFamily>(PreemptionMode newPreemptionMode, PreemptionMode oldPreemptionMode);
template size_t PreemptionHelper::getPreemptionWaCsSize<GfxFamily>(const Device &device);
template void PreemptionHelper::applyPreemptionWaCmdsBegin<GfxFamily>(LinearStream *pCommandStream, const Device &device);
template void PreemptionHelper::applyPreemptionWaCmdsEnd<GfxFamily>(LinearStream *pCommandStream, const Device &device);
template void PreemptionHelper::programInterfaceDescriptorDataPreemption<GfxFamily>(INTERFACE_DESCRIPTOR_DATA<GfxFamily> *idd, PreemptionMode preemptionMode);
} // namespace NEO

View File

@@ -1,18 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/helpers/state_base_address_xehp_and_later.inl"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
namespace NEO {
template <>
void StateBaseAddressHelper<XeHpFamily>::appendExtraCacheSettings(StateBaseAddressHelperArgs<XeHpFamily> &args) {
}
template struct StateBaseAddressHelper<XeHpFamily>;
} // namespace NEO

View File

@@ -1,32 +0,0 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/command_stream_receiver_with_aub_dump.inl"
#include "shared/source/command_stream/tbx_command_stream_receiver_hw.h"
#include "shared/source/command_stream/tbx_command_stream_receiver_hw.inl"
#include "shared/source/helpers/array_count.h"
#include "shared/source/helpers/populate_factory.h"
#include "shared/source/memory_manager/memory_banks.h"
#include "shared/source/memory_manager/memory_pool.h"
#include "shared/source/xe_hp_core/hw_cmds.h"
namespace NEO {
typedef XeHpFamily Family;
static auto gfxCore = IGFX_XE_HP_CORE;
template <>
void populateFactoryTable<TbxCommandStreamReceiverHw<Family>>() {
extern TbxCommandStreamReceiverCreateFunc tbxCommandStreamReceiverFactory[IGFX_MAX_CORE];
UNRECOVERABLE_IF(!isInRange(gfxCore, tbxCommandStreamReceiverFactory));
tbxCommandStreamReceiverFactory[gfxCore] = TbxCommandStreamReceiverHw<Family>::create;
}
#include "shared/source/command_stream/tbx_command_stream_receiver_xehp_and_later.inl"
template class TbxCommandStreamReceiverHw<Family>;
template class CommandStreamReceiverWithAUBDump<TbxCommandStreamReceiverHw<Family>>;
} // namespace NEO

View File

@@ -1,18 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_stream/command_stream_receiver_with_aub_dump.inl"
#include "shared/source/os_interface/windows/device_command_stream.inl"
#include "shared/source/os_interface/windows/wddm_device_command_stream.inl"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
namespace NEO {
template class DeviceCommandStreamReceiver<XeHpFamily>;
template class WddmCommandStreamReceiver<XeHpFamily>;
template class CommandStreamReceiverWithAUBDump<WddmCommandStreamReceiver<XeHpFamily>>;
} // namespace NEO

View File

@@ -1,30 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/direct_submission/direct_submission_hw.inl"
#include "shared/source/direct_submission/direct_submission_prefetch_mitigation_xe_hp_core_and_later.inl"
#include "shared/source/direct_submission/direct_submission_prefetcher_xe_hp_core_and_later.inl"
#include "shared/source/direct_submission/direct_submission_xe_hp_core_and_later.inl"
#include "shared/source/direct_submission/dispatchers/blitter_dispatcher.inl"
#include "shared/source/direct_submission/dispatchers/dispatcher.inl"
#include "shared/source/direct_submission/dispatchers/render_dispatcher.inl"
#include "shared/source/direct_submission/windows/wddm_direct_submission.inl"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
namespace NEO {
using GfxFamily = XeHpFamily;
template class Dispatcher<GfxFamily>;
template class BlitterDispatcher<GfxFamily>;
template class RenderDispatcher<GfxFamily>;
template class DirectSubmissionHw<GfxFamily, BlitterDispatcher<GfxFamily>>;
template class DirectSubmissionHw<GfxFamily, RenderDispatcher<GfxFamily>>;
template class WddmDirectSubmission<GfxFamily, BlitterDispatcher<GfxFamily>>;
template class WddmDirectSubmission<GfxFamily, RenderDispatcher<GfxFamily>>;
} // namespace NEO

View File

@@ -1,14 +0,0 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/helpers/windows/gmm_callbacks_tgllp_and_later.inl"
#include "shared/source/xe_hp_core/hw_cmds_base.h"
namespace NEO {
template struct DeviceCallbacks<XeHpFamily>;
template struct TTCallbacks<XeHpFamily>;
} // namespace NEO