Add post sync capability to implicit scaling barrier

Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
This commit is contained in:
Zbigniew Zdanowicz
2021-11-10 19:56:42 +00:00
committed by Compute-Runtime-Automation
parent d15eed035b
commit 3b556a5e44
13 changed files with 726 additions and 32 deletions

View File

@@ -9,6 +9,7 @@
#include "shared/source/helpers/aligned_memory.h"
#include "shared/source/os_interface/os_interface.h"
#include "shared/test/common/helpers/default_hw_info.h"
void ImplicitScalingFixture::SetUp() {
CommandEncodeStatesFixture::SetUp();
@@ -24,6 +25,8 @@ void ImplicitScalingFixture::SetUp() {
commandStream.replaceBuffer(alignedMemory, bufferSize);
commandStream.replaceGraphicsAllocation(&cmdBufferAlloc);
testHardwareInfo = *defaultHwInfo;
}
void ImplicitScalingFixture::TearDown() {