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Flush instruction cache.
Change-Id: I2ae0c40ae99cd8e0c126c8588e6df293e29d3db3 Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
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sys_ocldev
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3d062620a7
@@ -157,6 +157,7 @@ typename Family::PIPE_CONTROL *PipeControlHelper<Family>::obtainPipeControlAndPr
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pipeControl->setAddress(static_cast<uint32_t>(gpuAddress & 0x0000FFFFFFFFULL));
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pipeControl->setAddressHigh(static_cast<uint32_t>(gpuAddress >> 32));
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pipeControl->setDcFlushEnable(dcFlush);
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pipeControl->setInstructionCacheInvalidateEnable(true);
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if (operation == POST_SYNC_OPERATION::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA) {
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pipeControl->setImmediateData(immediateData);
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}
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