mirror of
https://github.com/intel/compute-runtime.git
synced 2026-01-09 06:23:01 +08:00
Revert "Create single point for selecting engine for builtin ops"
This reverts commit 6513bd371a69cb821ea45c7c1964ea1f51dd75b2. Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
This commit is contained in:
committed by
Compute-Runtime-Automation
parent
ea33fa5707
commit
3e6b3cd780
@@ -144,17 +144,13 @@ CommandStreamReceiver *CommandQueue::getBcsForAuxTranslation() const {
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return nullptr;
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}
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CommandStreamReceiver &CommandQueue::selectCsrForBuiltinOperation(cl_command_type cmdType, const MultiDispatchInfo &dispatchInfo) const {
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const bool blitAllowed = blitEnqueueAllowed(cmdType, dispatchInfo.peekBuiltinOpParams());
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const bool blitPreferred = blitEnqueuePreferred(cmdType, dispatchInfo.peekBuiltinOpParams());
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const bool blitRequired = isCopyOnly;
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const bool blit = blitAllowed && (blitPreferred || blitRequired);
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if (blit) {
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return *bcsEngine->commandStreamReceiver;
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} else {
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return getGpgpuCommandStreamReceiver();
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CommandStreamReceiver &CommandQueue::getCommandStreamReceiver(bool blitAllowed) const {
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if (blitAllowed) {
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auto csr = getBcsCommandStreamReceiver();
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UNRECOVERABLE_IF(!csr);
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return *csr;
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}
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return getGpgpuCommandStreamReceiver();
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}
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Device &CommandQueue::getDevice() const noexcept {
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@@ -725,17 +721,12 @@ bool CommandQueue::queueDependenciesClearRequired() const {
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return isOOQEnabled() || DebugManager.flags.OmitTimestampPacketDependencies.get();
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}
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bool CommandQueue::blitEnqueueAllowed(cl_command_type cmdType, const BuiltinOpParams ¶ms) const {
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if (bcsEngine == nullptr) {
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return false;
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}
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bool CommandQueue::blitEnqueueAllowed(cl_command_type cmdType) const {
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auto blitterSupported = bcsEngine != nullptr;
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bool allowed = getGpgpuCommandStreamReceiver().peekTimestampPacketWriteEnabled() || this->isCopyOnly;
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bool blitEnqueueAllowed = getGpgpuCommandStreamReceiver().peekTimestampPacketWriteEnabled() || this->isCopyOnly;
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if (DebugManager.flags.EnableBlitterForEnqueueOperations.get() != -1) {
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allowed = DebugManager.flags.EnableBlitterForEnqueueOperations.get();
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}
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if (!allowed) {
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return false;
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blitEnqueueAllowed = DebugManager.flags.EnableBlitterForEnqueueOperations.get();
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}
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switch (cmdType) {
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@@ -746,14 +737,10 @@ bool CommandQueue::blitEnqueueAllowed(cl_command_type cmdType, const BuiltinOpPa
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case CL_COMMAND_WRITE_BUFFER_RECT:
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case CL_COMMAND_COPY_BUFFER_RECT:
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case CL_COMMAND_SVM_MEMCPY:
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return true;
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case CL_COMMAND_READ_IMAGE:
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return blitEnqueueImageAllowed(¶ms.srcOffset[0], ¶ms.size[0], *static_cast<Image *>(params.srcMemObj));
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case CL_COMMAND_WRITE_IMAGE:
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return blitEnqueueImageAllowed(¶ms.dstOffset[0], ¶ms.size[0], *static_cast<Image *>(params.dstMemObj));
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case CL_COMMAND_COPY_IMAGE:
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return blitEnqueueImageAllowed(¶ms.srcOffset[0], ¶ms.size[0], *static_cast<Image *>(params.srcMemObj)) &&
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blitEnqueueImageAllowed(¶ms.dstOffset[0], ¶ms.size[0], *static_cast<Image *>(params.dstMemObj));
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return blitterSupported && blitEnqueueAllowed;
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default:
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return false;
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}
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@@ -784,7 +771,7 @@ bool CommandQueue::blitEnqueuePreferred(cl_command_type cmdType, const BuiltinOp
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return true;
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}
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bool CommandQueue::blitEnqueueImageAllowed(const size_t *origin, const size_t *region, const Image &image) const {
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bool CommandQueue::blitEnqueueImageAllowed(const size_t *origin, const size_t *region, const Image &image) {
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const auto &hwInfo = device->getHardwareInfo();
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const auto &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily);
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auto blitEnqueueImageAllowed = hwHelper.isBlitterForImagesSupported(hwInfo);
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@@ -224,7 +224,7 @@ class CommandQueue : public BaseObject<_cl_command_queue> {
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MOCKABLE_VIRTUAL CommandStreamReceiver &getGpgpuCommandStreamReceiver() const;
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CommandStreamReceiver *getBcsCommandStreamReceiver() const;
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CommandStreamReceiver *getBcsForAuxTranslation() const;
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MOCKABLE_VIRTUAL CommandStreamReceiver &selectCsrForBuiltinOperation(cl_command_type cmdType, const MultiDispatchInfo &dispatchInfo) const;
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MOCKABLE_VIRTUAL CommandStreamReceiver &getCommandStreamReceiver(bool blitAllowed) const;
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Device &getDevice() const noexcept;
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ClDevice &getClDevice() const { return *device; }
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Context &getContext() const { return *context; }
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@@ -353,9 +353,9 @@ class CommandQueue : public BaseObject<_cl_command_queue> {
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cl_uint numEventsInWaitList, const cl_event *eventWaitList);
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void providePerformanceHint(TransferProperties &transferProperties);
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bool queueDependenciesClearRequired() const;
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bool blitEnqueueAllowed(cl_command_type cmdType, const BuiltinOpParams ¶ms) const;
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bool blitEnqueueAllowed(cl_command_type cmdType) const;
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bool blitEnqueuePreferred(cl_command_type cmdType, const BuiltinOpParams &builtinOpParams) const;
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MOCKABLE_VIRTUAL bool blitEnqueueImageAllowed(const size_t *origin, const size_t *region, const Image &image) const;
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MOCKABLE_VIRTUAL bool blitEnqueueImageAllowed(const size_t *origin, const size_t *region, const Image &image);
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void aubCaptureHook(bool &blocking, bool &clearAllDependencies, const MultiDispatchInfo &multiDispatchInfo);
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virtual bool obtainTimestampPacketForCacheFlush(bool isCacheFlushRequired) const = 0;
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void waitForLatestTaskCount();
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@@ -365,13 +365,10 @@ class CommandQueueHw : public CommandQueue {
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cl_event *event);
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template <uint32_t cmdType, size_t surfaceCount>
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void dispatchBcsOrGpgpuEnqueue(MultiDispatchInfo &dispatchInfo, Surface *(&surfaces)[surfaceCount],
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EBuiltInOps::Type builtInOperation, cl_uint numEventsInWaitList, const cl_event *eventWaitList, cl_event *event,
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bool blocking, CommandStreamReceiver &csr);
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void dispatchBcsOrGpgpuEnqueue(MultiDispatchInfo &dispatchInfo, Surface *(&surfaces)[surfaceCount], EBuiltInOps::Type builtInOperation, cl_uint numEventsInWaitList, const cl_event *eventWaitList, cl_event *event, bool blocking, bool blitAllowed);
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template <uint32_t cmdType>
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void enqueueBlit(const MultiDispatchInfo &multiDispatchInfo, cl_uint numEventsInWaitList, const cl_event *eventWaitList,
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cl_event *event, bool blocking, CommandStreamReceiver &bcsCsr);
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void enqueueBlit(const MultiDispatchInfo &multiDispatchInfo, cl_uint numEventsInWaitList, const cl_event *eventWaitList, cl_event *event, bool blocking);
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template <uint32_t commandType>
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CompletionStamp enqueueNonBlocked(Surface **surfacesForResidency,
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@@ -1162,9 +1162,9 @@ size_t CommandQueueHw<GfxFamily>::calculateHostPtrSizeForImage(const size_t *reg
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template <typename GfxFamily>
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template <uint32_t cmdType>
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void CommandQueueHw<GfxFamily>::enqueueBlit(const MultiDispatchInfo &multiDispatchInfo, cl_uint numEventsInWaitList,
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const cl_event *eventWaitList, cl_event *event, bool blocking, CommandStreamReceiver &bcsCsr) {
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void CommandQueueHw<GfxFamily>::enqueueBlit(const MultiDispatchInfo &multiDispatchInfo, cl_uint numEventsInWaitList, const cl_event *eventWaitList, cl_event *event, bool blocking) {
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auto commandStreamRecieverOwnership = getGpgpuCommandStreamReceiver().obtainUniqueOwnership();
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auto &bcsCsr = *getBcsCommandStreamReceiver();
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EventsRequest eventsRequest(numEventsInWaitList, eventWaitList, event);
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EventBuilder eventBuilder;
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@@ -1251,11 +1251,13 @@ void CommandQueueHw<GfxFamily>::enqueueBlit(const MultiDispatchInfo &multiDispat
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template <typename GfxFamily>
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template <uint32_t cmdType, size_t surfaceCount>
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void CommandQueueHw<GfxFamily>::dispatchBcsOrGpgpuEnqueue(MultiDispatchInfo &dispatchInfo, Surface *(&surfaces)[surfaceCount], EBuiltInOps::Type builtInOperation,
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cl_uint numEventsInWaitList, const cl_event *eventWaitList, cl_event *event, bool blocking, CommandStreamReceiver &csr) {
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const bool blit = EngineHelpers::isBcs(csr.getOsContext().getEngineType());
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void CommandQueueHw<GfxFamily>::dispatchBcsOrGpgpuEnqueue(MultiDispatchInfo &dispatchInfo, Surface *(&surfaces)[surfaceCount], EBuiltInOps::Type builtInOperation, cl_uint numEventsInWaitList, const cl_event *eventWaitList, cl_event *event, bool blocking, bool blitAllowed) {
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const bool blitPreferred = blitEnqueuePreferred(cmdType, dispatchInfo.peekBuiltinOpParams());
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const bool blitRequired = isCopyOnly;
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const bool blit = blitAllowed && (blitPreferred || blitRequired);
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if (blit) {
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enqueueBlit<cmdType>(dispatchInfo, numEventsInWaitList, eventWaitList, event, blocking, csr);
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enqueueBlit<cmdType>(dispatchInfo, numEventsInWaitList, eventWaitList, event, blocking);
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} else {
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auto &builder = BuiltInDispatchBuilderOp::getBuiltinDispatchInfoBuilder(builtInOperation,
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this->getClDevice());
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@@ -47,9 +47,8 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBuffer(
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MemObjSurface s1(srcBuffer);
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MemObjSurface s2(dstBuffer);
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Surface *surfaces[] = {&s1, &s2};
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_COPY_BUFFER, dispatchInfo);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_COPY_BUFFER>(dispatchInfo, surfaces, eBuiltInOpsType, numEventsInWaitList, eventWaitList, event, false, csr);
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auto blitAllowed = blitEnqueueAllowed(CL_COMMAND_COPY_BUFFER);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_COPY_BUFFER>(dispatchInfo, surfaces, eBuiltInOpsType, numEventsInWaitList, eventWaitList, event, false, blitAllowed);
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return CL_SUCCESS;
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}
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@@ -54,8 +54,8 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyBufferRect(
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dc.dstSlicePitch = dstSlicePitch;
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MultiDispatchInfo dispatchInfo(dc);
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_COPY_BUFFER_RECT, dispatchInfo);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_COPY_BUFFER_RECT>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, false, csr);
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auto blitAllowed = blitEnqueueAllowed(CL_COMMAND_COPY_BUFFER_RECT);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_COPY_BUFFER_RECT>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, false, blitAllowed);
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return CL_SUCCESS;
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}
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@@ -50,8 +50,10 @@ cl_int CommandQueueHw<GfxFamily>::enqueueCopyImage(
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}
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MultiDispatchInfo dispatchInfo(dc);
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_COPY_IMAGE, dispatchInfo);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_COPY_IMAGE>(dispatchInfo, surfaces, EBuiltInOps::CopyImageToImage3d, numEventsInWaitList, eventWaitList, event, false, csr);
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cl_command_type cmdType = CL_COMMAND_COPY_IMAGE;
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auto blitAllowed = blitEnqueueAllowed(cmdType) && blitEnqueueImageAllowed(srcOrigin, region, *srcImage) && blitEnqueueImageAllowed(dstOrigin, region, *dstImage);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_COPY_IMAGE>(dispatchInfo, surfaces, EBuiltInOps::CopyImageToImage3d, numEventsInWaitList, eventWaitList, event, false, blitAllowed);
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return CL_SUCCESS;
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}
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@@ -36,6 +36,12 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBuffer(
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cl_event *event) {
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const cl_command_type cmdType = CL_COMMAND_READ_BUFFER;
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auto blitAllowed = blitEnqueueAllowed(cmdType);
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auto &csr = getCommandStreamReceiver(blitAllowed);
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if (nullptr == mapAllocation) {
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notifyEnqueueReadBuffer(buffer, !!blockingRead, EngineHelpers::isBcs(csr.getOsContext().getEngineType()));
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}
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auto rootDeviceIndex = getDevice().getRootDeviceIndex();
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bool isMemTransferNeeded = buffer->isMemObjZeroCopy() ? buffer->checkIfMemoryTransferIsRequired(offset, 0, ptr, cmdType) : true;
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@@ -61,9 +67,6 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBuffer(
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}
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if (isCpuCopyAllowed) {
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if (nullptr == mapAllocation) {
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notifyEnqueueReadBuffer(buffer, !!blockingRead, false);
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}
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if (isMemTransferNeeded) {
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return enqueueReadWriteBufferOnCpuWithMemoryTransfer(cmdType, buffer, offset, size, ptr,
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numEventsInWaitList, eventWaitList, event);
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@@ -99,7 +102,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBuffer(
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} else {
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surfaces[1] = &hostPtrSurf;
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if (size != 0) {
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bool status = getGpgpuCommandStreamReceiver().createAllocationForHostSurface(hostPtrSurf, true);
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bool status = csr.createAllocationForHostSurface(hostPtrSurf, true);
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if (!status) {
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return CL_OUT_OF_RESOURCES;
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}
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@@ -125,12 +128,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBuffer(
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context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL, CL_ENQUEUE_READ_BUFFER_DOESNT_MEET_ALIGNMENT_RESTRICTIONS, ptr, size, MemoryConstants::pageSize, MemoryConstants::pageSize);
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}
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}
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_READ_BUFFER, dispatchInfo);
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if (nullptr == mapAllocation) {
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notifyEnqueueReadBuffer(buffer, !!blockingRead, EngineHelpers::isBcs(csr.getOsContext().getEngineType()));
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}
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingRead, csr);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingRead, blitAllowed);
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return CL_SUCCESS;
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}
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@@ -59,11 +59,13 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
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MemObjSurface bufferSurf(buffer);
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HostPtrSurface hostPtrSurf(dstPtr, hostPtrSize);
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Surface *surfaces[] = {&bufferSurf, &hostPtrSurf};
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auto blitAllowed = blitEnqueueAllowed(cmdType);
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if (region[0] != 0 &&
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region[1] != 0 &&
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region[2] != 0) {
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bool status = getGpgpuCommandStreamReceiver().createAllocationForHostSurface(hostPtrSurf, true);
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auto &csr = getCommandStreamReceiver(blitAllowed);
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bool status = csr.createAllocationForHostSurface(hostPtrSurf, true);
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if (!status) {
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return CL_OUT_OF_RESOURCES;
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}
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@@ -87,8 +89,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadBufferRect(
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dc.dstSlicePitch = hostSlicePitch;
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MultiDispatchInfo dispatchInfo(dc);
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_READ_BUFFER_RECT, dispatchInfo);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER_RECT>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingRead, csr);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER_RECT>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingRead, blitAllowed);
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if (context->isProvidingPerformanceHints()) {
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context->providePerformanceHintForMemoryTransfer(CL_COMMAND_READ_BUFFER_RECT, true, static_cast<cl_mem>(buffer), ptr);
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@@ -41,6 +41,12 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadImage(
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const cl_event *eventWaitList,
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cl_event *event) {
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cl_command_type cmdType = CL_COMMAND_READ_IMAGE;
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auto blitAllowed = blitEnqueueAllowed(cmdType) && blitEnqueueImageAllowed(origin, region, *srcImage);
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auto &csr = getCommandStreamReceiver(blitAllowed);
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if (nullptr == mapAllocation) {
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notifyEnqueueReadImage(srcImage, static_cast<bool>(blockingRead), EngineHelpers::isBcs(csr.getOsContext().getEngineType()));
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}
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auto isMemTransferNeeded = true;
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if (srcImage->isMemObjZeroCopy()) {
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@@ -72,7 +78,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadImage(
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if (region[0] != 0 &&
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region[1] != 0 &&
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region[2] != 0) {
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bool status = getGpgpuCommandStreamReceiver().createAllocationForHostSurface(hostPtrSurf, true);
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bool status = csr.createAllocationForHostSurface(hostPtrSurf, true);
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if (!status) {
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return CL_OUT_OF_RESOURCES;
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}
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@@ -99,11 +105,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueReadImage(
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auto eBuiltInOps = EBuiltInOps::CopyImage3dToBuffer;
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MultiDispatchInfo dispatchInfo(dc);
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_READ_IMAGE, dispatchInfo);
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if (nullptr == mapAllocation) {
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notifyEnqueueReadImage(srcImage, static_cast<bool>(blockingRead), EngineHelpers::isBcs(csr.getOsContext().getEngineType()));
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}
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_IMAGE>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingRead == CL_TRUE, csr);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_IMAGE>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingRead == CL_TRUE, blitAllowed);
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if (context->isProvidingPerformanceHints()) {
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if (!isL3Capable(ptr, hostPtrSize)) {
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@@ -126,8 +126,8 @@ cl_int CommandQueueHw<GfxFamily>::enqueueSVMMap(cl_bool blockingMap,
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dc.unifiedMemoryArgsRequireMemSync = externalAppCall;
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MultiDispatchInfo dispatchInfo(dc);
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_READ_BUFFER, dispatchInfo);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER>(dispatchInfo, surfaces, EBuiltInOps::CopyBufferToBuffer, numEventsInWaitList, eventWaitList, event, blocking, csr);
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auto blitAllowed = blitEnqueueAllowed(CL_COMMAND_READ_BUFFER);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER>(dispatchInfo, surfaces, EBuiltInOps::CopyBufferToBuffer, numEventsInWaitList, eventWaitList, event, blocking, blitAllowed);
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if (event) {
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castToObjectOrAbort<Event>(*event)->setCmdType(CL_COMMAND_SVM_MAP);
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@@ -210,8 +210,8 @@ cl_int CommandQueueHw<GfxFamily>::enqueueSVMUnmap(void *svmPtr,
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dc.unifiedMemoryArgsRequireMemSync = externalAppCall;
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MultiDispatchInfo dispatchInfo(dc);
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CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_READ_BUFFER, dispatchInfo);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER>(dispatchInfo, surfaces, EBuiltInOps::CopyBufferToBuffer, numEventsInWaitList, eventWaitList, event, false, csr);
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auto blitAllowed = blitEnqueueAllowed(CL_COMMAND_READ_BUFFER);
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dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER>(dispatchInfo, surfaces, EBuiltInOps::CopyBufferToBuffer, numEventsInWaitList, eventWaitList, event, false, blitAllowed);
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if (event) {
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castToObjectOrAbort<Event>(*event)->setCmdType(CL_COMMAND_SVM_UNMAP);
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@@ -330,29 +330,32 @@ cl_int CommandQueueHw<GfxFamily>::enqueueSVMMemcpy(cl_bool blockingCopy,
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if (copyType == SvmToHost) {
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GeneralSurface srcSvmSurf(srcSvmData->gpuAllocations.getGraphicsAllocation(rootDeviceIndex));
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HostPtrSurface dstHostPtrSurf(dstPtr, size);
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cmdType = CL_COMMAND_READ_BUFFER;
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auto blitAllowed = blitEnqueueAllowed(cmdType);
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if (size != 0) {
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bool status = getGpgpuCommandStreamReceiver().createAllocationForHostSurface(dstHostPtrSurf, true);
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auto &csr = getCommandStreamReceiver(blitAllowed);
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bool status = csr.createAllocationForHostSurface(dstHostPtrSurf, true);
|
||||
if (!status) {
|
||||
return CL_OUT_OF_RESOURCES;
|
||||
}
|
||||
dstPtr = reinterpret_cast<void *>(dstHostPtrSurf.getAllocation()->getGpuAddress());
|
||||
notifyEnqueueSVMMemcpy(srcSvmData->gpuAllocations.getGraphicsAllocation(rootDeviceIndex), !!blockingCopy, EngineHelpers::isBcs(csr.getOsContext().getEngineType()));
|
||||
}
|
||||
setOperationParams(operationParams, size, srcPtr, srcSvmData->gpuAllocations.getGraphicsAllocation(rootDeviceIndex), dstPtr, dstHostPtrSurf.getAllocation());
|
||||
surfaces[0] = &srcSvmSurf;
|
||||
surfaces[1] = &dstHostPtrSurf;
|
||||
|
||||
dispatchInfo.setBuiltinOpParams(operationParams);
|
||||
|
||||
CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_READ_BUFFER, dispatchInfo);
|
||||
notifyEnqueueSVMMemcpy(srcSvmData->gpuAllocations.getGraphicsAllocation(rootDeviceIndex), !!blockingCopy, EngineHelpers::isBcs(csr.getOsContext().getEngineType()));
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER>(dispatchInfo, surfaces, builtInType, numEventsInWaitList, eventWaitList, event, blockingCopy, csr);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_READ_BUFFER>(dispatchInfo, surfaces, builtInType, numEventsInWaitList, eventWaitList, event, blockingCopy, blitAllowed);
|
||||
|
||||
} else if (copyType == HostToSvm) {
|
||||
HostPtrSurface srcHostPtrSurf(const_cast<void *>(srcPtr), size);
|
||||
GeneralSurface dstSvmSurf(dstSvmData->gpuAllocations.getGraphicsAllocation(rootDeviceIndex));
|
||||
cmdType = CL_COMMAND_WRITE_BUFFER;
|
||||
auto blitAllowed = blitEnqueueAllowed(cmdType);
|
||||
if (size != 0) {
|
||||
bool status = getGpgpuCommandStreamReceiver().createAllocationForHostSurface(srcHostPtrSurf, false);
|
||||
auto &csr = getCommandStreamReceiver(blitAllowed);
|
||||
bool status = csr.createAllocationForHostSurface(srcHostPtrSurf, false);
|
||||
if (!status) {
|
||||
return CL_OUT_OF_RESOURCES;
|
||||
}
|
||||
@@ -364,8 +367,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueSVMMemcpy(cl_bool blockingCopy,
|
||||
surfaces[1] = &srcHostPtrSurf;
|
||||
|
||||
dispatchInfo.setBuiltinOpParams(operationParams);
|
||||
CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_WRITE_BUFFER, dispatchInfo);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_BUFFER>(dispatchInfo, surfaces, builtInType, numEventsInWaitList, eventWaitList, event, blockingCopy, csr);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_BUFFER>(dispatchInfo, surfaces, builtInType, numEventsInWaitList, eventWaitList, event, blockingCopy, blitAllowed);
|
||||
|
||||
} else if (copyType == SvmToSvm) {
|
||||
GeneralSurface srcSvmSurf(srcSvmData->gpuAllocations.getGraphicsAllocation(rootDeviceIndex));
|
||||
@@ -376,15 +378,16 @@ cl_int CommandQueueHw<GfxFamily>::enqueueSVMMemcpy(cl_bool blockingCopy,
|
||||
surfaces[1] = &dstSvmSurf;
|
||||
|
||||
dispatchInfo.setBuiltinOpParams(operationParams);
|
||||
CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_SVM_MEMCPY, dispatchInfo);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_SVM_MEMCPY>(dispatchInfo, surfaces, builtInType, numEventsInWaitList, eventWaitList, event, blockingCopy, csr);
|
||||
auto blitAllowed = blitEnqueueAllowed(CL_COMMAND_SVM_MEMCPY);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_SVM_MEMCPY>(dispatchInfo, surfaces, builtInType, numEventsInWaitList, eventWaitList, event, blockingCopy, blitAllowed);
|
||||
|
||||
} else {
|
||||
HostPtrSurface srcHostPtrSurf(const_cast<void *>(srcPtr), size);
|
||||
HostPtrSurface dstHostPtrSurf(dstPtr, size);
|
||||
cmdType = CL_COMMAND_WRITE_BUFFER;
|
||||
auto blitAllowed = blitEnqueueAllowed(cmdType);
|
||||
if (size != 0) {
|
||||
auto &csr = getGpgpuCommandStreamReceiver();
|
||||
auto &csr = getCommandStreamReceiver(blitAllowed);
|
||||
bool status = csr.createAllocationForHostSurface(srcHostPtrSurf, false);
|
||||
status &= csr.createAllocationForHostSurface(dstHostPtrSurf, true);
|
||||
if (!status) {
|
||||
@@ -398,8 +401,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueSVMMemcpy(cl_bool blockingCopy,
|
||||
surfaces[1] = &dstHostPtrSurf;
|
||||
|
||||
dispatchInfo.setBuiltinOpParams(operationParams);
|
||||
CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_WRITE_BUFFER, dispatchInfo);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_BUFFER>(dispatchInfo, surfaces, builtInType, numEventsInWaitList, eventWaitList, event, blockingCopy, csr);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_BUFFER>(dispatchInfo, surfaces, builtInType, numEventsInWaitList, eventWaitList, event, blockingCopy, blitAllowed);
|
||||
}
|
||||
if (event) {
|
||||
auto pEvent = castToObjectOrAbort<Event>(*event);
|
||||
|
||||
@@ -82,6 +82,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBuffer(
|
||||
MemObjSurface bufferSurf(buffer);
|
||||
GeneralSurface mapSurface;
|
||||
Surface *surfaces[] = {&bufferSurf, nullptr};
|
||||
auto blitAllowed = blitEnqueueAllowed(cmdType);
|
||||
|
||||
if (mapAllocation) {
|
||||
surfaces[1] = &mapSurface;
|
||||
@@ -94,7 +95,9 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBuffer(
|
||||
} else {
|
||||
surfaces[1] = &hostPtrSurf;
|
||||
if (size != 0) {
|
||||
bool status = getGpgpuCommandStreamReceiver().createAllocationForHostSurface(hostPtrSurf, false);
|
||||
|
||||
auto &csr = getCommandStreamReceiver(blitAllowed);
|
||||
bool status = csr.createAllocationForHostSurface(hostPtrSurf, false);
|
||||
if (!status) {
|
||||
return CL_OUT_OF_RESOURCES;
|
||||
}
|
||||
@@ -113,8 +116,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBuffer(
|
||||
dc.transferAllocation = mapAllocation ? mapAllocation : hostPtrSurf.getAllocation();
|
||||
|
||||
MultiDispatchInfo dispatchInfo(dc);
|
||||
CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_WRITE_BUFFER, dispatchInfo);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_BUFFER>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingWrite, csr);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_BUFFER>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingWrite, blitAllowed);
|
||||
|
||||
if (context->isProvidingPerformanceHints()) {
|
||||
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL, CL_ENQUEUE_WRITE_BUFFER_REQUIRES_COPY_DATA, static_cast<cl_mem>(buffer));
|
||||
|
||||
@@ -58,11 +58,13 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBufferRect(
|
||||
MemObjSurface dstBufferSurf(buffer);
|
||||
HostPtrSurface hostPtrSurf(srcPtr, hostPtrSize, true);
|
||||
Surface *surfaces[] = {&dstBufferSurf, &hostPtrSurf};
|
||||
auto blitAllowed = blitEnqueueAllowed(cmdType);
|
||||
|
||||
if (region[0] != 0 &&
|
||||
region[1] != 0 &&
|
||||
region[2] != 0) {
|
||||
bool status = getGpgpuCommandStreamReceiver().createAllocationForHostSurface(hostPtrSurf, false);
|
||||
auto &csr = getCommandStreamReceiver(blitAllowed);
|
||||
bool status = csr.createAllocationForHostSurface(hostPtrSurf, false);
|
||||
if (!status) {
|
||||
return CL_OUT_OF_RESOURCES;
|
||||
}
|
||||
@@ -86,8 +88,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteBufferRect(
|
||||
dc.dstSlicePitch = bufferSlicePitch;
|
||||
|
||||
MultiDispatchInfo dispatchInfo(dc);
|
||||
CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_WRITE_BUFFER_RECT, dispatchInfo);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_BUFFER_RECT>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingWrite, csr);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_BUFFER_RECT>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingWrite, blitAllowed);
|
||||
|
||||
if (context->isProvidingPerformanceHints()) {
|
||||
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL, CL_ENQUEUE_WRITE_BUFFER_RECT_REQUIRES_COPY_DATA, static_cast<cl_mem>(buffer));
|
||||
|
||||
@@ -54,6 +54,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteImage(
|
||||
HostPtrSurface hostPtrSurf(srcPtr, hostPtrSize, true);
|
||||
GeneralSurface mapSurface;
|
||||
Surface *surfaces[] = {&dstImgSurf, nullptr};
|
||||
auto blitAllowed = blitEnqueueAllowed(cmdType) && blitEnqueueImageAllowed(origin, region, *dstImage);
|
||||
if (mapAllocation) {
|
||||
surfaces[1] = &mapSurface;
|
||||
mapSurface.setGraphicsAllocation(mapAllocation);
|
||||
@@ -65,7 +66,8 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteImage(
|
||||
if (region[0] != 0 &&
|
||||
region[1] != 0 &&
|
||||
region[2] != 0) {
|
||||
bool status = getGpgpuCommandStreamReceiver().createAllocationForHostSurface(hostPtrSurf, false);
|
||||
auto &csr = getCommandStreamReceiver(blitAllowed);
|
||||
bool status = csr.createAllocationForHostSurface(hostPtrSurf, false);
|
||||
if (!status) {
|
||||
return CL_OUT_OF_RESOURCES;
|
||||
}
|
||||
@@ -92,8 +94,7 @@ cl_int CommandQueueHw<GfxFamily>::enqueueWriteImage(
|
||||
auto eBuiltInOps = EBuiltInOps::CopyBufferToImage3d;
|
||||
MultiDispatchInfo dispatchInfo(dc);
|
||||
|
||||
CommandStreamReceiver &csr = selectCsrForBuiltinOperation(CL_COMMAND_WRITE_IMAGE, dispatchInfo);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_IMAGE>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingWrite == CL_TRUE, csr);
|
||||
dispatchBcsOrGpgpuEnqueue<CL_COMMAND_WRITE_IMAGE>(dispatchInfo, surfaces, eBuiltInOps, numEventsInWaitList, eventWaitList, event, blockingWrite == CL_TRUE, blitAllowed);
|
||||
|
||||
if (context->isProvidingPerformanceHints()) {
|
||||
context->providePerformanceHint(CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL, CL_ENQUEUE_WRITE_IMAGE_REQUIRES_COPY_DATA, static_cast<cl_mem>(dstImage));
|
||||
|
||||
@@ -54,11 +54,11 @@ void EventsRequest::fillCsrDependenciesForTaskCountContainer(CsrDependencies &cs
|
||||
|
||||
if (event->getCommandQueue() && event->getCommandQueue()->getDevice().getRootDeviceIndex() != currentCsr.getRootDeviceIndex()) {
|
||||
auto taskCountPreviousRootDevice = event->peekTaskCount();
|
||||
auto tagAddressPreviousRootDevice = event->getCommandQueue()->getGpgpuCommandStreamReceiver().getTagAddress();
|
||||
auto tagAddressPreviousRootDevice = event->getCommandQueue()->getCommandStreamReceiver(false).getTagAddress();
|
||||
|
||||
csrDeps.taskCountContainer.push_back({taskCountPreviousRootDevice, reinterpret_cast<uint64_t>(tagAddressPreviousRootDevice)});
|
||||
|
||||
auto graphicsAllocation = event->getCommandQueue()->getGpgpuCommandStreamReceiver().getTagsMultiAllocation()->getGraphicsAllocation(currentCsr.getRootDeviceIndex());
|
||||
auto graphicsAllocation = event->getCommandQueue()->getCommandStreamReceiver(false).getTagsMultiAllocation()->getGraphicsAllocation(currentCsr.getRootDeviceIndex());
|
||||
currentCsr.getResidencyAllocations().push_back(graphicsAllocation);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1065,7 +1065,7 @@ uint32_t Kernel::getMaxWorkGroupCount(const cl_uint workDim, const size_t *local
|
||||
hwHelper.getBarriersCountFromHasBarriers(barrierCount),
|
||||
workDim,
|
||||
localWorkSize);
|
||||
auto isEngineInstanced = commandQueue->getGpgpuCommandStreamReceiver().getOsContext().isEngineInstanced();
|
||||
auto isEngineInstanced = commandQueue->getCommandStreamReceiver(false).getOsContext().isEngineInstanced();
|
||||
maxWorkGroupCount = hwHelper.adjustMaxWorkGroupCount(maxWorkGroupCount, engineGroupType, hardwareInfo, isEngineInstanced);
|
||||
return maxWorkGroupCount;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user