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Add PC before NP state commands on ATS

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Add pipe control before state base address, state compute
mode and state sip commands.

Related-To: NEO-6615
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
This commit is contained in:
Krzysztof Gibala
2022-02-10 16:21:54 +00:00
committed by Compute-Runtime-Automation
parent d6412a6f4e
commit 436fd7edce
11 changed files with 75 additions and 42 deletions
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36
opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_tests_xehp_and_later.cpp
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@@ -9,15 +9,19 @@
#include "shared/source/helpers/state_base_address.h"
#include "shared/test/common/cmd_parse/hw_parse.h"
#include "shared/test/common/helpers/debug_manager_state_restore.h"
#include "shared/test/common/helpers/engine_descriptor_helper.h"
#include "shared/test/common/libult/ult_command_stream_receiver.h"
#include "shared/test/common/mocks/mock_csr.h"
#include "shared/test/common/mocks/mock_debugger.h"
#include "shared/test/common/mocks/mock_os_context.h"
#include "shared/test/common/mocks/mock_submissions_aggregator.h"
#include "shared/test/common/test_macros/test.h"
#include "opencl/test/unit_test/fixtures/ult_command_stream_receiver_fixture.h"
#include "opencl/test/unit_test/mocks/mock_command_queue.h"
#include "test_traits_common.h"
using namespace NEO;
typedef UltCommandStreamReceiverTest CommandStreamReceiverFlushTaskXeHPAndLaterTests;
@@ -253,6 +257,38 @@ HWTEST2_F(CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramPipeContr
EXPECT_EQ(sipAllocation->getGpuAddressToPatch(), sipAddress);
}
HWTEST2_F(CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenSBACommandToProgramOnSingleCCSSetupThenThereIsPipeControlPriorToIt, IsWithinXeGfxFamily) {
using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
hardwareInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled = 1;
auto mockDevice = std::unique_ptr<MockDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(&hardwareInfo, 0u));
auto &commandStreamReceiver = mockDevice->getUltCommandStreamReceiver<FamilyType>();
MockOsContext ccsOsContext(0, EngineDescriptorHelper::getDefaultDescriptor({aub_stream::ENGINE_CCS, EngineUsage::Regular}));
commandStreamReceiver.setupContext(ccsOsContext);
configureCSRtoNonDirtyState<FamilyType>(false);
flushTask(commandStreamReceiver);
parseCommands<FamilyType>(commandStreamReceiver.getCS(0));
auto stateBaseAddressItor = find<STATE_BASE_ADDRESS *>(cmdList.begin(), cmdList.end());
auto pipeControlItor = find<typename FamilyType::PIPE_CONTROL *>(cmdList.begin(), stateBaseAddressItor);
EXPECT_NE(stateBaseAddressItor, pipeControlItor);
auto pipeControlCmd = reinterpret_cast<typename FamilyType::PIPE_CONTROL *>(*pipeControlItor);
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
if constexpr (TestTraits<gfxCoreFamily>::isUnTypedDataPortCacheFlushSupported) {
EXPECT_TRUE(pipeControlCmd->getUnTypedDataPortCacheFlush());
}
EXPECT_FALSE(pipeControlCmd->getAmfsFlushEnable());
EXPECT_FALSE(pipeControlCmd->getInstructionCacheInvalidateEnable());
EXPECT_FALSE(pipeControlCmd->getTextureCacheInvalidationEnable());
EXPECT_FALSE(pipeControlCmd->getConstantCacheInvalidationEnable());
EXPECT_FALSE(pipeControlCmd->getStateCacheInvalidationEnable());
}
HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, whenNotReprogrammingSshButInitProgrammingFlagsThenBindingTablePoolIsProgrammed) {
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();

31
opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests_dg2_and_later.cpp
View File

@@ -141,37 +141,6 @@ HWTEST2_F(CommandStreamReceiverFlushTaskDg2AndLaterTests, givenProgramPipeContro
EXPECT_EQ(cmdSizeForAllCommandsWithoutPCand3dState + expectedCmdSize, cmdSizeForAllCommands);
}
HWTEST2_F(CommandStreamReceiverFlushTaskDg2AndLaterTests, givenSBACommandToProgramOnSingleCCSSetupThenThereIsPipeControlPriorToIt, isXeHpcOrXeHpgCore) {
using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
hardwareInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled = 1;
auto mockDevice = std::unique_ptr<MockDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(&hardwareInfo, 0u));
auto &commandStreamReceiver = mockDevice->getUltCommandStreamReceiver<FamilyType>();
MockOsContext ccsOsContext(0, EngineDescriptorHelper::getDefaultDescriptor({aub_stream::ENGINE_CCS, EngineUsage::Regular}));
commandStreamReceiver.setupContext(ccsOsContext);
configureCSRtoNonDirtyState<FamilyType>(false);
flushTask(commandStreamReceiver);
parseCommands<FamilyType>(commandStreamReceiver.getCS(0));
auto stateBaseAddressItor = find<STATE_BASE_ADDRESS *>(cmdList.begin(), cmdList.end());
auto pipeControlItor = find<typename FamilyType::PIPE_CONTROL *>(cmdList.begin(), stateBaseAddressItor);
EXPECT_NE(stateBaseAddressItor, pipeControlItor);
auto pipeControlCmd = reinterpret_cast<typename FamilyType::PIPE_CONTROL *>(*pipeControlItor);
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
EXPECT_TRUE(pipeControlCmd->getUnTypedDataPortCacheFlush());
EXPECT_FALSE(pipeControlCmd->getAmfsFlushEnable());
EXPECT_FALSE(pipeControlCmd->getInstructionCacheInvalidateEnable());
EXPECT_FALSE(pipeControlCmd->getTextureCacheInvalidationEnable());
EXPECT_FALSE(pipeControlCmd->getConstantCacheInvalidationEnable());
EXPECT_FALSE(pipeControlCmd->getStateCacheInvalidationEnable());
}
HWTEST2_F(CommandStreamReceiverHwTestDg2AndLater, givenGen12AndLaterWhenRayTracingEnabledButAlreadySentThenCommandIsNotAddedToBatchBuffer, MatcherIsRTCapable) {
using _3DSTATE_BTD = typename FamilyType::_3DSTATE_BTD;
MockCsrHw<FamilyType> commandStreamReceiver(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());

5
opencl/test/unit_test/xe_hp_core/excludes_xe_hp_core.cpp
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -13,7 +13,8 @@ HWTEST_EXCLUDE_PRODUCT(HwInfoConfigTest, WhenAllowCompressionIsCalledThenTrueIsR
HWTEST_EXCLUDE_PRODUCT(HwInfoConfigTest, givenHardwareInfoWhenCallingIsMaxThreadsForWorkgroupWARequiredThenFalseIsReturned, IGFX_XE_HP_CORE);
HWTEST_EXCLUDE_PRODUCT(HwInfoConfigTest, whenCallingGetDeviceMemoryNameThenDdrIsReturned, IGFX_XE_HP_CORE);
HWTEST_EXCLUDE_PRODUCT(HwInfoConfigTest, givenHwInfoConfigWhenAskedIfExtraParametersAreInvalidThenFalseIsReturned, IGFX_XE_HP_CORE);
HWTEST_EXCLUDE_PRODUCT(CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramPipeControlPriorToNonPipelinedStateCommandDebugKeyAndStateSipWhenItIsRequiredThenThereIsPipeControlPriorToIt, IGFX_XE_HP_CORE);
HWTEST_EXCLUDE_PRODUCT(HwInfoConfigTest, givenHwInfoConfigWhenAskedIfTile64With3DSurfaceOnBCSIsSupportedThenTrueIsReturned, IGFX_XE_HP_CORE);
HWTEST_EXCLUDE_PRODUCT(HwInfoConfigTest, givenHwInfoConfigWhenAskedIfBlitterForImagesIsSupportedThenFalseIsReturned, IGFX_XE_HP_CORE);
HWTEST_EXCLUDE_PRODUCT(HwInfoConfigTest, givenHwInfoConfigWhenAskedIfPipeControlPriorToNonPipelinedStateCommandsWARequiredThenFalseIsReturned, IGFX_XE_HP_CORE);
HWTEST_EXCLUDE_PRODUCT(HwHelperTest, whenGettingDefaultRevisionIdThenCorrectValueIsReturned, IGFX_XE_HP_CORE);
HWTEST_EXCLUDE_PRODUCT(CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramPipeControlPriorToNonPipelinedStateCommandDebugKeyAndStateSipWhenItIsRequiredThenThereIsPipeControlPriorToIt, IGFX_XE_HP_CORE);

6
opencl/test/unit_test/xe_hp_core/xehp/test_hw_info_config_xehp.inl
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@@ -124,7 +124,7 @@ XEHPTEST_F(XeHPHwInfoConfig, givenHwInfoConfigWithMultipleCSSWhenIsPipeControlPr
const auto &[isWARequiredOnSingleCCS, isWARequiredOnMultiCCS] = hwInfoConfig.isPipeControlPriorToNonPipelinedStateCommandsWARequired(hwInfo, isRcs);
EXPECT_TRUE(isWARequiredOnMultiCCS);
EXPECT_FALSE(isWARequiredOnSingleCCS);
EXPECT_TRUE(isWARequiredOnSingleCCS);
}
XEHPTEST_F(XeHPHwInfoConfig, givenProgramPipeControlPriorToNonPipelinedStateCommandWhenIsPipeControlPriorToNonPipelinedStateCommandsWARequiredIsCalledThenTrueIsReturned) {
@@ -138,7 +138,7 @@ XEHPTEST_F(XeHPHwInfoConfig, givenProgramPipeControlPriorToNonPipelinedStateComm
const auto &[isWARequiredOnSingleCCS, isWARequiredOnMultiCCS] = hwInfoConfig.isPipeControlPriorToNonPipelinedStateCommandsWARequired(hwInfo, isRcs);
EXPECT_TRUE(isWARequiredOnMultiCCS);
EXPECT_FALSE(isWARequiredOnSingleCCS);
EXPECT_TRUE(isWARequiredOnSingleCCS);
}
XEHPTEST_F(XeHPHwInfoConfig, givenProgramPipeControlPriorToNonPipelinedStateCommandDisabledWhenIsPipeControlPriorToNonPipelinedStateCommandsWARequiredIsCalledThenFalseIsReturned) {
@@ -152,5 +152,5 @@ XEHPTEST_F(XeHPHwInfoConfig, givenProgramPipeControlPriorToNonPipelinedStateComm
const auto &[isWARequiredOnSingleCCS, isWARequiredOnMultiCCS] = hwInfoConfig.isPipeControlPriorToNonPipelinedStateCommandsWARequired(hwInfo, isRcs);
EXPECT_FALSE(isWARequiredOnMultiCCS);
EXPECT_FALSE(isWARequiredOnSingleCCS);
EXPECT_TRUE(isWARequiredOnSingleCCS);
}

3
shared/source/command_stream/command_stream_receiver_hw_tgllp_and_later.inl
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@@ -21,7 +21,8 @@ void CommandStreamReceiverHw<GfxFamily>::programComputeMode(LinearStream &stream
auto hwInfoConfig = HwInfoConfig::get(hwInfo.platform.eProductFamily);
const auto &[isWARequiredOnSingleCCS, isWARequiredOnMultiCCS] = hwInfoConfig->isPipeControlPriorToNonPipelinedStateCommandsWARequired(hwInfo, isRcs());
const auto isWARequired = isWARequiredOnSingleCCS || isWARequiredOnMultiCCS;
std::ignore = isWARequiredOnMultiCCS;
const auto isWARequired = isWARequiredOnSingleCCS;
if (isWARequired) {
PipeControlArgs args;

6
shared/source/command_stream/command_stream_receiver_hw_xehp_and_later.inl
View File

@@ -60,7 +60,8 @@ size_t CommandStreamReceiverHw<GfxFamily>::getCmdSizeForComputeMode() {
if (isComputeModeNeeded()) {
auto hwInfoConfig = HwInfoConfig::get(hwInfo.platform.eProductFamily);
const auto &[isWARequiredOnSingleCCS, isWARequiredOnMultiCCS] = hwInfoConfig->isPipeControlPriorToNonPipelinedStateCommandsWARequired(hwInfo, isRcs());
const auto isWARequired = isWARequiredOnSingleCCS || isWARequiredOnMultiCCS;
std::ignore = isWARequiredOnMultiCCS;
const auto isWARequired = isWARequiredOnSingleCCS;
if (isWARequired) {
size += sizeof(typename GfxFamily::PIPE_CONTROL);
@@ -198,7 +199,8 @@ inline void CommandStreamReceiverHw<GfxFamily>::addPipeControlBeforeStateSip(Lin
PipeControlArgs args;
args.dcFlushEnable = MemorySynchronizationCommands<GfxFamily>::getDcFlushEnable(true, hwInfo);
const auto &[isWARequiredOnSingleCCS, isWARequiredOnMultiCCS] = hwInfoConfig->isPipeControlPriorToNonPipelinedStateCommandsWARequired(hwInfo, isRcs());
const auto isWARequired = isWARequiredOnSingleCCS || isWARequiredOnMultiCCS;
std::ignore = isWARequiredOnMultiCCS;
const auto isWARequired = isWARequiredOnSingleCCS;
if (isWARequired && debuggingEnabled && !hwHelper.isSipWANeeded(hwInfo)) {
addPipeControlPriorToNonPipelinedStateCommand(commandStream, args);

2
shared/source/xe_hp_core/os_agnostic_hw_info_config_xe_hp_core.inl
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@@ -105,7 +105,7 @@ LocalMemoryAccessMode HwInfoConfigHw<gfxProduct>::getDefaultLocalMemoryAccessMod
template <>
std::pair<bool, bool> HwInfoConfigHw<gfxProduct>::isPipeControlPriorToNonPipelinedStateCommandsWARequired(const HardwareInfo &hwInfo, bool isRcs) const {
auto isWARequiredOnSingleCCS = false;
auto isWARequiredOnSingleCCS = true;
auto isWARequiredOnMultiCCS = hwInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled > 1;
if (DebugManager.flags.ProgramPipeControlPriorToNonPipelinedStateCommand.get() != -1) {

3
shared/test/common/xe_hp_core/test_traits_xe_hp_core.h
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -26,4 +26,5 @@ struct TestTraits<IGFX_XE_HP_CORE> {
static constexpr bool fusedEuDispatchSupported = true;
static constexpr bool numberOfWalkersInCfeStateSupported = true;
static constexpr bool forceGpuNonCoherent = false;
static constexpr bool isUnTypedDataPortCacheFlushSupported = false;
};

1
shared/test/common/xe_hpc_core/test_traits_xe_hpc_core.h
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@@ -26,4 +26,5 @@ struct TestTraits<IGFX_XE_HPC_CORE> {
static constexpr bool numberOfWalkersInCfeStateSupported = true;
static constexpr bool isUsingNonDefaultIoctls = true;
static constexpr bool forceGpuNonCoherent = false;
static constexpr bool isUnTypedDataPortCacheFlushSupported = true;
};

3
shared/test/common/xe_hpg_core/test_traits_xe_hpg_core.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -26,4 +26,5 @@ struct TestTraits<IGFX_XE_HPG_CORE> {
static constexpr bool fusedEuDispatchSupported = true;
static constexpr bool numberOfWalkersInCfeStateSupported = true;
static constexpr bool forceGpuNonCoherent = false;
static constexpr bool isUnTypedDataPortCacheFlushSupported = true;
};

21
shared/test/unit_test/command_stream/compute_mode_tests_xehp_and_later.cpp
View File

@@ -19,9 +19,17 @@ using namespace NEO;
HWCMDTEST_F(IGFX_XE_HP_CORE, ComputeModeRequirements, givenCoherencyWithoutSharedHandlesWhenCommandSizeIsCalculatedThenCorrectCommandSizeIsReturned) {
using STATE_COMPUTE_MODE = typename FamilyType::STATE_COMPUTE_MODE;
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
SetUpImpl<FamilyType>();
const auto &hwInfoConfig = *HwInfoConfig::get(productFamily);
const auto &[isWARequiredOnSingleCCS, isWARequiredOnMultiCCS] = hwInfoConfig.isPipeControlPriorToNonPipelinedStateCommandsWARequired(*defaultHwInfo, csr->isRcs());
std::ignore = isWARequiredOnMultiCCS;
auto cmdsSize = sizeof(STATE_COMPUTE_MODE);
if (isWARequiredOnSingleCCS) {
cmdsSize += +sizeof(PIPE_CONTROL);
}
overrideComputeModeRequest<FamilyType>(false, false, false);
auto retSize = getCsrHw<FamilyType>()->getCmdSizeForComputeMode();
@@ -45,6 +53,9 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, ComputeModeRequirements, givenCoherencyWithSharedHa
using STATE_COMPUTE_MODE = typename FamilyType::STATE_COMPUTE_MODE;
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
const auto &hwInfoConfig = *HwInfoConfig::get(productFamily);
const auto &[isWARequiredOnSingleCCS, isWARequiredOnMultiCCS] = hwInfoConfig.isPipeControlPriorToNonPipelinedStateCommandsWARequired(*defaultHwInfo, csr->isRcs());
std::ignore = isWARequiredOnMultiCCS;
auto cmdsSize = 0u;
overrideComputeModeRequest<FamilyType>(false, false, true);
@@ -56,6 +67,9 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, ComputeModeRequirements, givenCoherencyWithSharedHa
EXPECT_EQ(cmdsSize, retSize);
cmdsSize = sizeof(STATE_COMPUTE_MODE) + sizeof(PIPE_CONTROL);
if (isWARequiredOnSingleCCS) {
cmdsSize += +sizeof(PIPE_CONTROL);
}
overrideComputeModeRequest<FamilyType>(true, true, true);
retSize = getCsrHw<FamilyType>()->getCmdSizeForComputeMode();
@@ -332,7 +346,14 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, ComputeModeRequirements, givenComputeModeCmdSizeWhe
auto retSize = getCsrHw<FamilyType>()->getCmdSizeForComputeMode();
EXPECT_EQ(cmdSize, retSize);
const auto &hwInfoConfig = *HwInfoConfig::get(productFamily);
const auto &[isWARequiredOnSingleCCS, isWARequiredOnMultiCCS] = hwInfoConfig.isPipeControlPriorToNonPipelinedStateCommandsWARequired(*defaultHwInfo, csr->isRcs());
std::ignore = isWARequiredOnMultiCCS;
cmdSize = sizeof(STATE_COMPUTE_MODE);
if (isWARequiredOnSingleCCS) {
cmdSize += +sizeof(PIPE_CONTROL);
}
overrideComputeModeRequest<FamilyType>(false, false, false, true, 256u);
retSize = getCsrHw<FamilyType>()->getCmdSizeForComputeMode();