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Changed class name from PipeControlHelper to MemorySynchronizationCommands

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Related-To: NEO-4227

Change-Id: Iff59ea5b274fbba3af1dab2ac188f7370cc1e44f
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
This commit is contained in:
Milczarek, Slawomir
2020-02-17 12:45:24 +01:00
committed by sys_ocldev
parent 47f85c9dc9
commit 4420fe34ba
29 changed files with 102 additions and 97 deletions
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6
runtime/built_ins/aux_translation_builtin.h
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2019 Intel Corporation
* Copyright (C) 2018-2020 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -64,12 +64,12 @@ class BuiltInOp<EBuiltInOps::AuxTranslation> : public BuiltinDispatchInfoBuilder
DispatchInfo::EstimateCommandsMethodT>;
template <typename GfxFamily, bool dcFlush>
static void dispatchPipeControl(LinearStream &linearStream, TimestampPacketDependencies *) {
PipeControlHelper<GfxFamily>::addPipeControl(linearStream, dcFlush);
MemorySynchronizationCommands<GfxFamily>::addPipeControl(linearStream, dcFlush);
}
template <typename GfxFamily>
static size_t getSizeForSinglePipeControl(const MemObjsForAuxTranslation *) {
return PipeControlHelper<GfxFamily>::getSizeForSinglePipeControl();
return MemorySynchronizationCommands<GfxFamily>::getSizeForSinglePipeControl();
}
template <typename GfxFamily>

6
runtime/command_queue/gpgpu_walker_base.inl
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@@ -114,9 +114,9 @@ void GpgpuWalkerHelper<GfxFamily>::dispatchProfilingCommandsStart(
// PIPE_CONTROL for global timestamp
uint64_t timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, GlobalStartTS);
PipeControlHelper<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(*commandStream,
PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_TIMESTAMP,
timeStampAddress, 0llu, false, hwInfo);
MemorySynchronizationCommands<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(
*commandStream, PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_TIMESTAMP,
timeStampAddress, 0llu, false, hwInfo);
//MI_STORE_REGISTER_MEM for context local timestamp
timeStampAddress = hwTimeStamps.getGpuAddress() + offsetof(HwTimeStamps, ContextStartTS);

8
runtime/command_queue/gpgpu_walker_bdw_plus.inl
View File

@@ -69,7 +69,7 @@ void GpgpuWalkerHelper<GfxFamily>::dispatchScheduler(
using MI_BATCH_BUFFER_START = typename GfxFamily::MI_BATCH_BUFFER_START;
bool dcFlush = false;
PipeControlHelper<GfxFamily>::addPipeControl(commandStream, dcFlush);
MemorySynchronizationCommands<GfxFamily>::addPipeControl(commandStream, dcFlush);
uint32_t interfaceDescriptorIndex = devQueueHw.schedulerIDIndex;
const size_t offsetInterfaceDescriptorTable = devQueueHw.colorCalcStateSize;
@@ -161,7 +161,7 @@ void GpgpuWalkerHelper<GfxFamily>::dispatchScheduler(
// Do not put BB_START only when returning in first Scheduler run
if (devQueueHw.getSchedulerReturnInstance() != 1) {
PipeControlHelper<GfxFamily>::addPipeControl(commandStream, true);
MemorySynchronizationCommands<GfxFamily>::addPipeControl(commandStream, true);
// Add BB Start Cmd to the SLB in the Primary Batch Buffer
auto *bbStart = static_cast<MI_BATCH_BUFFER_START *>(commandStream.getSpace(sizeof(MI_BATCH_BUFFER_START)));
@@ -182,8 +182,8 @@ void GpgpuWalkerHelper<GfxFamily>::setupTimestampPacket(
if (TimestampPacketStorage::WriteOperationType::AfterWalker == writeOperationType) {
uint64_t address = timestampPacketNode->getGpuAddress() + offsetof(TimestampPacketStorage, packets[0].contextEnd);
PipeControlHelper<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(*cmdStream,
PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA, address, 0, false, *rootDeviceEnvironment.getHardwareInfo());
MemorySynchronizationCommands<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(
*cmdStream, PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA, address, 0, false, *rootDeviceEnvironment.getHardwareInfo());
}
}

24
runtime/command_stream/command_stream_receiver_hw_base.inl
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@@ -177,9 +177,9 @@ CompletionStamp CommandStreamReceiverHw<GfxFamily>::flushTask(
}
auto address = getTagAllocation()->getGpuAddress();
PipeControlHelper<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(commandStreamTask,
PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
address, taskCount + 1, dispatchFlags.dcFlush, peekHwInfo());
MemorySynchronizationCommands<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(
commandStreamTask, PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
address, taskCount + 1, dispatchFlags.dcFlush, peekHwInfo());
this->latestSentTaskCount = taskCount + 1;
DBG_LOG(LogTaskCounts, __FUNCTION__, "Line: ", __LINE__, "taskCount", taskCount);
@@ -359,7 +359,7 @@ CompletionStamp CommandStreamReceiverHw<GfxFamily>::flushTask(
}
if (requiresInstructionCacheFlush) {
auto pipeControl = PipeControlHelper<GfxFamily>::addPipeControl(commandStreamCSR, false);
auto pipeControl = MemorySynchronizationCommands<GfxFamily>::addPipeControl(commandStreamCSR, false);
pipeControl->setInstructionCacheInvalidateEnable(true);
requiresInstructionCacheFlush = false;
}
@@ -367,7 +367,7 @@ CompletionStamp CommandStreamReceiverHw<GfxFamily>::flushTask(
// Add a PC if we have a dependency on a previous walker to avoid concurrency issues.
if (taskLevel > this->taskLevel) {
if (!timestampPacketWriteEnabled) {
PipeControlHelper<GfxFamily>::addPipeControl(commandStreamCSR, false);
MemorySynchronizationCommands<GfxFamily>::addPipeControl(commandStreamCSR, false);
}
this->taskLevel = taskLevel;
DBG_LOG(LogTaskCounts, __FUNCTION__, "Line: ", __LINE__, "this->taskCount", this->taskCount);
@@ -516,13 +516,13 @@ inline void CommandStreamReceiverHw<GfxFamily>::programStallingPipeControlForBar
auto barrierTimestampPacketGpuAddress = dispatchFlags.barrierTimestampPacketNodes->peekNodes()[0]->getGpuAddress() +
offsetof(TimestampPacketStorage, packets[0].contextEnd);
stallingPipeControlCmd = PipeControlHelper<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(
stallingPipeControlCmd = MemorySynchronizationCommands<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(
cmdStream, PIPE_CONTROL::POST_SYNC_OPERATION::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
barrierTimestampPacketGpuAddress, 0, false, peekHwInfo());
dispatchFlags.barrierTimestampPacketNodes->makeResident(*this);
} else {
stallingPipeControlCmd = PipeControlHelper<GfxFamily>::addPipeControl(cmdStream, false);
stallingPipeControlCmd = MemorySynchronizationCommands<GfxFamily>::addPipeControl(cmdStream, false);
}
stallingPipeControlCmd->setCommandStreamerStallEnable(true);
@@ -544,7 +544,7 @@ inline bool CommandStreamReceiverHw<GfxFamily>::flushBatchedSubmissions() {
ResidencyContainer surfacesForSubmit;
ResourcePackage resourcePackage;
auto pipeControlLocationSize = PipeControlHelper<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(peekHwInfo());
auto pipeControlLocationSize = MemorySynchronizationCommands<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(peekHwInfo());
void *currentPipeControlForNooping = nullptr;
void *epiloguePipeControlLocation = nullptr;
@@ -638,7 +638,7 @@ size_t CommandStreamReceiverHw<GfxFamily>::getRequiredCmdStreamSize(const Dispat
if (!this->isStateSipSent || device.isDebuggerActive()) {
size += PreemptionHelper::getRequiredStateSipCmdSize<GfxFamily>(device);
}
size += PipeControlHelper<GfxFamily>::getSizeForSinglePipeControl();
size += MemorySynchronizationCommands<GfxFamily>::getSizeForSinglePipeControl();
size += sizeof(typename GfxFamily::MI_BATCH_BUFFER_START);
size += getCmdSizeForL3Config();
@@ -663,7 +663,7 @@ size_t CommandStreamReceiverHw<GfxFamily>::getRequiredCmdStreamSize(const Dispat
if (stallingPipeControlOnNextFlushRequired) {
auto barrierTimestampPacketNodes = dispatchFlags.barrierTimestampPacketNodes;
if (barrierTimestampPacketNodes && barrierTimestampPacketNodes->peekNodes().size() > 0) {
size += PipeControlHelper<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(peekHwInfo());
size += MemorySynchronizationCommands<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(peekHwInfo());
} else {
size += sizeof(typename GfxFamily::PIPE_CONTROL);
}
@@ -840,11 +840,11 @@ uint32_t CommandStreamReceiverHw<GfxFamily>::blitBuffer(const BlitPropertiesCont
makeResident(*blitProperties.dstAllocation);
}
PipeControlHelper<GfxFamily>::addAdditionalSynchronization(commandStream, tagAllocation->getGpuAddress(), peekHwInfo());
MemorySynchronizationCommands<GfxFamily>::addAdditionalSynchronization(commandStream, tagAllocation->getGpuAddress(), peekHwInfo());
HardwareCommandsHelper<GfxFamily>::programMiFlushDw(commandStream, tagAllocation->getGpuAddress(), newTaskCount);
PipeControlHelper<GfxFamily>::addAdditionalSynchronization(commandStream, tagAllocation->getGpuAddress(), peekHwInfo());
MemorySynchronizationCommands<GfxFamily>::addAdditionalSynchronization(commandStream, tagAllocation->getGpuAddress(), peekHwInfo());
auto batchBufferEnd = reinterpret_cast<MI_BATCH_BUFFER_END *>(commandStream.getSpace(sizeof(MI_BATCH_BUFFER_END)));
*batchBufferEnd = GfxFamily::cmdInitBatchBufferEnd;

10
runtime/command_stream/experimental_command_buffer.inl
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2019 Intel Corporation
* Copyright (C) 2018-2020 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -63,7 +63,8 @@ size_t ExperimentalCommandBuffer::getTimeStampPipeControlSize() noexcept {
using PIPE_CONTROL = typename GfxFamily::PIPE_CONTROL;
// Two P_C for timestamps
return 2 * PipeControlHelper<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(*commandStreamReceiver->peekExecutionEnvironment().getHardwareInfo());
return 2 * MemorySynchronizationCommands<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(
*commandStreamReceiver->peekExecutionEnvironment().getHardwareInfo());
}
template <typename GfxFamily>
@@ -72,8 +73,9 @@ void ExperimentalCommandBuffer::addTimeStampPipeControl() {
uint64_t timeStampAddress = timestamps->getGpuAddress() + timestampsOffset;
PipeControlHelper<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(*currentStream,
PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_TIMESTAMP, timeStampAddress, 0llu, false, *commandStreamReceiver->peekExecutionEnvironment().getHardwareInfo());
MemorySynchronizationCommands<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(
*currentStream, PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_TIMESTAMP, timeStampAddress, 0llu,
false, *commandStreamReceiver->peekExecutionEnvironment().getHardwareInfo());
//moving to next chunk
timestampsOffset += sizeof(uint64_t);

12
runtime/device_queue/device_queue_hw_base.inl
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@@ -124,13 +124,13 @@ void DeviceQueueHw<GfxFamily>::addExecutionModelCleanUpSection(Kernel *parentKer
uint64_t criticalSectionAddress = (uint64_t)&igilQueue->m_controls.m_CriticalSection;
PipeControlHelper<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(slbCS,
PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
criticalSectionAddress, ExecutionModelCriticalSection::Free, false, device->getHardwareInfo());
MemorySynchronizationCommands<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(
slbCS, PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
criticalSectionAddress, ExecutionModelCriticalSection::Free, false, device->getHardwareInfo());
PipeControlHelper<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(slbCS,
PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
tagAddress, taskCount, false, device->getHardwareInfo());
MemorySynchronizationCommands<GfxFamily>::obtainPipeControlAndProgramPostSyncOperation(
slbCS, PIPE_CONTROL::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA,
tagAddress, taskCount, false, device->getHardwareInfo());
addMediaStateClearCmds();

2
runtime/gen11/hw_helper_gen11.cpp
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@@ -25,5 +25,5 @@ std::string HwHelperHw<Family>::getExtensions() const {
template class AubHelperHw<Family>;
template class HwHelperHw<Family>;
template class FlatBatchBufferHelperHw<Family>;
template struct PipeControlHelper<Family>;
template struct MemorySynchronizationCommands<Family>;
} // namespace NEO

6
runtime/gen12lp/hw_helper_gen12lp.cpp
View File

@@ -106,7 +106,7 @@ const std::vector<aub_stream::EngineType> HwHelperHw<Family>::getGpgpuEngineInst
};
template <>
void PipeControlHelper<Family>::addPipeControlWA(LinearStream &commandStream, uint64_t gpuAddress, const HardwareInfo &hwInfo) {
void MemorySynchronizationCommands<Family>::addPipeControlWA(LinearStream &commandStream, uint64_t gpuAddress, const HardwareInfo &hwInfo) {
if (Gen12LPHelpers::pipeControlWaRequired(hwInfo.platform.eProductFamily)) {
auto stepping = hwInfo.platform.usRevId;
if (stepping == 0) {
@@ -123,12 +123,12 @@ std::string HwHelperHw<Family>::getExtensions() const {
}
template <>
void PipeControlHelper<Family>::setExtraCacheFlushFields(Family::PIPE_CONTROL *pipeControl) {
void MemorySynchronizationCommands<Family>::setExtraCacheFlushFields(Family::PIPE_CONTROL *pipeControl) {
pipeControl->setHdcPipelineFlush(true);
}
template class AubHelperHw<Family>;
template class HwHelperHw<Family>;
template class FlatBatchBufferHelperHw<Family>;
template struct PipeControlHelper<Family>;
template struct MemorySynchronizationCommands<Family>;
} // namespace NEO

8
runtime/gen8/hw_helper_gen8.cpp
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2017-2019 Intel Corporation
* Copyright (C) 2017-2020 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -27,12 +27,12 @@ void HwHelperHw<Family>::setupHardwareCapabilities(HardwareCapabilities *caps, c
}
template <>
typename Family::PIPE_CONTROL *PipeControlHelper<Family>::addPipeControl(LinearStream &commandStream, bool dcFlush) {
return PipeControlHelper<Family>::obtainPipeControl(commandStream, true);
typename Family::PIPE_CONTROL *MemorySynchronizationCommands<Family>::addPipeControl(LinearStream &commandStream, bool dcFlush) {
return MemorySynchronizationCommands<Family>::obtainPipeControl(commandStream, true);
}
template class AubHelperHw<Family>;
template class HwHelperHw<Family>;
template class FlatBatchBufferHelperHw<Family>;
template struct PipeControlHelper<Family>;
template struct MemorySynchronizationCommands<Family>;
} // namespace NEO

4
runtime/gen9/hw_helper_gen9.cpp
View File

@@ -21,7 +21,7 @@ SipKernelType HwHelperHw<Family>::getSipKernelType(bool debuggingActive) {
}
template <>
void PipeControlHelper<Family>::addPipeControlWA(LinearStream &commandStream, uint64_t gpuAddress, const HardwareInfo &hwInfo) {
void MemorySynchronizationCommands<Family>::addPipeControlWA(LinearStream &commandStream, uint64_t gpuAddress, const HardwareInfo &hwInfo) {
auto pCmd = static_cast<Family::PIPE_CONTROL *>(commandStream.getSpace(sizeof(Family::PIPE_CONTROL)));
*pCmd = Family::cmdInitPipeControl;
pCmd->setCommandStreamerStallEnable(true);
@@ -35,5 +35,5 @@ uint32_t HwHelperHw<Family>::getMetricsLibraryGenId() const {
template class AubHelperHw<Family>;
template class HwHelperHw<Family>;
template class FlatBatchBufferHelperHw<Family>;
template struct PipeControlHelper<Family>;
template struct MemorySynchronizationCommands<Family>;
} // namespace NEO

2
runtime/helpers/flat_batch_buffer_helper_hw.inl
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@@ -182,7 +182,7 @@ char *FlatBatchBufferHelperHw<GfxFamily>::getIndirectPatchCommands(size_t &indir
template <typename GfxFamily>
void FlatBatchBufferHelperHw<GfxFamily>::removePipeControlData(size_t pipeControlLocationSize, void *pipeControlForNooping, const HardwareInfo &hwInfo) {
typedef typename GfxFamily::PIPE_CONTROL PIPE_CONTROL;
size_t numPipeControls = (pipeControlLocationSize - PipeControlHelper<GfxFamily>::getSizeForAdditonalSynchronization(hwInfo)) / (sizeof(PIPE_CONTROL));
size_t numPipeControls = (pipeControlLocationSize - MemorySynchronizationCommands<GfxFamily>::getSizeForAdditonalSynchronization(hwInfo)) / (sizeof(PIPE_CONTROL));
for (size_t i = 0; i < numPipeControls; i++) {
PIPE_CONTROL *erasedPipeControl = reinterpret_cast<PIPE_CONTROL *>(pipeControlForNooping);
removePatchInfoData(reinterpret_cast<uint64_t>(erasedPipeControl) + (i + 1) * sizeof(PIPE_CONTROL) - 2 * sizeof(uint64_t));