Opensource RKL.

Resolves: NEO-5017

Change-Id: I29364aa331f802bd298bd08df440aa1e33dd3c4e
Signed-off-by: Piotr Zdunowski <piotr.zdunowski@intel.com>

cmake/setup_platform_flags.cmake

@@ -7,7 +7,7 @@
 SET_FLAGS_FOR("GEN8" "BDW")
 SET_FLAGS_FOR("GEN9" "SKL" "KBL" "BXT" "GLK" "CFL")
 SET_FLAGS_FOR("GEN11" "ICLLP" "LKF" "EHL")
-SET_FLAGS_FOR("GEN12LP" "TGLLP")
+SET_FLAGS_FOR("GEN12LP" "TGLLP" "RKL")
 
 # Add supported and tested platforms
 if(SUPPORT_GEN8)
@@ -154,4 +154,15 @@ if(SUPPORT_GEN12LP)
       ADD_PRODUCT("TESTED" "DG1" "IGFX_DG1")
     endif()
   endif()
+
+  if(SUPPORT_RKL)
+    ADD_PRODUCT("SUPPORTED" "RKL" "IGFX_ROCKETLAKE")
+    ADD_PLATFORM_FOR_GEN("SUPPORTED" "GEN12LP" "RKL" "LP")
+    ADD_PLATFORM_FOR_GEN("SUPPORTED_2_0" "GEN12LP" "RKL" "LP")
+    ADD_PLATFORM_FOR_GEN("SUPPORTED_IMAGES" "GEN12LP" "RKL" "LP")
+    if(TESTS_RKL)
+      ADD_ITEM_FOR_GEN("PLATFORMS" "TESTED" "GEN12LP" "RKL")
+      ADD_PRODUCT("TESTED" "RKL" "IGFX_ROCKETLAKE")
+    endif()
+  endif()
 endif()

opencl/source/dll/CMakeLists.txt

@@ -43,6 +43,7 @@ set(RUNTIME_SRCS_DLL_LINUX
     ${CMAKE_CURRENT_SOURCE_DIR}/linux/create_drm_memory_manager.cpp
     ${CMAKE_CURRENT_SOURCE_DIR}/linux/devices${BRANCH_DIR_SUFFIX}/devices.inl
     ${CMAKE_CURRENT_SOURCE_DIR}/linux/devices/devices_base.inl
+    ${CMAKE_CURRENT_SOURCE_DIR}/linux/devices/device_ids.h
     ${CMAKE_CURRENT_SOURCE_DIR}/linux/drm_neo_create.cpp
     ${CMAKE_CURRENT_SOURCE_DIR}/linux/options_linux.cpp
     ${CMAKE_CURRENT_SOURCE_DIR}/linux/os_interface.cpp

opencl/source/dll/linux/devices/device_ids.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#pragma once
+
+#define DEVICE_ID_4C80 0x4C80
+#define DEVICE_ID_4C8A 0x4C8A
+#define DEVICE_ID_4C8B 0x4C8B
+#define DEVICE_ID_4C8C 0x4C8C
+#define DEVICE_ID_4C90 0x4C90
+#define DEVICE_ID_4C9A 0x4C9A

opencl/source/dll/linux/devices/devices_base.inl

@@ -5,6 +5,8 @@
  *
  */
 
+#include "opencl/source/dll/linux/devices/device_ids.h"
+
 // clang-format off
 #ifdef SUPPORT_GEN12LP
 #ifdef SUPPORT_TGLLP
@@ -20,6 +22,14 @@ DEVICE( DEV_ID_9A78, TGLLP_1x2x16, GTTYPE_GT2 )
 #ifdef SUPPORT_DG1
 DEVICE( DEV_ID_4905, DG1_CONFIG, GTTYPE_GT2 )
 #endif
+#ifdef SUPPORT_RKL
+DEVICE( DEVICE_ID_4C80, RKL_HW_CONFIG, GTTYPE_GT1 )
+DEVICE( DEVICE_ID_4C8A, RKL_HW_CONFIG, GTTYPE_GT1 )
+DEVICE( DEVICE_ID_4C8B, RKL_HW_CONFIG, GTTYPE_GT1 )
+DEVICE( DEVICE_ID_4C8C, RKL_HW_CONFIG, GTTYPE_GT0_5 )
+DEVICE( DEVICE_ID_4C90, RKL_HW_CONFIG, GTTYPE_GT1 )
+DEVICE( DEVICE_ID_4C9A, RKL_HW_CONFIG, GTTYPE_GT1 )
+#endif
 #endif
 
 #ifdef SUPPORT_GEN11

opencl/source/gen12lp/hw_info_gen12lp.cpp

@@ -11,6 +11,9 @@
 #ifdef SUPPORT_DG1
 #include "hw_info_dg1.inl"
 #endif
+#ifdef SUPPORT_RKL
+#include "hw_info_rkl.inl"
+#endif
 
 #include "shared/source/gen12lp/hw_info_gen12lp.h"
 

opencl/source/gen12lp/hw_info_rkl.inl

@@ -0,0 +1,162 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/gen12lp/hw_cmds_rkl.h"
+#include "shared/source/helpers/constants.h"
+
+#include "opencl/source/aub_mem_dump/aub_services.h"
+
+#include "engine_node.h"
+
+namespace NEO {
+
+const char *HwMapper<IGFX_ROCKETLAKE>::abbreviation = "rkl";
+
+bool isSimulationRKL(unsigned short deviceId) {
+    return false;
+};
+
+const PLATFORM RKL::platform = {
+    IGFX_ROCKETLAKE,
+    PCH_UNKNOWN,
+    IGFX_GEN12LP_CORE,
+    IGFX_GEN12LP_CORE,
+    PLATFORM_NONE, // default init
+    0,             // usDeviceID
+    0,             // usRevId. 0 sets the stepping to A0
+    0,             // usDeviceID_PCH
+    0,             // usRevId_PCH
+    GTTYPE_UNDEFINED};
+
+const RuntimeCapabilityTable RKL::capabilityTable{
+    EngineDirectSubmissionInitVec{
+        {aub_stream::ENGINE_RCS, {true, true}},
+        {aub_stream::ENGINE_CCS, {true, true}}},     // directSubmissionEngines
+    {0, 0, 0, false, false, false},                  // kmdNotifyProperties
+    MemoryConstants::max48BitAddress,                // gpuAddressSpace
+    83.333,                                          // defaultProfilingTimerResolution
+    MemoryConstants::pageSize,                       // requiredPreemptionSurfaceSize
+    &isSimulationRKL,                                // isSimulation
+    PreemptionMode::ThreadGroup,                     // defaultPreemptionMode
+    aub_stream::ENGINE_RCS,                          // defaultEngineType
+    0,                                               // maxRenderFrequency
+    30,                                              // clVersionSupport
+    CmdServicesMemTraceVersion::DeviceValues::Tgllp, // aubDeviceId
+    1,                                               // extraQuantityThreadsPerEU
+    64,                                              // slmSize
+    sizeof(RKL::GRF),                                // grfSize
+    false,                                           // blitterOperationsSupported
+    true,                                            // ftrSupportsInteger64BitAtomics
+    false,                                           // ftrSupportsFP64
+    false,                                           // ftrSupports64BitMath
+    true,                                            // ftrSvm
+    false,                                           // ftrSupportsCoherency
+    false,                                           // ftrSupportsVmeAvcTextureSampler
+    false,                                           // ftrSupportsVmeAvcPreemption
+    false,                                           // ftrRenderCompressedBuffers
+    false,                                           // ftrRenderCompressedImages
+    true,                                            // ftr64KBpages
+    true,                                            // instrumentationEnabled
+    true,                                            // forceStatelessCompilationFor32Bit
+    "lp",                                            // platformType
+    true,                                            // sourceLevelDebuggerSupported
+    false,                                           // supportsVme
+    false,                                           // supportCacheFlushAfterWalker
+    true,                                            // supportsImages
+    false,                                           // supportsDeviceEnqueue
+    false,                                           // supportsPipes
+    true,                                            // supportsOcl21Features
+    false,                                           // supportsOnDemandPageFaults
+    false,                                           // supportsIndependentForwardProgress
+    false,                                           // hostPtrTrackingEnabled
+    false,                                           // levelZeroSupported
+    true                                             // isIntegratedDevice
+};
+
+WorkaroundTable RKL::workaroundTable = {};
+FeatureTable RKL::featureTable = {};
+
+void RKL::setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo) {
+    FeatureTable *featureTable = &hwInfo->featureTable;
+    WorkaroundTable *workaroundTable = &hwInfo->workaroundTable;
+
+    featureTable->ftrL3IACoherency = true;
+    featureTable->ftrPPGTT = true;
+    featureTable->ftrSVM = true;
+    featureTable->ftrIA32eGfxPTEs = true;
+    featureTable->ftrStandardMipTailFormat = true;
+
+    featureTable->ftrTranslationTable = true;
+    featureTable->ftrUserModeTranslationTable = true;
+    featureTable->ftrTileMappedResource = true;
+    featureTable->ftrEnableGuC = true;
+
+    featureTable->ftrFbc = true;
+    featureTable->ftrFbc2AddressTranslation = true;
+    featureTable->ftrFbcBlitterTracking = true;
+    featureTable->ftrFbcCpuTracking = true;
+    featureTable->ftrTileY = true;
+
+    featureTable->ftrAstcHdr2D = true;
+    featureTable->ftrAstcLdr2D = true;
+
+    featureTable->ftr3dMidBatchPreempt = true;
+    featureTable->ftrGpGpuMidBatchPreempt = true;
+    featureTable->ftrGpGpuThreadGroupLevelPreempt = true;
+    featureTable->ftrPerCtxtPreemptionGranularityControl = true;
+
+    workaroundTable->wa4kAlignUVOffsetNV12LinearSurface = true;
+    workaroundTable->waEnablePreemptionGranularityControlByUMD = true;
+};
+
+const HardwareInfo RKL_HW_CONFIG::hwInfo = {
+    &RKL::platform,
+    &RKL::featureTable,
+    &RKL::workaroundTable,
+    &RKL_HW_CONFIG::gtSystemInfo,
+    RKL::capabilityTable,
+};
+GT_SYSTEM_INFO RKL_HW_CONFIG::gtSystemInfo = {0};
+void RKL_HW_CONFIG::setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable) {
+    GT_SYSTEM_INFO *gtSysInfo = &hwInfo->gtSystemInfo;
+    gtSysInfo->ThreadCount = gtSysInfo->EUCount * RKL::threadsPerEu;
+    gtSysInfo->SliceCount = gtSysInfo->SliceCount;
+    gtSysInfo->DualSubSliceCount = gtSysInfo->SubSliceCount / 2;
+    gtSysInfo->L3CacheSizeInKb = 1920;
+    gtSysInfo->L3BankCount = 4;
+    gtSysInfo->MaxFillRate = 8;
+    gtSysInfo->TotalVsThreads = 0;
+    gtSysInfo->TotalHsThreads = 0;
+    gtSysInfo->TotalDsThreads = 0;
+    gtSysInfo->TotalGsThreads = 0;
+    gtSysInfo->TotalPsThreadsWindowerRange = 64;
+    gtSysInfo->CsrSizeInMb = 8;
+    gtSysInfo->MaxEuPerSubSlice = RKL::maxEuPerSubslice;
+    gtSysInfo->MaxSlicesSupported = RKL::maxSlicesSupported;
+    gtSysInfo->MaxSubSlicesSupported = 2;
+    gtSysInfo->MaxDualSubSlicesSupported = 2;
+    gtSysInfo->IsL3HashModeEnabled = false;
+    gtSysInfo->IsDynamicallyPopulated = false;
+
+    gtSysInfo->CCSInfo.IsValid = true;
+    gtSysInfo->CCSInfo.NumberOfCCSEnabled = 1;
+    gtSysInfo->CCSInfo.Instances.CCSEnableMask = 0b1;
+
+    if (setupFeatureTableAndWorkaroundTable) {
+        setupFeatureAndWorkaroundTable(hwInfo);
+    }
+};
+
+const HardwareInfo RKL::hwInfo = RKL_HW_CONFIG::hwInfo;
+const uint64_t RKL::defaultHardwareInfoConfig = 0x100020010;
+
+void setupRKLHardwareInfoImpl(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig) {
+    RKL_HW_CONFIG::setupHardwareInfo(hwInfo, setupFeatureTableAndWorkaroundTable);
+}
+
+void (*RKL::setupHardwareInfo)(HardwareInfo *, bool, const uint64_t) = setupRKLHardwareInfoImpl;
+} // namespace NEO

opencl/source/gen12lp/linux/hw_info_config_gen12lp.cpp

@@ -14,3 +14,6 @@
 #ifdef SUPPORT_DG1
 #include "hw_info_config_dg1.inl"
 #endif
+#ifdef SUPPORT_RKL
+#include "hw_info_config_rkl.inl"
+#endif

opencl/source/gen12lp/linux/hw_info_config_rkl.inl

@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/hw_info.h"
+#include "shared/source/os_interface/hw_info_config.h"
+
+namespace NEO {
+
+template <>
+int HwInfoConfigHw<IGFX_ROCKETLAKE>::configureHardwareCustom(HardwareInfo *hwInfo, OSInterface *osIface) {
+    if (nullptr == osIface) {
+        return 0;
+    }
+
+    GT_SYSTEM_INFO *gtSystemInfo = &hwInfo->gtSystemInfo;
+    gtSystemInfo->SliceCount = 1;
+    return 0;
+}
+
+template class HwInfoConfigHw<IGFX_ROCKETLAKE>;
+} // namespace NEO

opencl/source/gen12lp/windows/hw_info_config_gen12lp.cpp

@@ -55,5 +55,22 @@ uint64_t HwInfoConfigHw<IGFX_DG1>::getSharedSystemMemCapabilities() {
 
 template class HwInfoConfigHw<IGFX_DG1>;
 #endif
+#ifdef SUPPORT_RKL
+template <>
+int HwInfoConfigHw<IGFX_ROCKETLAKE>::configureHardwareCustom(HardwareInfo *hwInfo, OSInterface *osIface) {
+    hwInfo->capabilityTable.ftrRenderCompressedImages = hwInfo->featureTable.ftrE2ECompression;
+    hwInfo->capabilityTable.ftrRenderCompressedBuffers = hwInfo->featureTable.ftrE2ECompression;
+    return 0;
+}
+
+template <>
+void HwInfoConfigHw<IGFX_ROCKETLAKE>::adjustPlatformForProductFamily(HardwareInfo *hwInfo) {
+    PLATFORM *platform = &hwInfo->platform;
+    platform->eRenderCoreFamily = IGFX_GEN12LP_CORE;
+    platform->eDisplayCoreFamily = IGFX_GEN12LP_CORE;
+}
+
+template class HwInfoConfigHw<IGFX_ROCKETLAKE>;
+#endif
 
 } // namespace NEO

opencl/test/unit_test/gen12lp/rkl/CMakeLists.txt

@@ -0,0 +1,17 @@
+#
+# Copyright (C) 2018-2020 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_RKL)
+  set(IGDRCL_SRCS_tests_gen12lp_rkl
+      ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_hw_helper_rkl.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_hw_info_config_rkl.cpp
+  )
+  target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_gen12lp_rkl})
+  add_subdirectories()
+  neo_copy_test_files(copy_test_files_rkl rkl)
+  add_dependencies(unit_tests copy_test_files_rkl)
+endif()

opencl/test/unit_test/gen12lp/rkl/linux/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (C) 2018-2020 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+set(IGDRCL_SRCS_tests_gen12_rkl_linux
+    ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+    ${CMAKE_CURRENT_SOURCE_DIR}/hw_info_config_tests_rkl.cpp
+)
+if(UNIX)
+  target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_gen12_rkl_linux})
+  add_subdirectory(dll)
+endif()

opencl/test/unit_test/gen12lp/rkl/linux/dll/CMakeLists.txt

@@ -0,0 +1,11 @@
+#
+# Copyright (C) 2018-2020 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+set(IGDRCL_SRCS_linux_dll_tests_gen12_rkl
+    ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+    ${CMAKE_CURRENT_SOURCE_DIR}/device_id_tests_rkl.cpp
+)
+target_sources(igdrcl_linux_dll_tests PRIVATE ${IGDRCL_SRCS_linux_dll_tests_gen12_rkl})

opencl/test/unit_test/gen12lp/rkl/linux/dll/device_id_tests_rkl.cpp

@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/os_interface/linux/drm_neo.h"
+
+#include "opencl/source/dll/linux/devices/device_ids.h"
+#include "test.h"
+
+#include <array>
+
+using namespace NEO;
+
+TEST(RklDeviceIdTest, supportedDeviceId) {
+    std::array<DeviceDescriptor, 6> expectedDescriptors = {{{DEVICE_ID_4C80, &RKL_HW_CONFIG::hwInfo, &RKL_HW_CONFIG::setupHardwareInfo, GTTYPE_GT1},
+                                                            {DEVICE_ID_4C8A, &RKL_HW_CONFIG::hwInfo, &RKL_HW_CONFIG::setupHardwareInfo, GTTYPE_GT1},
+                                                            {DEVICE_ID_4C8B, &RKL_HW_CONFIG::hwInfo, &RKL_HW_CONFIG::setupHardwareInfo, GTTYPE_GT1},
+                                                            {DEVICE_ID_4C8C, &RKL_HW_CONFIG::hwInfo, &RKL_HW_CONFIG::setupHardwareInfo, GTTYPE_GT0_5},
+                                                            {DEVICE_ID_4C90, &RKL_HW_CONFIG::hwInfo, &RKL_HW_CONFIG::setupHardwareInfo, GTTYPE_GT1},
+                                                            {DEVICE_ID_4C9A, &RKL_HW_CONFIG::hwInfo, &RKL_HW_CONFIG::setupHardwareInfo, GTTYPE_GT1}}};
+
+    auto compareStructs = [](const DeviceDescriptor *first, const DeviceDescriptor *second) {
+        return first->deviceId == second->deviceId && first->pHwInfo == second->pHwInfo &&
+               first->setupHardwareInfo == second->setupHardwareInfo && first->eGtType == second->eGtType;
+    };
+
+    size_t startIndex = 0;
+    while (!compareStructs(&expectedDescriptors[0], &deviceDescriptorTable[startIndex]) &&
+           deviceDescriptorTable[startIndex].deviceId != 0) {
+        startIndex++;
+    };
+    EXPECT_NE(0u, deviceDescriptorTable[startIndex].deviceId);
+
+    for (auto &expected : expectedDescriptors) {
+        EXPECT_TRUE(compareStructs(&expected, &deviceDescriptorTable[startIndex]));
+        startIndex++;
+    }
+}

opencl/test/unit_test/gen12lp/rkl/linux/hw_info_config_tests_rkl.cpp

@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/os_interface/linux/os_interface.h"
+
+#include "opencl/source/dll/linux/devices/device_ids.h"
+#include "opencl/test/unit_test/helpers/gtest_helpers.h"
+#include "opencl/test/unit_test/os_interface/linux/drm_mock.h"
+#include "opencl/test/unit_test/os_interface/linux/hw_info_config_linux_tests.h"
+
+using namespace NEO;
+
+struct HwInfoConfigTestLinuxRkl : HwInfoConfigTestLinux {
+    void SetUp() override {
+        HwInfoConfigTestLinux::SetUp();
+
+        drm = new DrmMock();
+        osInterface->get()->setDrm(drm);
+
+        drm->StoredDeviceID = DEVICE_ID_4C8A;
+        drm->setGtType(GTTYPE_GT1);
+    }
+};
+
+RKLTEST_F(HwInfoConfigTestLinuxRkl, configureHwInfoRkl) {
+    auto hwInfoConfig = HwInfoConfig::get(productFamily);
+    int ret = hwInfoConfig->configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
+    EXPECT_EQ(0, ret);
+    EXPECT_EQ((unsigned short)drm->StoredDeviceID, outHwInfo.platform.usDeviceID);
+    EXPECT_EQ((unsigned short)drm->StoredDeviceRevID, outHwInfo.platform.usRevId);
+    EXPECT_EQ((uint32_t)drm->StoredEUVal, outHwInfo.gtSystemInfo.EUCount);
+    EXPECT_EQ((uint32_t)drm->StoredSSVal, outHwInfo.gtSystemInfo.SubSliceCount);
+    EXPECT_EQ(1u, outHwInfo.gtSystemInfo.SliceCount);
+
+    EXPECT_EQ(GTTYPE_GT1, outHwInfo.platform.eGTType);
+    EXPECT_TRUE(outHwInfo.featureTable.ftrGT1);
+    EXPECT_FALSE(outHwInfo.featureTable.ftrGT1_5);
+    EXPECT_FALSE(outHwInfo.featureTable.ftrGT2);
+    EXPECT_FALSE(outHwInfo.featureTable.ftrGT3);
+    EXPECT_FALSE(outHwInfo.featureTable.ftrGT4);
+    EXPECT_FALSE(outHwInfo.featureTable.ftrGTA);
+    EXPECT_FALSE(outHwInfo.featureTable.ftrGTC);
+    EXPECT_FALSE(outHwInfo.featureTable.ftrGTX);
+    EXPECT_FALSE(outHwInfo.featureTable.ftrTileY);
+}
+
+RKLTEST_F(HwInfoConfigTestLinuxRkl, whenCallAdjustPlatformThenDoNothing) {
+    auto hwInfoConfig = HwInfoConfig::get(productFamily);
+    outHwInfo = pInHwInfo;
+    hwInfoConfig->adjustPlatformForProductFamily(&outHwInfo);
+
+    int ret = memcmp(&outHwInfo.platform, &pInHwInfo.platform, sizeof(PLATFORM));
+    EXPECT_EQ(0, ret);
+}
+
+RKLTEST_F(HwInfoConfigTestLinuxRkl, negative) {
+    auto hwInfoConfig = HwInfoConfig::get(productFamily);
+
+    drm->StoredRetValForDeviceID = -1;
+    int ret = hwInfoConfig->configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
+    EXPECT_EQ(-1, ret);
+
+    drm->StoredRetValForDeviceID = 0;
+    drm->StoredRetValForDeviceRevID = -1;
+    ret = hwInfoConfig->configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
+    EXPECT_EQ(-1, ret);
+
+    drm->StoredRetValForDeviceRevID = 0;
+    drm->failRetTopology = true;
+    drm->StoredRetValForEUVal = -1;
+    ret = hwInfoConfig->configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
+    EXPECT_EQ(-1, ret);
+
+    drm->StoredRetValForEUVal = 0;
+    drm->StoredRetValForSSVal = -1;
+    ret = hwInfoConfig->configureHwInfo(&pInHwInfo, &outHwInfo, osInterface);
+    EXPECT_EQ(-1, ret);
+}
+
+TEST(RklHwInfoTests, gtSetupIsCorrect) {
+    HardwareInfo hwInfo{};
+    DrmMock drm;
+    GT_SYSTEM_INFO &gtSystemInfo = hwInfo.gtSystemInfo;
+    DeviceDescriptor device = {0, &hwInfo, &RKL_HW_CONFIG::setupHardwareInfo, GTTYPE_GT1};
+
+    int ret = drm.setupHardwareInfo(&device, false);
+
+    EXPECT_EQ(ret, 0);
+    EXPECT_GT(gtSystemInfo.EUCount, 0u);
+    EXPECT_GT(gtSystemInfo.ThreadCount, 0u);
+    EXPECT_GT(gtSystemInfo.SliceCount, 0u);
+    EXPECT_GT(gtSystemInfo.SubSliceCount, 0u);
+    EXPECT_GT_VAL(gtSystemInfo.L3CacheSizeInKb, 0u);
+    EXPECT_EQ(gtSystemInfo.CsrSizeInMb, 8u);
+    EXPECT_FALSE(gtSystemInfo.IsDynamicallyPopulated);
+    EXPECT_GT(gtSystemInfo.DualSubSliceCount, 0u);
+    EXPECT_GT(gtSystemInfo.MaxDualSubSlicesSupported, 0u);
+}

opencl/test/unit_test/gen12lp/rkl/test_hw_helper_rkl.cpp

@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "opencl/test/unit_test/helpers/hw_helper_tests.h"
+
+using HwHelperTestRkl = HwHelperTest;
+
+RKLTEST_F(HwHelperTestRkl, givenRklA0WhenAdjustDefaultEngineTypeCalledThenRcsIsReturned) {
+    HwHelper &hwHelper = HwHelper::get(hardwareInfo.platform.eRenderCoreFamily);
+    hardwareInfo.featureTable.ftrCCSNode = true;
+    hardwareInfo.platform.usRevId = hwHelper.getHwRevIdFromStepping(REVISION_A0, hardwareInfo);
+
+    auto &helper = HwHelper::get(renderCoreFamily);
+    helper.adjustDefaultEngineType(&hardwareInfo);
+    EXPECT_EQ(aub_stream::ENGINE_RCS, hardwareInfo.capabilityTable.defaultEngineType);
+}
+
+RKLTEST_F(HwHelperTestRkl, givenRklBWhenAdjustDefaultEngineTypeCalledThenCcsIsReturned) {
+    HwHelper &hwHelper = HwHelper::get(hardwareInfo.platform.eRenderCoreFamily);
+    hardwareInfo.featureTable.ftrCCSNode = true;
+    hardwareInfo.platform.usRevId = hwHelper.getHwRevIdFromStepping(REVISION_B, hardwareInfo);
+
+    auto &helper = HwHelper::get(renderCoreFamily);
+    helper.adjustDefaultEngineType(&hardwareInfo);
+    EXPECT_EQ(aub_stream::ENGINE_RCS, hardwareInfo.capabilityTable.defaultEngineType);
+}
+
+RKLTEST_F(HwHelperTestRkl, givenRklWhenRequestedVmeFlagsThenReturnFalse) {
+    EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.supportsVme);
+    EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.ftrSupportsVmeAvcTextureSampler);
+    EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.ftrSupportsVmeAvcPreemption);
+}
+
+RKLTEST_F(HwHelperTestRkl, givenRklWhenSteppingA0OrB0ThenIntegerDivisionEmulationIsEnabled) {
+    HwHelper &hwHelper = HwHelper::get(hardwareInfo.platform.eRenderCoreFamily);
+    uint32_t steppings[] = {
+        REVISION_A0,
+        REVISION_B};
+
+    for (auto stepping : steppings) {
+        hardwareInfo.platform.usRevId = hwHelper.getHwRevIdFromStepping(stepping, hardwareInfo);
+        auto &helper = HwHelper::get(renderCoreFamily);
+        EXPECT_TRUE(helper.isForceEmuInt32DivRemSPWARequired(hardwareInfo));
+    }
+}
+
+RKLTEST_F(HwHelperTestRkl, givenRklWhenSteppingC0ThenIntegerDivisionEmulationIsNotEnabled) {
+    HwHelper &hwHelper = HwHelper::get(hardwareInfo.platform.eRenderCoreFamily);
+    hardwareInfo.platform.usRevId = hwHelper.getHwRevIdFromStepping(REVISION_C, hardwareInfo);
+    auto &helper = HwHelper::get(renderCoreFamily);
+    EXPECT_FALSE(helper.isForceEmuInt32DivRemSPWARequired(hardwareInfo));
+}

opencl/test/unit_test/gen12lp/rkl/test_hw_info_config_rkl.cpp

@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/hw_helper.h"
+
+#include "opencl/source/helpers/hardware_commands_helper.h"
+#include "test.h"
+
+using namespace NEO;
+
+using RklHwInfo = ::testing::Test;
+
+RKLTEST_F(RklHwInfo, givenBoolWhenCallRklHardwareInfoSetupThenFeatureTableAndWorkaroundTableAreSetCorrect) {
+    uint64_t configs[] = {
+        0x100020010};
+    bool boolValue[]{
+        true, false};
+    HardwareInfo hwInfo;
+    GT_SYSTEM_INFO &gtSystemInfo = hwInfo.gtSystemInfo;
+    FeatureTable &featureTable = hwInfo.featureTable;
+    WorkaroundTable &workaroundTable = hwInfo.workaroundTable;
+
+    for (auto &config : configs) {
+        for (auto setParamBool : boolValue) {
+
+            gtSystemInfo = {0};
+            featureTable = {};
+            workaroundTable = {};
+            hardwareInfoSetup[productFamily](&hwInfo, setParamBool, config);
+
+            EXPECT_EQ(setParamBool, featureTable.ftrL3IACoherency);
+            EXPECT_EQ(setParamBool, featureTable.ftrPPGTT);
+            EXPECT_EQ(setParamBool, featureTable.ftrSVM);
+            EXPECT_EQ(setParamBool, featureTable.ftrIA32eGfxPTEs);
+            EXPECT_EQ(setParamBool, featureTable.ftrStandardMipTailFormat);
+
+            EXPECT_EQ(setParamBool, featureTable.ftrTranslationTable);
+            EXPECT_EQ(setParamBool, featureTable.ftrUserModeTranslationTable);
+            EXPECT_EQ(setParamBool, featureTable.ftrTileMappedResource);
+            EXPECT_EQ(setParamBool, featureTable.ftrEnableGuC);
+
+            EXPECT_EQ(setParamBool, featureTable.ftrFbc);
+            EXPECT_EQ(setParamBool, featureTable.ftrFbc2AddressTranslation);
+            EXPECT_EQ(setParamBool, featureTable.ftrFbcBlitterTracking);
+            EXPECT_EQ(setParamBool, featureTable.ftrFbcCpuTracking);
+            EXPECT_EQ(setParamBool, featureTable.ftrTileY);
+
+            EXPECT_EQ(setParamBool, featureTable.ftrAstcHdr2D);
+            EXPECT_EQ(setParamBool, featureTable.ftrAstcLdr2D);
+            EXPECT_EQ(setParamBool, featureTable.ftr3dMidBatchPreempt);
+            EXPECT_EQ(setParamBool, featureTable.ftrGpGpuMidBatchPreempt);
+            EXPECT_EQ(setParamBool, featureTable.ftrGpGpuThreadGroupLevelPreempt);
+            EXPECT_EQ(setParamBool, featureTable.ftrPerCtxtPreemptionGranularityControl);
+
+            EXPECT_EQ(setParamBool, workaroundTable.wa4kAlignUVOffsetNV12LinearSurface);
+            EXPECT_EQ(setParamBool, workaroundTable.waEnablePreemptionGranularityControlByUMD);
+        }
+    }
+}
+
+RKLTEST_F(RklHwInfo, whenPlatformIsRklThenExpectSvmIsSet) {
+    const HardwareInfo &hardwareInfo = RKL::hwInfo;
+    EXPECT_TRUE(hardwareInfo.capabilityTable.ftrSvm);
+}
+
+RKLTEST_F(RklHwInfo, givenRklWhenCheckFtrSupportsInteger64BitAtomicsThenReturnFalse) {
+    const HardwareInfo &hardwareInfo = RKL::hwInfo;
+    EXPECT_TRUE(hardwareInfo.capabilityTable.ftrSupportsInteger64BitAtomics);
+}

opencl/test/unit_test/gen12lp/rkl/windows/CMakeLists.txt

@@ -0,0 +1,13 @@
+#
+# Copyright (C) 2018-2020 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+set(IGDRCL_SRCS_tests_gen12_rkl_windows
+    ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+    ${CMAKE_CURRENT_SOURCE_DIR}/hw_info_config_tests_rkl.cpp
+)
+if(WIN32)
+  target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_gen12_rkl_windows})
+endif()

opencl/test/unit_test/gen12lp/rkl/windows/hw_info_config_tests_rkl.cpp

@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/os_interface/windows/os_interface.h"
+
+#include "opencl/test/unit_test/os_interface/windows/hw_info_config_win_tests.h"
+
+using namespace NEO;
+
+using HwInfoConfigTestWindowsRkl = HwInfoConfigTestWindows;
+
+RKLTEST_F(HwInfoConfigTestWindowsRkl, whenCallAdjustPlatformThenDoNothing) {
+    EXPECT_EQ(IGFX_ROCKETLAKE, productFamily);
+
+    auto hwInfoConfig = HwInfoConfig::get(productFamily);
+    PLATFORM *testPlatform = &outHwInfo.platform;
+    testPlatform->eDisplayCoreFamily = IGFX_GEN11_CORE;
+    testPlatform->eRenderCoreFamily = IGFX_GEN11_CORE;
+    hwInfoConfig->adjustPlatformForProductFamily(&outHwInfo);
+
+    EXPECT_EQ(IGFX_GEN12LP_CORE, testPlatform->eRenderCoreFamily);
+    EXPECT_EQ(IGFX_GEN12LP_CORE, testPlatform->eDisplayCoreFamily);
+}

opencl/test/unit_test/gen12lp/special_ult_helper_gen12lp.cpp

@@ -16,6 +16,10 @@ bool SpecialUltHelperGen12lp::additionalCoherencyCheck(PRODUCT_FAMILY productFam
 }
 
 bool SpecialUltHelperGen12lp::shouldPerformimagePitchAlignment(PRODUCT_FAMILY productFamily) {
+    if (productFamily == IGFX_ROCKETLAKE) {
+        return false;
+    }
+
     return true;
 }
 
@@ -24,6 +28,10 @@ bool SpecialUltHelperGen12lp::shouldTestDefaultImplementationOfSetupHardwareCapa
 }
 
 bool SpecialUltHelperGen12lp::isPipeControlWArequired(PRODUCT_FAMILY productFamily) {
+    if (productFamily == IGFX_ROCKETLAKE) {
+        return false;
+    }
+
     return true;
 }
 

shared/offline_compiler/source/extra_settings.cpp

@@ -12,7 +12,7 @@
 
 namespace NEO {
 void OfflineCompiler::resolveExtraSettings() {
-    if (deviceName == "tgllp") {
+    if (deviceName == "tgllp" || deviceName == "rkl") {
         CompilerOptions::concatenateAppend(internalOptions, CompilerOptions::forceEmuInt32DivRemSP);
     }
 }

shared/source/gen12lp/enable_gen12lp.cpp

@@ -18,5 +18,8 @@ static EnableGfxProductHw<IGFX_TIGERLAKE_LP> enableGfxProductHwTGLLP;
 #ifdef SUPPORT_DG1
 static EnableGfxProductHw<IGFX_DG1> enableGfxProductHwDG1;
 #endif
+#ifdef SUPPORT_RKL
+static EnableGfxProductHw<IGFX_ROCKETLAKE> enableGfxProductHwRKL;
+#endif
 
 } // namespace NEO

shared/source/gen12lp/enable_hw_info_config_gen12lp.cpp

@@ -16,4 +16,7 @@ static EnableProductHwInfoConfig<IGFX_TIGERLAKE_LP> enableTGLLP;
 #ifdef SUPPORT_DG1
 static EnableProductHwInfoConfig<IGFX_DG1> enableDG1;
 #endif
+#ifdef SUPPORT_RKL
+static EnableProductHwInfoConfig<IGFX_ROCKETLAKE> enableRKL;
+#endif
 } // namespace NEO

shared/source/gen12lp/helpers_gen12lp.cpp

@@ -56,11 +56,12 @@ bool isOffsetToSkipSetFFIDGPWARequired(const HardwareInfo &hwInfo) {
 
 bool isForceEmuInt32DivRemSPWARequired(const HardwareInfo &hwInfo) {
     HwHelper &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily);
-    return ((hwInfo.platform.eProductFamily == IGFX_TIGERLAKE_LP) & hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo));
+    return (((hwInfo.platform.eProductFamily == IGFX_TIGERLAKE_LP) & (hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo))) ||
+            ((hwInfo.platform.eProductFamily == IGFX_ROCKETLAKE) & (hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_C, hwInfo))));
 }
 
 bool is3DPipelineSelectWARequired(const HardwareInfo &hwInfo) {
-    return hwInfo.platform.eProductFamily == IGFX_TIGERLAKE_LP;
+    return (hwInfo.platform.eProductFamily == IGFX_TIGERLAKE_LP || hwInfo.platform.eProductFamily == IGFX_ROCKETLAKE);
 }
 
 bool forceBlitterUseForGlobalBuffers(const HardwareInfo &hwInfo) {

shared/source/gen12lp/helpers_gen12lp_dg1.cpp

@@ -7,6 +7,7 @@
 
 #include "shared/source/command_stream/command_stream_receiver.h"
 #include "shared/source/gen12lp/helpers_gen12lp.h"
+#include "shared/source/helpers/hw_helper.h"
 
 #include "opencl/source/aub_mem_dump/page_table_entry_bits.h"
 #include "opencl/source/command_stream/command_stream_receiver_simulated_common_hw.h"
@@ -74,15 +75,18 @@ void setAdditionalPipelineSelectFields(void *pipelineSelectCmd,
                                        const HardwareInfo &hwInfo) {}
 
 bool isOffsetToSkipSetFFIDGPWARequired(const HardwareInfo &hwInfo) {
-    return (hwInfo.platform.usRevId == REVISION_A0);
+    HwHelper &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily);
+    return hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo);
 }
 
 bool isForceEmuInt32DivRemSPWARequired(const HardwareInfo &hwInfo) {
-    return ((hwInfo.platform.eProductFamily == IGFX_TIGERLAKE_LP) & (hwInfo.platform.usRevId == REVISION_A0));
+    HwHelper &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily);
+    return (((hwInfo.platform.eProductFamily == IGFX_TIGERLAKE_LP) & (hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo))) ||
+            ((hwInfo.platform.eProductFamily == IGFX_ROCKETLAKE) & (hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_C, hwInfo))));
 }
 
 bool is3DPipelineSelectWARequired(const HardwareInfo &hwInfo) {
-    return (hwInfo.platform.eProductFamily == IGFX_TIGERLAKE_LP || hwInfo.platform.eProductFamily == IGFX_DG1);
+    return (hwInfo.platform.eProductFamily == IGFX_TIGERLAKE_LP || hwInfo.platform.eProductFamily == IGFX_DG1 || hwInfo.platform.eProductFamily == IGFX_ROCKETLAKE);
 }
 
 bool forceBlitterUseForGlobalBuffers(const HardwareInfo &hwInfo) {

shared/source/gen12lp/hw_cmds.h

@@ -13,3 +13,6 @@
 #ifdef SUPPORT_DG1
 #include "hw_cmds_dg1.h"
 #endif
+#ifdef SUPPORT_RKL
+#include "hw_cmds_rkl.h"
+#endif

shared/source/gen12lp/hw_cmds_rkl.h

@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#pragma once
+#include "shared/source/gen12lp/hw_cmds_base.h"
+namespace NEO {
+struct RKL : public TGLLPFamily {
+    static const PLATFORM platform;
+    static const HardwareInfo hwInfo;
+    static const uint64_t defaultHardwareInfoConfig;
+    static FeatureTable featureTable;
+    static WorkaroundTable workaroundTable;
+    static const uint32_t threadsPerEu = 7;
+    static const uint32_t maxEuPerSubslice = 16;
+    static const uint32_t maxSlicesSupported = 1;
+    static const RuntimeCapabilityTable capabilityTable;
+    static void (*setupHardwareInfo)(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig);
+    static void setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo);
+};
+class RKL_HW_CONFIG : public RKL {
+  public:
+    static void setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable);
+    static const HardwareInfo hwInfo;
+
+  private:
+    static GT_SYSTEM_INFO gtSystemInfo;
+};
+
+} // namespace NEO

shared/source/gen12lp/hw_helper_gen12lp.cpp

@@ -74,6 +74,15 @@ uint32_t HwHelperHw<Family>::getHwRevIdFromStepping(uint32_t stepping, const Har
         case REVISION_C:
             return 0x3;
         }
+    } else if (hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ROCKETLAKE) {
+        switch (stepping) {
+        case REVISION_A0:
+            return 0x0;
+        case REVISION_B:
+            return 0x1;
+        case REVISION_C:
+            return 0x4;
+        }
     }
     return Gen12LPHelpers::getHwRevIdFromStepping(stepping, hwInfo);
 }
@@ -89,6 +98,15 @@ uint32_t HwHelperHw<Family>::getSteppingFromHwRevId(uint32_t hwRevId, const Hard
         case 0x3:
             return REVISION_C;
         }
+    } else if (hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ROCKETLAKE) {
+        switch (hwRevId) {
+        case 0x0:
+            return REVISION_A0;
+        case 0x1:
+            return REVISION_B;
+        case 0x4:
+            return REVISION_C;
+        }
     }
     return Gen12LPHelpers::getSteppingFromHwRevId(hwRevId, hwInfo);
 }

shared/source/gen12lp/hw_info.h

@@ -12,3 +12,6 @@
 #ifdef SUPPORT_DG1
 #include "hw_info_dg1.h"
 #endif
+#ifdef SUPPORT_RKL
+#include "hw_info_rkl.h"
+#endif

shared/source/gen12lp/hw_info_rkl.h

@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#pragma once
+#include "hw_info_gen12lp.h"
+
+namespace NEO {
+
+struct RKL;
+
+template <>
+struct HwMapper<IGFX_ROCKETLAKE> {
+    enum { gfxFamily = IGFX_GEN12LP_CORE };
+
+    static const char *abbreviation;
+    typedef GfxFamilyMapper<static_cast<GFXCORE_FAMILY>(gfxFamily)>::GfxFamily GfxFamily;
+    typedef RKL GfxProduct;
+};
+} // namespace NEO

shared/test/unit_test/test_macros/header/test.h

@@ -919,6 +919,16 @@ extern GFXCORE_FAMILY renderCoreFamily;
                       IGFX_GEN12LP_CORE,          \
                       IGFX_DG1)
 #endif
+#ifdef TESTS_RKL
+#define RKLTEST_F(test_fixture, test_name)                           \
+    FAMILYTEST_TEST_(test_fixture, test_name, test_fixture,          \
+                     ::testing::internal::GetTypeId<test_fixture>(), \
+                     IGFX_GEN12LP_CORE, IGFX_ROCKETLAKE)
+#define RKLTEST_P(test_suite_name, test_name)     \
+    FAMILYTEST_TEST_P(test_suite_name, test_name, \
+                      IGFX_GEN12LP_CORE,          \
+                      IGFX_ROCKETLAKE)
+#endif
 #define HWTEST_TYPED_TEST(CaseName, TestName)                                                                  \
     CHECK_TEST_NAME_LENGTH(CaseName, TestName)                                                                 \
     template <typename gtest_TypeParam_>                                                                       \
@@ -1067,3 +1077,4 @@ using IsKBL = IsProduct<IGFX_KABYLAKE>;
 using IsLKF = IsProduct<IGFX_LAKEFIELD>;
 using IsSKL = IsProduct<IGFX_SKYLAKE>;
 using IsTGLLP = IsProduct<IGFX_TIGERLAKE_LP>;
+using IsRKL = IsProduct<IGFX_ROCKETLAKE>;

target_unit_tests/gen12lp/rkl/CMakeLists.txt

@@ -0,0 +1,10 @@
+#
+# Copyright (C) 2020 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_RKL)
+  set(unit_test_config "rkl/1/2/16")
+  include(${NEO_SOURCE_DIR}/cmake/run_ult_target.cmake)
+endif()