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Ocloc asm/disasm support for zebin
This commit adds option to disassemble and assemble zebinary. Disasm disassembles zebinary into sections. Text sections are translated to assembly, relocations and symbols are translated into human readable format. Asm assembles zebinary from files generated by disasm. Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
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Compute-Runtime-Automation
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@@ -48,10 +48,14 @@ struct ZeInfoKernelSections {
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UniqueNode inlineSamplersNd;
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};
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DecodeError validateZeInfoVersion(const Elf::ZebinKernelMetadata::Types::Version &receivedZeInfoVersion, std::string &outErrReason, std::string &outWarning);
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template <Elf::ELF_IDENTIFIER_CLASS numBits>
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bool validateTargetDevice(const Elf::Elf<numBits> &elf, const TargetDevice &targetDevice, std::string &outErrReason, std::string &outWarning);
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DecodeError validateZeInfoVersion(const Elf::ZebinKernelMetadata::Types::Version &receivedZeInfoVersion, std::string &outErrReason, std::string &outWarning);
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template <Elf::ELF_IDENTIFIER_CLASS numBits>
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DecodeError decodeIntelGTNoteSection(ArrayRef<const uint8_t> intelGTNotesSection, std::vector<Elf::IntelGTNote> &intelGTNotes, std::string &outErrReason, std::string &outWarning);
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template <Elf::ELF_IDENTIFIER_CLASS numBits>
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DecodeError getIntelGTNotes(const Elf::Elf<numBits> &elf, std::vector<Elf::IntelGTNote> &intelGTNotes, std::string &outErrReason, std::string &outWarning);
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