feature: add support for NVLS

Related-To: NEO-16649

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>

.clang-tidy

@@ -1,5 +1,5 @@
 ---
-Checks:          'clang-diagnostic-*,clang-analyzer-*,-clang-analyzer-osx.*,-clang-analyzer-optin.osx.*,-clang-analyzer-nullability.*,google-default-arguments,readability-identifier-naming,modernize-use-override,modernize-use-default-member-init,-clang-analyzer-alpha*,-clang-diagnostic-instantiation-after-specialization'
+Checks:          'clang-diagnostic-*,clang-analyzer-*,-clang-analyzer-osx.*,-clang-analyzer-optin.osx.*,-clang-analyzer-nullability.*,google-default-arguments,readability-identifier-naming,modernize-use-override,modernize-use-default-member-init,-clang-analyzer-alpha*,-clang-diagnostic-instantiation-after-specialization,-clang-analyzer-optin.core.EnumCastOutOfRange'
 WarningsAsErrors: '.*'
 HeaderFilterRegex: '(shared|opencl|level_zero).+\.(h|hpp|inl)$'
 CheckOptions:

cmake/setup_platform_flags.cmake

@@ -13,10 +13,10 @@ SET_FLAGS_FOR_CURRENT("XE_HPG_CORE" "DG2" "MTL" "ARL")
 SET_FLAGS_FOR_CURRENT("XE2_HPG_CORE" "BMG" "LNL")
 
 if(CMAKE_SIZEOF_VOID_P EQUAL 8)
-  SET_FLAGS_FOR_CURRENT("XE3_CORE" "PTL")
+  SET_FLAGS_FOR_CURRENT("XE3_CORE" "PTL" "NVLS")
   SET_FLAGS_FOR_CURRENT("XE_HPC_CORE" "PVC")
 else()
-  DISABLE_32BIT_FLAGS_FOR("XE3_CORE" "PTL")
+  DISABLE_32BIT_FLAGS_FOR("XE3_CORE" "PTL" "NVLS")
   DISABLE_32BIT_FLAGS_FOR("XE_HPC_CORE" "PVC")
 endif()
 
@@ -319,4 +319,14 @@ if(SUPPORT_XE3_CORE)
       ADD_PRODUCT("TESTED" "PTL" "IGFX_PTL")
     endif()
   endif()
+  if(SUPPORT_NVLS)
+    ADD_PRODUCT("SUPPORTED" "NVLS" "NEO::nvlsProductEnumValue")
+    ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED" "XE3_CORE" "NVLS")
+    ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED_IMAGES" "XE3_CORE" "NVLS")
+    ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED_STATELESS" "XE3_CORE" "NVLS")
+    if(TESTS_NVLS)
+      ADD_ITEM_FOR_CORE_TYPE("PLATFORMS" "TESTED" "XE3_CORE" "NVLS")
+      ADD_PRODUCT("TESTED" "NVLS" "NEO::nvlsProductEnumValue")
+    endif()
+  endif()
 endif()

level_zero/core/source/xe3_core/nvls/CMakeLists.txt

@@ -0,0 +1,17 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_NVLS)
+  target_sources(${L0_STATIC_LIB_NAME} PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/cmdqueue_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/image_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/kernel_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/mutable_cmdlist_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/sampler_nvls.cpp
+  )
+endif()

level_zero/core/source/xe3_core/nvls/cmdlist_nvls.cpp

@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+
+#include "level_zero/core/source/xe3_core/cmdlist_xe3_core.h"
+
+namespace L0 {
+
+static CommandListPopulateFactory<NEO::nvlsProductEnumValue, CommandListProductFamily<NEO::nvlsProductEnumValue>>
+    populateNVLS;
+
+static CommandListImmediatePopulateFactory<NEO::nvlsProductEnumValue, CommandListImmediateProductFamily<NEO::nvlsProductEnumValue>>
+    populateNVLSImmediate;
+
+} // namespace L0

level_zero/core/source/xe3_core/nvls/cmdqueue_nvls.cpp

@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe3_core/hw_cmds_base.h"
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+
+#include "level_zero/core/source/cmdqueue/cmdqueue_hw.inl"
+#include "level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl"
+
+namespace L0 {
+template struct CommandQueueHw<IGFX_XE3_CORE>;
+static CommandQueuePopulateFactory<NEO::nvlsProductEnumValue, CommandQueueHw<IGFX_XE3_CORE>>
+    populateNVLS;
+
+} // namespace L0

level_zero/core/source/xe3_core/nvls/image_nvls.cpp

@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/core/source/xe3_core/image_xe3_core.inl"
+
+namespace L0 {
+
+template <>
+struct ImageProductFamily<NEO::nvlsProductEnumValue> : public ImageCoreFamily<IGFX_XE3_CORE> {
+    using ImageCoreFamily::ImageCoreFamily;
+
+    ze_result_t initialize(Device *device, const ze_image_desc_t *desc) override {
+        return ImageCoreFamily<IGFX_XE3_CORE>::initialize(device, desc);
+    };
+};
+
+static ImagePopulateFactory<NEO::nvlsProductEnumValue, ImageProductFamily<NEO::nvlsProductEnumValue>> populateNVLS;
+
+} // namespace L0

level_zero/core/source/xe3_core/nvls/kernel_nvls.cpp

@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe3_core/hw_cmds_base.h"
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+
+#include "level_zero/core/source/kernel/kernel_hw.h"
+
+namespace L0 {
+
+static KernelPopulateFactory<NEO::nvlsProductEnumValue, KernelHw<IGFX_XE3_CORE>> populateNVLS;
+
+} // namespace L0

level_zero/core/source/xe3_core/nvls/mutable_cmdlist_nvls.cpp

@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe3_core/hw_cmds_base.h"
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+
+#include "level_zero/core/source/mutable_cmdlist/mutable_cmdlist_hw.inl"
+#include "level_zero/core/source/xe3_core/mutable_cmdlist_xe3_core.h"
+
+namespace L0::MCL {
+static MutableCommandListPopulateFactory<NEO::nvlsProductEnumValue, MutableCommandListProductFamily<NEO::nvlsProductEnumValue>>
+    populateMutableNVLS;
+} // namespace L0::MCL

level_zero/core/source/xe3_core/nvls/sampler_nvls.cpp

@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe3_core/hw_cmds_base.h"
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+
+#include "level_zero/core/source/sampler/sampler_hw.inl"
+
+namespace L0 {
+
+template <>
+struct SamplerProductFamily<NEO::nvlsProductEnumValue> : public SamplerCoreFamily<IGFX_XE3_CORE> {
+    using SamplerCoreFamily::SamplerCoreFamily;
+};
+
+static SamplerPopulateFactory<NEO::nvlsProductEnumValue, SamplerProductFamily<NEO::nvlsProductEnumValue>> populateNVLS;
+
+} // namespace L0

level_zero/sysman/source/shared/linux/product_helper/xe3_core/nvls/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_NVLS)
+  target_sources(${L0_STATIC_LIB_NAME}
+                 PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/enable_sysman_product_helper_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/sysman_product_helper_nvls.cpp
+  )
+endif()
+

level_zero/sysman/source/shared/linux/product_helper/xe3_core/nvls/enable_sysman_product_helper_nvls.cpp

@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_hw.h"
+
+namespace L0 {
+namespace Sysman {
+
+static EnableSysmanProductHelper<NEO::nvlsProductEnumValue> enableNVLS;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/linux/product_helper/xe3_core/nvls/sysman_product_helper_nvls.cpp

@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_hw.h"
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_hw.inl"
+
+namespace L0 {
+namespace Sysman {
+constexpr static auto gfxProduct = NEO::nvlsProductEnumValue;
+
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_xe_hp_and_later.inl"
+
+template <>
+bool SysmanProductHelperHw<gfxProduct>::isZesInitSupported() {
+    return true;
+}
+
+template class SysmanProductHelperHw<gfxProduct>;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/windows/product_helper/xe3_core/nvls/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_NVLS)
+  target_sources(${L0_STATIC_LIB_NAME}
+                 PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/enable_sysman_product_helper_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/sysman_product_helper_nvls.cpp
+  )
+endif()
+

level_zero/sysman/source/shared/windows/product_helper/xe3_core/nvls/enable_sysman_product_helper_nvls.cpp

@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/windows/product_helper/sysman_product_helper_hw.h"
+
+namespace L0 {
+namespace Sysman {
+
+static EnableSysmanProductHelper<NEO::nvlsProductEnumValue> enableNvls;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/windows/product_helper/xe3_core/nvls/sysman_product_helper_nvls.cpp

@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/windows/product_helper/sysman_product_helper_hw.h"
+#include "level_zero/sysman/source/shared/windows/product_helper/sysman_product_helper_hw.inl"
+
+namespace L0 {
+namespace Sysman {
+constexpr static auto gfxProduct = NEO::nvlsProductEnumValue;
+
+template <>
+bool SysmanProductHelperHw<gfxProduct>::isZesInitSupported() {
+    return true;
+}
+
+template class SysmanProductHelperHw<gfxProduct>;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/test/unit_tests/sources/shared/windows/product_helper/sysman_product_helper_init_tests.cpp

@@ -35,6 +35,11 @@ HWTEST2_F(SysmanProductHelperSysmanInitTest, GivenValidProductHelperHandleWhenQu
     EXPECT_TRUE(pSysmanProductHelper->isZesInitSupported());
 }
 
+HWTEST2_F(SysmanProductHelperSysmanInitTest, GivenValidProductHelperHandleWhenQueryingForZesInitSupportThenTrueIsReturned, IsNVLS) {
+    auto pSysmanProductHelper = L0::Sysman::SysmanProductHelper::create(defaultHwInfo->platform.eProductFamily);
+    EXPECT_TRUE(pSysmanProductHelper->isZesInitSupported());
+}
+
 } // namespace ult
 } // namespace Sysman
 } // namespace L0

opencl/test/unit_test/offline_compiler/decoder/decoder_tests.cpp

@@ -799,6 +799,7 @@ TEST(DecoderHelperTest, GivenProductFamilyWhenTranslatingToIgaGenBaseThenExpecte
         std::pair{IGFX_BMG, IGA_XE2},
         std::pair{IGFX_LUNARLAKE, IGA_XE2},
         std::pair{IGFX_PTL, IGA_XE3},
+        std::pair{nvlsProductEnumValue, IGA_XE3},
 
         std::pair{IGFX_UNKNOWN, IGA_GEN_INVALID}};
 

opencl/test/unit_test/offline_compiler/xe3_core/nvls/CMakeLists.txt

@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_NVLS)
+  target_sources(ocloc_tests PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/offline_compiler_tests_nvls.cpp
+  )
+endif()

opencl/test/unit_test/offline_compiler/xe3_core/nvls/offline_compiler_tests_nvls.cpp

@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/offline_compiler/source/ocloc_arg_helper.h"
+#include "shared/source/helpers/product_config_helper.h"
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+#include "shared/source/xe3_core/nvls/device_ids_configs_nvls.h"
+#include "shared/test/common/helpers/stream_capture.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/test/unit_test/offline_compiler/mock/mock_offline_compiler.h"
+
+#include "neo_aot_platforms.h"
+
+using namespace NEO;
+using ProductConfigHelperNvlsTests = ::testing::Test;
+
+using NvlsOfflineCompilerTests = ::testing::Test;
+
+NVLSTEST_F(NvlsOfflineCompilerTests, givenNvlUDeviceIdValueWhenInitHwInfoThenCorrectValuesAreSet) {
+    MockOfflineCompiler mockOfflineCompiler;
+    HardwareIpVersion nvlsConfig = AOT::NVL_U_A0;
+
+    std::string deviceStr;
+    for (const auto &deviceID : nvlUDeviceIds) {
+        std::stringstream deviceIDStr, expectedOutput;
+
+        deviceIDStr << "0x" << std::hex << deviceID;
+        deviceStr = mockOfflineCompiler.argHelper->productConfigHelper->getAcronymForProductConfig(nvlsConfig.value);
+
+        StreamCapture capture;
+        capture.captureStdout();
+        mockOfflineCompiler.initHardwareInfo(deviceIDStr.str());
+        std::string output = capture.getCapturedStdout();
+        expectedOutput << "Auto-detected target based on " << deviceIDStr.str() << " device id: " << deviceStr << "\n";
+
+        EXPECT_STREQ(output.c_str(), expectedOutput.str().c_str());
+        EXPECT_EQ(mockOfflineCompiler.hwInfo.platform.usDeviceID, deviceID);
+        EXPECT_EQ(mockOfflineCompiler.deviceConfig, nvlsConfig.value);
+    }
+}
+
+NVLSTEST_F(NvlsOfflineCompilerTests, givenNvlSDeviceIdValueWhenInitHwInfoThenCorrectValuesAreSet) {
+    MockOfflineCompiler mockOfflineCompiler;
+    HardwareIpVersion nvlsConfig = AOT::NVL_S_A0;
+
+    std::string deviceStr;
+    for (const auto &deviceID : nvlSDeviceIds) {
+        std::stringstream deviceIDStr, expectedOutput;
+
+        deviceIDStr << "0x" << std::hex << deviceID;
+        deviceStr = mockOfflineCompiler.argHelper->productConfigHelper->getAcronymForProductConfig(nvlsConfig.value);
+
+        StreamCapture capture;
+        capture.captureStdout();
+        mockOfflineCompiler.initHardwareInfo(deviceIDStr.str());
+        std::string output = capture.getCapturedStdout();
+        expectedOutput << "Auto-detected target based on " << deviceIDStr.str() << " device id: " << deviceStr << "\n";
+
+        EXPECT_STREQ(output.c_str(), expectedOutput.str().c_str());
+        EXPECT_EQ(mockOfflineCompiler.hwInfo.platform.usDeviceID, deviceID);
+        EXPECT_EQ(mockOfflineCompiler.deviceConfig, nvlsConfig.value);
+    }
+}

opencl/test/unit_test/xe3_core/nvls/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_NVLS)
+  set(IGDRCL_SRCS_tests_xe3_core_nvls
+      ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+  )
+
+  target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_xe3_core_nvls})
+  add_subdirectories()
+endif()

opencl/test/unit_test/xe3_core/nvls/linux/CMakeLists.txt

@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(UNIX)
+  add_subdirectories()
+endif()

opencl/test/unit_test/xe3_core/nvls/linux/dll/CMakeLists.txt

@@ -0,0 +1,11 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+set(IGDRCL_SRCS_linux_dll_tests_xe3_core_nvls
+    ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+    ${CMAKE_CURRENT_SOURCE_DIR}/device_id_tests_nvls.cpp
+)
+target_sources(igdrcl_linux_dll_tests PRIVATE ${IGDRCL_SRCS_linux_dll_tests_xe3_core_nvls})

opencl/test/unit_test/xe3_core/nvls/linux/dll/device_id_tests_nvls.cpp

@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/fixtures/linux/device_id_fixture.h"
+
+using namespace NEO;
+
+TEST_F(DeviceIdTests, GivenNvlsSupportedDeviceIdThenDeviceDescriptorTableExists) {
+    std::array<DeviceDescriptor, 6> expectedDescriptors = {{
+        {0xD740, &NvlsHwConfig::hwInfo, &NvlsHwConfig::setupHardwareInfo},
+        {0xD741, &NvlsHwConfig::hwInfo, &NvlsHwConfig::setupHardwareInfo},
+        {0xD742, &NvlsHwConfig::hwInfo, &NvlsHwConfig::setupHardwareInfo},
+        {0xD743, &NvlsHwConfig::hwInfo, &NvlsHwConfig::setupHardwareInfo},
+        {0xD744, &NvlsHwConfig::hwInfo, &NvlsHwConfig::setupHardwareInfo},
+        {0xD745, &NvlsHwConfig::hwInfo, &NvlsHwConfig::setupHardwareInfo},
+    }};
+
+    testImpl(expectedDescriptors);
+}

shared/offline_compiler/source/decoder/translate_platform_base.h

@@ -11,6 +11,9 @@
 #include "neo_igfxfmid.h"
 
 inline iga_gen_t translateToIgaGenBase(PRODUCT_FAMILY productFamily) {
+    if (productFamily == NEO::nvlsProductEnumValue) {
+        return IGA_XE3;
+    }
     switch (productFamily) {
     default:
         return IGA_GEN_INVALID;

shared/source/ail/xe3_core/nvls/ail_configuration_nvls.cpp

@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/ail/ail_configuration_base.inl"
+
+namespace NEO {
+static EnableAIL<nvlsProductEnumValue> enableAILNVLS;
+
+template class AILConfigurationHw<nvlsProductEnumValue>;
+
+} // namespace NEO

shared/source/dll/devices/devices_base.inl

@@ -22,6 +22,14 @@ DEVICE(0xB0B0, PtlHwConfig)
 DEVICE(0xFD80, PtlHwConfig)
 DEVICE(0xFD81, PtlHwConfig)
 #endif
+#ifdef SUPPORT_NVLS
+DEVICE(0xD740, NvlsHwConfig)
+DEVICE(0xD741, NvlsHwConfig)
+DEVICE(0xD742, NvlsHwConfig)
+DEVICE(0xD743, NvlsHwConfig)
+DEVICE(0xD744, NvlsHwConfig)
+DEVICE(0xD745, NvlsHwConfig)
+#endif
 #endif
 
 #if SUPPORT_XE2_HPG_CORE

shared/source/dll/devices/product_config_base.inl

@@ -14,6 +14,13 @@ DEVICE_CONFIG(PTL_H_B0, PtlHwConfig, ptlHDeviceIds, XE3_FAMILY, XE3_LPG_RELEASE)
 DEVICE_CONFIG(PTL_U_A0, PtlHwConfig, ptlUDeviceIds, XE3_FAMILY, XE3_LPG_RELEASE)
 DEVICE_CONFIG(PTL_U_A1, PtlHwConfig, ptlUDeviceIds, XE3_FAMILY, XE3_LPG_RELEASE)
 #endif
+#ifdef SUPPORT_NVLS
+DEVICE_CONFIG(NVL_U_A0, NvlsHwConfig, nvlUDeviceIds, XE3_FAMILY, XE3_LPG_RELEASE)
+DEVICE_CONFIG(NVL_U_A1, NvlsHwConfig, nvlUDeviceIds, XE3_FAMILY, XE3_LPG_RELEASE)
+DEVICE_CONFIG(NVL_U_B0, NvlsHwConfig, nvlUDeviceIds, XE3_FAMILY, XE3_LPG_RELEASE)
+DEVICE_CONFIG(NVL_S_A0, NvlsHwConfig, nvlSDeviceIds, XE3_FAMILY, XE3_LPG_RELEASE)
+DEVICE_CONFIG(NVL_S_B0, NvlsHwConfig, nvlSDeviceIds, XE3_FAMILY, XE3_LPG_RELEASE)
+#endif
 #endif
 
 #if SUPPORT_XE2_HPG_CORE

shared/source/gmm_helper/igfxfmid_wrapper/neo_igfxfmid.h

@@ -12,5 +12,6 @@
 namespace NEO {
 constexpr GFXCORE_FAMILY xe3pCoreEnumValue = static_cast<GFXCORE_FAMILY>(0x2300);                     // NOLINT(clang-analyzer-optin.core.EnumCastOutOfRange), NEO-16649
 constexpr GFXCORE_FAMILY maxCoreEnumValue = static_cast<GFXCORE_FAMILY>(xe3pCoreEnumValue + 1);       // NOLINT(clang-analyzer-optin.core.EnumCastOutOfRange), NEO-16649
-constexpr PRODUCT_FAMILY maxProductEnumValue = IGFX_MAX_PRODUCT;
+constexpr PRODUCT_FAMILY nvlsProductEnumValue = static_cast<PRODUCT_FAMILY>(1340);                    // NOLINT(clang-analyzer-optin.core.EnumCastOutOfRange), NEO-16649
+constexpr PRODUCT_FAMILY maxProductEnumValue = static_cast<PRODUCT_FAMILY>(nvlsProductEnumValue + 1); // NOLINT(clang-analyzer-optin.core.EnumCastOutOfRange), NEO-16649
 } // namespace NEO

shared/source/helpers/definitions/device_ids_configs_base.h

@@ -11,6 +11,9 @@
 #ifdef SUPPORT_PTL
 #include "device_ids_configs_ptl.h"
 #endif
+#ifdef SUPPORT_NVLS
+#include "shared/source/xe3_core/nvls/device_ids_configs_nvls.h"
+#endif
 #endif
 
 #if SUPPORT_XE2_HPG_CORE

shared/source/xe3_core/CMakeLists.txt

@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_XE3_CORE)
+  add_subdirectories()
+endif()

shared/source/xe3_core/definitions/enable_xe3_core_products.inl

@@ -19,3 +19,8 @@ uint32_t L1CachePolicyHelper<IGFX_PTL>::getDefaultL1CachePolicy(bool isDebuggerA
 template struct L1CachePolicyHelper<IGFX_PTL>;
 static EnableGfxProductHw<IGFX_PTL> enableGfxProductHwPTL;
 #endif
+
+#ifdef SUPPORT_NVLS
+template struct L1CachePolicyHelper<nvlsProductEnumValue>;
+static EnableGfxProductHw<nvlsProductEnumValue> enableGfxProductHwNVLS;
+#endif

shared/source/xe3_core/definitions/hw_cmds_xe3_core.h

@@ -11,3 +11,8 @@
 #include "shared/source/xe3_core/hw_cmds_ptl.h"
 #include "shared/source/xe3_core/hw_info_ptl.h"
 #endif
+
+#ifdef SUPPORT_NVLS
+#include "shared/source/xe3_core/hw_cmds_nvls.h"
+#include "shared/source/xe3_core/hw_info_nvls.h"
+#endif

shared/source/xe3_core/enable_compiler_product_helper_nvls.cpp

@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/compiler_product_helper.h"
+#include "shared/source/helpers/compiler_product_helper_base.inl"
+#include "shared/source/helpers/compiler_product_helper_enable_subgroup_local_block_io.inl"
+#include "shared/source/helpers/compiler_product_helper_mtl_and_later.inl"
+#include "shared/source/helpers/compiler_product_helper_xe_hp_and_later.inl"
+#include "shared/source/helpers/compiler_product_helper_xe_hpc_and_later.inl"
+
+#include "neo_aot_platforms.h"
+
+constexpr auto gfxProduct = NEO::nvlsProductEnumValue;
+
+namespace NEO {
+template <>
+uint32_t CompilerProductHelperHw<gfxProduct>::getDefaultHwIpVersion() const {
+    return AOT::NVL_S_A0;
+}
+
+static EnableCompilerProductHelper<gfxProduct> enableCompilerProductHelperNVLS;
+
+} // namespace NEO

shared/source/xe3_core/enable_product_helper_nvls.cpp

@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/os_interface/product_helper.h"
+#include "shared/source/os_interface/product_helper_hw.h"
+#include "shared/source/xe3_core/hw_cmds_nvls.h"
+#include "shared/source/xe3_core/hw_info_nvls.h"
+
+namespace NEO {
+
+static EnableProductHelper<nvlsProductEnumValue> enableNVLS;
+
+} // namespace NEO

shared/source/xe3_core/hw_cmds_nvls.h

@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#pragma once
+#include "shared/source/helpers/hw_info.h"
+#include "shared/source/xe3_core/hw_cmds_base.h"
+
+namespace NEO {
+
+struct NVLS : public Xe3CoreFamily {
+    static const PLATFORM platform;
+    static const HardwareInfo hwInfo;
+    static FeatureTable featureTable;
+    static WorkaroundTable workaroundTable;
+    static const RuntimeCapabilityTable capabilityTable;
+    static void (*setupHardwareInfo)(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig, const ReleaseHelper *releaseHelper);
+    static void setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo, const ReleaseHelper &releaseHelper);
+    static void setupHardwareInfoBase(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, const ReleaseHelper *releaseHelper);
+    static void adjustHardwareInfo(HardwareInfo *hwInfo);
+
+    static constexpr bool isDcFlushAllowed = true;
+};
+
+class NvlsHwConfig : public NVLS {
+  public:
+    static void setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, const ReleaseHelper *releaseHelper);
+    static const HardwareInfo hwInfo;
+
+  private:
+    static GT_SYSTEM_INFO gtSystemInfo;
+};
+
+} // namespace NEO

shared/source/xe3_core/hw_info_nvls.cpp

@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe3_core/hw_info_nvls.h"
+
+#include "shared/source/command_stream/preemption_mode.h"
+#include "shared/source/debug_settings/debug_settings_manager.h"
+#include "shared/source/helpers/constants.h"
+#include "shared/source/release_helper/release_helper.h"
+#include "shared/source/xe3_core/hw_cmds_nvls.h"
+
+#include "aubstream/engine_node.h"
+
+namespace NEO {
+
+const char *HwMapper<nvlsProductEnumValue>::abbreviation = "nvls";
+
+const PLATFORM NVLS::platform = {
+    nvlsProductEnumValue,
+    PCH_UNKNOWN,
+    IGFX_XE3_CORE,
+    IGFX_XE3_CORE,
+    PLATFORM_NONE, // default init
+    0,             // usDeviceID
+    0,             // usRevId. 0 sets the stepping to A0
+    0,             // usDeviceID_PCH
+    0,             // usRevId_PCH
+    GTTYPE_UNDEFINED};
+
+const RuntimeCapabilityTable NVLS::capabilityTable{
+    .directSubmissionEngines = makeDirectSubmissionPropertiesPerEngine({
+        {aub_stream::ENGINE_CCS, {.engineSupported = true, .submitOnInit = false, .useNonDefault = false, .useRootDevice = true}},
+    }),
+    .kmdNotifyProperties = {0, 0, 0, 0, false, false, false, false},
+    .gpuAddressSpace = MemoryConstants::max48BitAddress,
+    .sharedSystemMemCapabilities = 0,
+    .requiredPreemptionSurfaceSize = MemoryConstants::pageSize,
+    .deviceName = "",
+    .preferredPlatformName = nullptr,
+    .defaultPreemptionMode = PreemptionMode::MidThread,
+    .defaultEngineType = aub_stream::ENGINE_CCS,
+    .maxRenderFrequency = 0,
+    .extraQuantityThreadsPerEU = 0,
+    .maxProgrammableSlmSize = 128,
+    .grfSize = sizeof(NVLS::GRF),
+    .timestampValidBits = 64,
+    .kernelTimestampValidBits = 64,
+    .blitterOperationsSupported = false,
+    .ftrSupportsFP64 = true,
+    .ftrSupportsFP64Emulation = false,
+    .ftrSupports64BitMath = true,
+    .ftrSupportsCoherency = false,
+    .ftrRenderCompressedBuffers = false,
+    .ftrRenderCompressedImages = false,
+    .instrumentationEnabled = true,
+    .supportCacheFlushAfterWalker = false,
+    .supportsImages = true,
+    .supportsOnDemandPageFaults = true,
+    .supportsIndependentForwardProgress = true,
+    .isIntegratedDevice = true,
+    .supportsMediaBlock = false,
+    .fusedEuEnabled = false,
+    .l0DebuggerSupported = true,
+};
+
+void NVLS::setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo, const ReleaseHelper &releaseHelper) {
+    setupDefaultFeatureTableAndWorkaroundTable(hwInfo, releaseHelper);
+    FeatureTable *featureTable = &hwInfo->featureTable;
+
+    featureTable->flags.ftrE2ECompression = true;
+    featureTable->flags.ftrFlatPhysCCS = true;
+    featureTable->flags.ftrWalkerMTP = true;
+    featureTable->flags.ftrTile64Optimization = true;
+    featureTable->flags.ftrXe2PlusTiling = true;
+    featureTable->flags.ftrPml5Support = true;
+
+    featureTable->ftrBcsInfo = 1;
+}
+
+void NVLS::setupHardwareInfoBase(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, const ReleaseHelper *releaseHelper) {
+    setupDefaultGtSysInfo(hwInfo);
+
+    hwInfo->gtSystemInfo.NumThreadsPerEu = 10u;
+    hwInfo->gtSystemInfo.ThreadCount = hwInfo->gtSystemInfo.EUCount * hwInfo->gtSystemInfo.NumThreadsPerEu;
+
+    adjustHardwareInfo(hwInfo);
+    if (setupFeatureTableAndWorkaroundTable) {
+        setupFeatureAndWorkaroundTable(hwInfo, *releaseHelper);
+    }
+
+    applyDebugOverrides(*hwInfo);
+}
+
+FeatureTable NVLS::featureTable{};
+WorkaroundTable NVLS::workaroundTable{};
+
+const HardwareInfo NvlsHwConfig::hwInfo = {
+    &NVLS::platform,
+    &NVLS::featureTable,
+    &NVLS::workaroundTable,
+    &NvlsHwConfig::gtSystemInfo,
+    NVLS::capabilityTable};
+
+GT_SYSTEM_INFO NvlsHwConfig::gtSystemInfo = {0};
+void NvlsHwConfig::setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, const ReleaseHelper *releaseHelper) {
+    NVLS::setupHardwareInfoBase(hwInfo, setupFeatureTableAndWorkaroundTable, releaseHelper);
+}
+
+const HardwareInfo NVLS::hwInfo = NvlsHwConfig::hwInfo;
+
+void setupNVLSHardwareInfoImpl(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig, const ReleaseHelper *releaseHelper) {
+    NvlsHwConfig::setupHardwareInfo(hwInfo, setupFeatureTableAndWorkaroundTable, releaseHelper);
+}
+
+void (*NVLS::setupHardwareInfo)(HardwareInfo *, bool, uint64_t, const ReleaseHelper *) = setupNVLSHardwareInfoImpl;
+} // namespace NEO

shared/source/xe3_core/hw_info_nvls.h

@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#pragma once
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+
+namespace NEO {
+
+struct NVLS;
+
+template <>
+struct HwMapper<nvlsProductEnumValue> {
+    enum { gfxFamily = IGFX_XE3_CORE };
+
+    static const char *abbreviation;
+    using GfxFamily = GfxFamilyMapper<static_cast<GFXCORE_FAMILY>(gfxFamily)>::GfxFamily;
+    using GfxProduct = NVLS;
+};
+} // namespace NEO

shared/source/xe3_core/linux/hw_info_extra_nvls.cpp

@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/unified_memory/usm_memory_support.h"
+#include "shared/source/xe3_core/hw_cmds_nvls.h"
+
+namespace NEO {
+
+void NVLS::adjustHardwareInfo(HardwareInfo *hwInfo) {
+    hwInfo->capabilityTable.sharedSystemMemCapabilities = (UnifiedSharedMemoryFlags::access | UnifiedSharedMemoryFlags::concurrentAccess | UnifiedSharedMemoryFlags::concurrentAtomicAccess);
+}
+
+} // namespace NEO

shared/source/xe3_core/linux/product_helper_nvls.cpp

@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/hw_info.h"
+#include "shared/source/os_interface/product_helper_hw.h"
+#include "shared/source/xe3_core/hw_cmds_nvls.h"
+#include "shared/source/xe3_core/hw_info_nvls.h"
+
+constexpr static auto gfxProduct = NEO::nvlsProductEnumValue;
+
+#include "shared/source/os_interface/linux/product_helper_mtl_and_later.inl"
+#include "shared/source/os_interface/linux/product_helper_xe2_and_later_drm_slm.inl"
+#include "shared/source/xe3_core/nvls/os_agnostic_product_helper_nvls.inl"
+#include "shared/source/xe3_core/os_agnostic_product_helper_xe3_core.inl"
+
+namespace NEO {
+
+#include "shared/source/os_interface/linux/product_helper_xe_hpc_and_later.inl"
+
+template <>
+int ProductHelperHw<gfxProduct>::configureHardwareCustom(HardwareInfo *hwInfo, OSInterface *osIface) const {
+    hwInfo->featureTable.flags.ftr57bGPUAddressing = (hwInfo->capabilityTable.gpuAddressSpace == maxNBitValue(57));
+
+    enableBlitterOperationsSupport(hwInfo);
+
+    return 0;
+}
+
+template <>
+bool ProductHelperHw<gfxProduct>::isDisableScratchPagesSupported() const {
+    return true;
+}
+
+template <>
+uint64_t ProductHelperHw<gfxProduct>::getSharedSystemPatIndex() const {
+    return 1;
+}
+
+template <>
+bool ProductHelperHw<gfxProduct>::useSharedSystemUsm() const {
+    return false;
+}
+
+template class ProductHelperHw<gfxProduct>;
+} // namespace NEO

shared/source/xe3_core/nvls/device_ids_configs_nvls.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#pragma once
+
+#include <vector>
+
+namespace NEO {
+const std::vector<unsigned short> nvlUDeviceIds{0xD741, 0xD742};
+const std::vector<unsigned short> nvlSDeviceIds{0xD740, 0xD743, 0xD744, 0xD745};
+} // namespace NEO

shared/source/xe3_core/nvls/os_agnostic_product_helper_nvls.inl

@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/memory_manager/allocation_properties.h"
+
+#include "aubstream/product_family.h"
+
+namespace NEO {
+
+template <>
+bool ProductHelperHw<gfxProduct>::overrideAllocationCpuCacheable(const AllocationData &allocationData) const {
+    return GraphicsAllocation::isAccessedFromCommandStreamer(allocationData.type);
+}
+
+template <>
+std::optional<aub_stream::ProductFamily> ProductHelperHw<gfxProduct>::getAubStreamProductFamily() const {
+    return aub_stream::ProductFamily::Ptl;
+};
+
+template <>
+bool ProductHelperHw<gfxProduct>::isBufferPoolAllocatorSupported() const {
+    return false;
+}
+
+template <>
+std::optional<GfxMemoryAllocationMethod> ProductHelperHw<gfxProduct>::getPreferredAllocationMethod(AllocationType allocationType) const {
+    return GfxMemoryAllocationMethod::allocateByKmd;
+}
+template <>
+bool ProductHelperHw<gfxProduct>::isCachingOnCpuAvailable() const {
+    return false;
+}
+
+template <>
+bool ProductHelperHw<gfxProduct>::isStagingBuffersEnabled() const {
+    return true;
+}
+
+template <>
+bool ProductHelperHw<gfxProduct>::isCompressionFormatFromGmmRequired() const {
+    return true;
+}
+
+} // namespace NEO

shared/source/xe3_core/windows/hw_info_extra_nvls.cpp

@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe3_core/hw_cmds_nvls.h"
+#include "shared/source/xe3_core/hw_info_nvls.h"
+
+namespace NEO {
+
+void NVLS::adjustHardwareInfo(HardwareInfo *hwInfo) {}
+
+} // namespace NEO

shared/source/xe3_core/windows/product_helper_nvls.cpp

@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/os_interface/product_helper_hw.h"
+#include "shared/source/xe3_core/hw_cmds_nvls.h"
+#include "shared/source/xe3_core/hw_info_nvls.h"
+
+constexpr static auto gfxProduct = NEO::nvlsProductEnumValue;
+
+#include "shared/source/os_interface/windows/product_helper_xe2_and_later_wddm.inl"
+#include "shared/source/xe3_core/nvls/os_agnostic_product_helper_nvls.inl"
+#include "shared/source/xe3_core/os_agnostic_product_helper_xe3_core.inl"
+
+namespace NEO {
+
+template class ProductHelperHw<gfxProduct>;
+
+} // namespace NEO

shared/test/common/test_macros/header/common_matchers.h

@@ -204,6 +204,7 @@ using IsBMG = IsProduct<IGFX_BMG>;
 using IsNotBMG = IsNotWithinProducts<IGFX_BMG, IGFX_BMG>;
 using IsLNL = IsProduct<IGFX_LUNARLAKE>;
 using IsPTL = IsProduct<IGFX_PTL>;
+using IsNVLS = IsProduct<NEO::nvlsProductEnumValue>;
 
 using IsAtMostDg2 = IsAtMostProduct<IGFX_DG2>;
 using IsAtLeastPVC = IsAtLeastProduct<IGFX_PVC>;

shared/test/common/test_macros/header/per_product_test_definitions.h

@@ -168,3 +168,14 @@
                       IGFX_XE3_CORE,              \
                       IGFX_PTL)
 #endif
+
+#ifdef TESTS_NVLS
+#define NVLSTEST_F(test_fixture, test_name)                          \
+    FAMILYTEST_TEST_(test_fixture, test_name, test_fixture,          \
+                     ::testing::internal::GetTypeId<test_fixture>(), \
+                     IGFX_XE3_CORE, nvlsProductEnumValue)
+#define NVLSTEST_P(test_suite_name, test_name)    \
+    FAMILYTEST_TEST_P(test_suite_name, test_name, \
+                      IGFX_XE3_CORE,              \
+                      nvlsProductEnumValue)
+#endif

shared/test/common/xe3_core/nvls/mock_product_helper_nvls.cpp

@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/helpers/mock_product_helper_hw.h"
+
+constexpr static auto gfxProduct = NEO::nvlsProductEnumValue;
+
+#include "shared/test/common/helpers/mock_product_helper_hw.inl"
+
+template struct NEO::MockProductHelperHw<gfxProduct>;

shared/test/common/xe3_core/nvls/product_configs_nvls.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#pragma once
+#include "neo_aot_platforms.h"
+
+namespace AOT_NVLS {
+inline constexpr AOT::PRODUCT_CONFIG productConfigs[] = {
+    AOT::NVL_U_A0,
+    AOT::NVL_S_A0};
+}

shared/test/unit_test/xe3_core/nvls/CMakeLists.txt

@@ -0,0 +1,17 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_NVLS)
+  target_sources(neo_shared_tests PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/excludes_xe3_core_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/hw_aot_config_tests_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/hw_info_tests_nvls.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/product_helper_tests_nvls.cpp
+  )
+
+  add_subdirectories()
+endif()

shared/test/unit_test/xe3_core/nvls/excludes_xe3_core_nvls.cpp

@@ -0,0 +1,12 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/test_macros/hw_test_base.h"
+
+using namespace NEO;
+
+HWTEST_EXCLUDE_PRODUCT(ProductHelperTest, whenGettingPreferredAllocationMethodThenNoPreferenceIsReturned, nvlsProductEnumValue);

shared/test/unit_test/xe3_core/nvls/hw_aot_config_tests_nvls.cpp

@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/product_config_helper.h"
+#include "shared/test/common/test_macros/test.h"
+#include "shared/test/common/xe3_core/nvls/product_configs_nvls.h"
+#include "shared/test/unit_test/fixtures/product_config_fixture.h"
+
+using namespace NEO;
+INSTANTIATE_TEST_SUITE_P(ProductConfigHwInfoNvlsTests,
+                         ProductConfigHwInfoTests,
+                         ::testing::Combine(::testing::ValuesIn(AOT_NVLS::productConfigs),
+                                            ::testing::Values(nvlsProductEnumValue)));

shared/test/unit_test/xe3_core/nvls/hw_info_tests_nvls.cpp

@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/compiler_product_helper.h"
+#include "shared/source/helpers/constants.h"
+#include "shared/source/helpers/hw_info.h"
+#include "shared/source/release_helper/release_helper.h"
+#include "shared/source/xe3_core/hw_cmds_nvls.h"
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/helpers/default_hw_info.h"
+#include "shared/test/common/helpers/gtest_helpers.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+using namespace NEO;
+
+using NvlsHwInfoTest = ::testing::Test;
+
+NVLSTEST_F(NvlsHwInfoTest, WhenGettingHardwareInfoThenNvlsIsReturned) {
+    EXPECT_EQ(nvlsProductEnumValue, defaultHwInfo->platform.eProductFamily);
+}
+
+NVLSTEST_F(NvlsHwInfoTest, WhenSetupHardwareInfoWithSetupFeatureTableFlagTrueOrFalseIsCalledThenFeatureTableHasCorrectValues) {
+    HardwareInfo hwInfo = *defaultHwInfo;
+    auto compilerProductHelper = CompilerProductHelper::create(hwInfo.platform.eProductFamily);
+    auto releaseHelper = ReleaseHelper::create(hwInfo.ipVersion);
+    FeatureTable &featureTable = hwInfo.featureTable;
+    WorkaroundTable &workaroundTable = hwInfo.workaroundTable;
+
+    EXPECT_FALSE(featureTable.flags.ftrLocalMemory);
+    EXPECT_FALSE(featureTable.flags.ftrFlatPhysCCS);
+    EXPECT_FALSE(featureTable.flags.ftrLinearCCS);
+    EXPECT_FALSE(featureTable.flags.ftrE2ECompression);
+    EXPECT_FALSE(featureTable.flags.ftrXe2Compression);
+    EXPECT_FALSE(featureTable.flags.ftrXe2PlusTiling);
+    EXPECT_FALSE(featureTable.flags.ftrPml5Support);
+    EXPECT_FALSE(featureTable.flags.ftrCCSNode);
+    EXPECT_FALSE(featureTable.flags.ftrCCSRing);
+    EXPECT_FALSE(featureTable.flags.ftrMultiTileArch);
+    NvlsHwConfig::setupHardwareInfo(&hwInfo, false, releaseHelper.get());
+    EXPECT_FALSE(featureTable.flags.ftrLocalMemory);
+    EXPECT_FALSE(featureTable.flags.ftrFlatPhysCCS);
+    EXPECT_FALSE(featureTable.flags.ftrLinearCCS);
+    EXPECT_FALSE(featureTable.flags.ftrE2ECompression);
+    EXPECT_FALSE(featureTable.flags.ftrXe2Compression);
+    EXPECT_FALSE(featureTable.flags.ftrXe2PlusTiling);
+    EXPECT_FALSE(featureTable.flags.ftrPml5Support);
+    EXPECT_FALSE(featureTable.flags.ftrCCSNode);
+    EXPECT_FALSE(featureTable.flags.ftrCCSRing);
+    EXPECT_FALSE(featureTable.flags.ftrMultiTileArch);
+    NvlsHwConfig::setupHardwareInfo(&hwInfo, true, releaseHelper.get());
+    EXPECT_TRUE(featureTable.flags.ftrFlatPhysCCS);
+    EXPECT_TRUE(featureTable.flags.ftrLinearCCS);
+    EXPECT_TRUE(featureTable.flags.ftrE2ECompression);
+    EXPECT_EQ(featureTable.flags.ftrXe2Compression, releaseHelper->getFtrXe2Compression());
+    EXPECT_TRUE(featureTable.flags.ftrXe2PlusTiling);
+    EXPECT_TRUE(featureTable.flags.ftrPml5Support);
+    EXPECT_TRUE(featureTable.flags.ftrCCSNode);
+    EXPECT_TRUE(featureTable.flags.ftrCCSRing);
+    EXPECT_TRUE(featureTable.flags.ftrPPGTT);
+    EXPECT_TRUE(featureTable.flags.ftrSVM);
+    EXPECT_TRUE(featureTable.flags.ftrL3IACoherency);
+    EXPECT_TRUE(featureTable.flags.ftrIA32eGfxPTEs);
+    EXPECT_TRUE(featureTable.flags.ftrStandardMipTailFormat);
+    EXPECT_TRUE(featureTable.flags.ftrTranslationTable);
+    EXPECT_TRUE(featureTable.flags.ftrUserModeTranslationTable);
+    EXPECT_TRUE(featureTable.flags.ftrTileMappedResource);
+    EXPECT_TRUE(featureTable.flags.ftrFbc);
+    EXPECT_TRUE(featureTable.flags.ftrAstcHdr2D);
+    EXPECT_TRUE(featureTable.flags.ftrAstcLdr2D);
+    EXPECT_FALSE(featureTable.flags.ftrTileY);
+    EXPECT_EQ(1u, featureTable.ftrBcsInfo.to_ulong());
+    EXPECT_TRUE(workaroundTable.flags.wa4kAlignUVOffsetNV12LinearSurface);
+}
+
+NVLSTEST_F(NvlsHwInfoTest, whenCheckDirectSubmissionEnginesThenProperValuesAreSetToTrue) {
+    HardwareInfo hwInfo = *defaultHwInfo;
+    const auto &directSubmissionEngines = hwInfo.capabilityTable.directSubmissionEngines;
+
+    for (uint32_t i = 0; i < aub_stream::NUM_ENGINES; i++) {
+        switch (i) {
+        case aub_stream::ENGINE_CCS:
+            EXPECT_TRUE(directSubmissionEngines.data[i].engineSupported);
+            EXPECT_FALSE(directSubmissionEngines.data[i].submitOnInit);
+            EXPECT_FALSE(directSubmissionEngines.data[i].useNonDefault);
+            EXPECT_TRUE(directSubmissionEngines.data[i].useRootDevice);
+            break;
+        default:
+            EXPECT_FALSE(directSubmissionEngines.data[i].engineSupported);
+            EXPECT_FALSE(directSubmissionEngines.data[i].submitOnInit);
+            EXPECT_FALSE(directSubmissionEngines.data[i].useNonDefault);
+            EXPECT_FALSE(directSubmissionEngines.data[i].useRootDevice);
+        }
+    }
+}

shared/test/unit_test/xe3_core/nvls/linux/CMakeLists.txt

@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(UNIX)
+  target_sources(neo_shared_tests PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/product_helper_tests_nvls_linux.cpp)
+endif()

shared/test/unit_test/xe3_core/nvls/linux/product_helper_tests_nvls_linux.cpp

@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/os_interface/os_interface.h"
+#include "shared/source/xe3_core/hw_cmds_nvls.h"
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+#include "shared/test/common/helpers/default_hw_info.h"
+#include "shared/test/common/helpers/gtest_helpers.h"
+#include "shared/test/common/os_interface/linux/drm_mock_extended.h"
+#include "shared/test/unit_test/os_interface/linux/product_helper_linux_tests.h"
+
+#include "per_product_test_definitions.h"
+
+using namespace NEO;
+
+struct NvlsProductHelperLinux : ProductHelperTestLinux {
+    void SetUp() override {
+        ProductHelperTestLinux::SetUp();
+
+        drm = new DrmMockExtended(*executionEnvironment->rootDeviceEnvironments[0]);
+        osInterface->setDriverModel(std::unique_ptr<DriverModel>(drm));
+    }
+};
+
+NVLSTEST_F(NvlsProductHelperLinux, givenProductHelperWhenAskedGetSharedSystemPatIndexThenReturnCorrectValue) {
+    EXPECT_EQ(1ull, productHelper->getSharedSystemPatIndex());
+}
+
+NVLSTEST_F(NvlsProductHelperLinux, givenProductHelperWhenAskedUseSharedSystemUsmThenReturnCorrectValue) {
+    EXPECT_FALSE(productHelper->useSharedSystemUsm());
+}
+
+using NvlsHwInfoLinux = ::testing::Test;
+
+NVLSTEST_F(NvlsHwInfoLinux, WhenGtIsSetupThenGtSystemInfoIsCorrect) {
+    auto executionEnvironment = std::make_unique<ExecutionEnvironment>();
+    executionEnvironment->prepareRootDeviceEnvironments(1);
+    executionEnvironment->rootDeviceEnvironments[0]->setHwInfoAndInitHelpers(defaultHwInfo.get());
+    executionEnvironment->rootDeviceEnvironments[0]->initGmm();
+
+    DrmMock drm(*executionEnvironment->rootDeviceEnvironments[0]);
+    DeviceDescriptor device = {0, &NvlsHwConfig::hwInfo, &NvlsHwConfig::setupHardwareInfo};
+
+    int ret = drm.setupHardwareInfo(&device, false);
+
+    const auto &gtSystemInfo = executionEnvironment->rootDeviceEnvironments[0]->getHardwareInfo()->gtSystemInfo;
+
+    EXPECT_EQ(ret, 0);
+    EXPECT_GT(gtSystemInfo.EUCount, 0u);
+    EXPECT_GT(gtSystemInfo.ThreadCount, 0u);
+    EXPECT_GT(gtSystemInfo.SliceCount, 0u);
+    EXPECT_GT(gtSystemInfo.SubSliceCount, 0u);
+    EXPECT_GT_VAL(gtSystemInfo.L3CacheSizeInKb, 0u);
+    EXPECT_TRUE(gtSystemInfo.IsDynamicallyPopulated);
+    EXPECT_GT(gtSystemInfo.DualSubSliceCount, 0u);
+    EXPECT_GT(gtSystemInfo.MaxDualSubSlicesSupported, 0u);
+}

shared/test/unit_test/xe3_core/nvls/product_helper_tests_nvls.cpp

@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/compiler_product_helper.h"
+#include "shared/source/memory_manager/allocation_properties.h"
+#include "shared/source/memory_manager/allocation_type.h"
+#include "shared/source/os_interface/product_helper.h"
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/mocks/mock_command_stream_receiver.h"
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/unit_test/os_interface/product_helper_tests.h"
+
+#include "neo_aot_platforms.h"
+
+using namespace NEO;
+
+using NvlsProductHelper = ProductHelperTest;
+
+NVLSTEST_F(NvlsProductHelper, whenGettingPreferredAllocationMethodThenAllocateByKmdIsReturned) {
+    for (auto i = 0; i < static_cast<int>(AllocationType::count); i++) {
+        auto allocationType = static_cast<AllocationType>(i);
+        auto preferredAllocationMethod = productHelper->getPreferredAllocationMethod(allocationType);
+        EXPECT_TRUE(preferredAllocationMethod.has_value());
+        EXPECT_EQ(GfxMemoryAllocationMethod::allocateByKmd, preferredAllocationMethod.value());
+    }
+}
+
+NVLSTEST_F(NvlsProductHelper, givenCompilerProductHelperWhenGetDefaultHwIpVersionThenCorrectValueIsSet) {
+    EXPECT_EQ(compilerProductHelper->getDefaultHwIpVersion(), AOT::NVL_S_A0);
+}
+
+HWTEST_EXCLUDE_PRODUCT(CompilerProductHelperFixture, WhenIsMidThreadPreemptionIsSupportedIsCalledThenCorrectResultIsReturned, nvlsProductEnumValue);
+NVLSTEST_F(NvlsProductHelper, givenCompilerProductHelperWhenGetMidThreadPreemptionSupportThenCorrectValueIsSet) {
+    auto hwInfo = *defaultHwInfo;
+    hwInfo.featureTable.flags.ftrWalkerMTP = false;
+    EXPECT_FALSE(compilerProductHelper->isMidThreadPreemptionSupported(hwInfo));
+    hwInfo.featureTable.flags.ftrWalkerMTP = true;
+    EXPECT_TRUE(compilerProductHelper->isMidThreadPreemptionSupported(hwInfo));
+}
+
+NVLSTEST_F(NvlsProductHelper, givenProductHelperWhenCheckoverrideAllocationCpuCacheableThenTrueIsReturnedForCommandBuffer) {
+    AllocationData allocationData{};
+    allocationData.type = AllocationType::commandBuffer;
+    EXPECT_TRUE(productHelper->overrideAllocationCpuCacheable(allocationData));
+
+    allocationData.type = AllocationType::buffer;
+    EXPECT_FALSE(productHelper->overrideAllocationCpuCacheable(allocationData));
+}
+
+NVLSTEST_F(NvlsProductHelper, givenProductHelperWhenCallIsCachingOnCpuAvailableThenFalseIsReturned) {
+    EXPECT_FALSE(productHelper->isCachingOnCpuAvailable());
+}
+
+NVLSTEST_F(NvlsProductHelper, givenProductHelperWhenCallIsStagingBuffersEnabledThenReturnTrue) {
+    EXPECT_TRUE(productHelper->isStagingBuffersEnabled());
+}
+
+NVLSTEST_F(NvlsProductHelper, givenProductHelperWhenCheckingIsBufferPoolAllocatorSupportedThenCorrectValueIsReturned) {
+    EXPECT_FALSE(productHelper->isBufferPoolAllocatorSupported());
+}
+
+NVLSTEST_F(NvlsProductHelper, givenDebugFlagWhenCheckingIsResolveDependenciesByPipeControlsSupportedThenTheFlagDerivedValueIsReturned) {
+    DebugManagerStateRestore restorer;
+
+    auto mockDevice = std::unique_ptr<MockDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(nullptr));
+    MockCommandStreamReceiverWithDirectSubmissionRelaxedOrdering<false> csr(*mockDevice->getExecutionEnvironment(), mockDevice->getRootDeviceIndex(), mockDevice->getDeviceBitfield());
+    MockCommandStreamReceiverWithDirectSubmissionRelaxedOrdering<true> csrRelaxed(*mockDevice->getExecutionEnvironment(), mockDevice->getRootDeviceIndex(), mockDevice->getDeviceBitfield());
+    csr.taskCount = 2;
+    csrRelaxed.taskCount = 2;
+    auto productHelper = &mockDevice->getProductHelper();
+
+    debugManager.flags.ResolveDependenciesViaPipeControls.set(0);
+    EXPECT_FALSE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, false, 2, csr));
+    EXPECT_FALSE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, true, 2, csr));
+    EXPECT_FALSE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, false, 3, csr));
+    EXPECT_FALSE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, false, 2, csrRelaxed));
+
+    debugManager.flags.ResolveDependenciesViaPipeControls.set(1);
+    EXPECT_TRUE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, false, 2, csr));
+    EXPECT_TRUE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, true, 2, csr));
+    EXPECT_TRUE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, false, 3, csr));
+    EXPECT_TRUE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, false, 2, csrRelaxed));
+}
+
+NVLSTEST_F(NvlsProductHelper, givenResolveDependenciesByPipeControllsSupportedWhenCheckedThenReturnsTrue) {
+    auto mockDevice = std::unique_ptr<MockDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(nullptr));
+    MockCommandStreamReceiverWithDirectSubmissionRelaxedOrdering<false> csr(*mockDevice->getExecutionEnvironment(), mockDevice->getRootDeviceIndex(), mockDevice->getDeviceBitfield());
+    csr.taskCount = 2;
+    auto productHelper = &mockDevice->getProductHelper();
+
+    EXPECT_TRUE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, false, 2, csr));
+}
+
+NVLSTEST_F(NvlsProductHelper, givenResolveDependenciesByPipeControllsNotSupportedWhenCheckedThenReturnsFalse) {
+    auto mockDevice = std::unique_ptr<MockDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(nullptr));
+    MockCommandStreamReceiverWithDirectSubmissionRelaxedOrdering<false> csr(*mockDevice->getExecutionEnvironment(), mockDevice->getRootDeviceIndex(), mockDevice->getDeviceBitfield());
+    MockCommandStreamReceiverWithDirectSubmissionRelaxedOrdering<true> csrRelaxed(*mockDevice->getExecutionEnvironment(), mockDevice->getRootDeviceIndex(), mockDevice->getDeviceBitfield());
+    csr.taskCount = 2;
+    csrRelaxed.taskCount = 2;
+    auto productHelper = &mockDevice->getProductHelper();
+
+    EXPECT_FALSE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, true, 2, csr));
+    EXPECT_FALSE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, false, 3, csr));
+    EXPECT_FALSE(productHelper->isResolveDependenciesByPipeControlsSupported(pInHwInfo, false, 2, csrRelaxed));
+}
+
+NVLSTEST_F(NvlsProductHelper, givenProductHelperWhenCheckingInitializeInternalEngineImmediatelyThenCorrectValueIsReturned) {
+    EXPECT_FALSE(productHelper->initializeInternalEngineImmediately());
+}

shared/test/unit_test/xe3_core/nvls/windows/CMakeLists.txt

@@ -0,0 +1,10 @@
+#
+# Copyright (C) 2025 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(WIN32)
+  target_sources(neo_shared_tests PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/product_helper_tests_nvls_windows.cpp)
+endif()
+

shared/test/unit_test/xe3_core/nvls/windows/product_helper_tests_nvls_windows.cpp

@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2025 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/os_interface/product_helper.h"
+#include "shared/source/xe3_core/hw_info_xe3_core.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/unit_test/os_interface/product_helper_tests.h"
+
+#include "gtest/gtest.h"
+#include "per_product_test_definitions.h"
+
+using namespace NEO;
+
+using NvlsProductHelperWindows = ProductHelperTest;
+
+NVLSTEST_F(NvlsProductHelperWindows, givenOverrideDirectSubmissionTimeoutsCalledThenTimeoutsAreOverridden) {
+    auto mockDevice = std::unique_ptr<MockDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(nullptr));
+    auto productHelper = &mockDevice->getProductHelper();
+
+    uint64_t timeoutUs{5'000};
+    uint64_t maxTimeoutUs = timeoutUs;
+    productHelper->overrideDirectSubmissionTimeouts(timeoutUs, maxTimeoutUs);
+    EXPECT_EQ(timeoutUs, 1'000ull);
+    EXPECT_EQ(maxTimeoutUs, 1'000ull);
+
+    DebugManagerStateRestore restorer{};
+    debugManager.flags.DirectSubmissionControllerTimeout.set(2'000);
+    debugManager.flags.DirectSubmissionControllerMaxTimeout.set(3'000);
+
+    productHelper->overrideDirectSubmissionTimeouts(timeoutUs, maxTimeoutUs);
+    EXPECT_EQ(timeoutUs, 2'000ull);
+    EXPECT_EQ(maxTimeoutUs, 3'000ull);
+}