performance: Set L1 cache policy to WB on PTL

Resolves: NEO-16378

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
This commit is contained in:
Lukasz Jobczyk
2025-10-29 13:52:17 +00:00
committed by Compute-Runtime-Automation
parent 9f7741ce1e
commit 577de9770d
9 changed files with 29 additions and 5 deletions

View File

@@ -71,6 +71,8 @@
using namespace NEO;
HWTEST_EXCLUDE_PRODUCT(ProgramTests, givenAtLeastXeHpgCoreWhenGetInternalOptionsThenCorrectBuildOptionIsSet_IsAtLeastXeCore, IGFX_PTL);
void ProgramTests::SetUp() {
ClDeviceFixture::setUp();
cl_device_id device = pClDevice;

View File

@@ -44,7 +44,7 @@ XE3_CORETEST_F(CmdsProgrammingTestsXe3Core, givenL3ToL1DebugFlagWhenStatelessMoc
auto actualL1CachePolocy = static_cast<uint8_t>(stateBaseAddress->getL1CacheControlCachePolicy());
const uint8_t expectedL1CachePolicy = 0;
const uint8_t expectedL1CachePolicy = pDevice->getHardwareInfo().platform.eProductFamily == IGFX_PTL ? 2 : 0;
EXPECT_EQ(expectedL1CachePolicy, actualL1CachePolocy);
}
@@ -75,7 +75,8 @@ XE3_CORETEST_F(CmdsProgrammingTestsXe3Core, whenAppendingRssThenProgramWtL1Cache
EncodeSurfaceState<FamilyType>::encodeBuffer(args);
EXPECT_EQ(FamilyType::RENDER_SURFACE_STATE::L1_CACHE_CONTROL_WBP, rssCmd.getL1CacheControlCachePolicy());
const uint8_t expectedL1CachePolicy = pDevice->getHardwareInfo().platform.eProductFamily == IGFX_PTL ? 2 : 0;
EXPECT_EQ(expectedL1CachePolicy, rssCmd.getL1CacheControlCachePolicy());
}
XE3_CORETEST_F(CmdsProgrammingTestsXe3Core, givenAlignedCacheableReadOnlyBufferThenChoseOclBufferConstPolicy) {
@@ -102,7 +103,7 @@ XE3_CORETEST_F(CmdsProgrammingTestsXe3Core, givenAlignedCacheableReadOnlyBufferT
auto actualL1CachePolocy = static_cast<uint8_t>(surfaceState.getL1CacheControlCachePolicy());
const uint8_t expectedL1CachePolicy = 0;
const uint8_t expectedL1CachePolicy = pDevice->getHardwareInfo().platform.eProductFamily == IGFX_PTL ? 2 : 0;
EXPECT_EQ(expectedL1CachePolicy, actualL1CachePolocy);
alignedFree(ptr);