From 57c946b61cfacda7402156c01414b552f1b71c4f Mon Sep 17 00:00:00 2001 From: Compute-Runtime-Validation Date: Thu, 15 Feb 2024 05:18:47 +0100 Subject: [PATCH] Revert "fix: align indirect data pointer to cacheline size in heapless mode" This reverts commit 004e6e647fdca63d142946a910da2237a9de203c. Signed-off-by: Compute-Runtime-Validation --- .../hardware_commands_helper_xehp_and_later.inl | 4 +--- shared/source/helpers/uint16_avx2.h | 14 ++++++++++---- 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/opencl/source/helpers/hardware_commands_helper_xehp_and_later.inl b/opencl/source/helpers/hardware_commands_helper_xehp_and_later.inl index 75cc526860..d62111994a 100644 --- a/opencl/source/helpers/hardware_commands_helper_xehp_and_later.inl +++ b/opencl/source/helpers/hardware_commands_helper_xehp_and_later.inl @@ -63,9 +63,7 @@ size_t HardwareCommandsHelper::sendCrossThreadData( constexpr bool heaplessModeEnabled = GfxFamily::template isHeaplessMode(); - if constexpr (heaplessModeEnabled) { - indirectHeap.align(MemoryConstants::cacheLineSize); - } else { + if constexpr (heaplessModeEnabled == false) { indirectHeap.align(WalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE); } diff --git a/shared/source/helpers/uint16_avx2.h b/shared/source/helpers/uint16_avx2.h index f34ab372e1..0625bf5431 100644 --- a/shared/source/helpers/uint16_avx2.h +++ b/shared/source/helpers/uint16_avx2.h @@ -53,8 +53,11 @@ struct uint16x16_t { // NOLINT(readability-identifier-naming) } inline void load(const void *alignedPtr) { - DEBUG_BREAK_IF(!isAligned<32>(alignedPtr)); - value = _mm256_load_si256(reinterpret_cast(alignedPtr)); // AVX + if (isAligned<32>(alignedPtr)) { + value = _mm256_load_si256(reinterpret_cast(alignedPtr)); // AVX + } else { + loadUnaligned(alignedPtr); + } } inline void loadUnaligned(const void *ptr) { @@ -62,8 +65,11 @@ struct uint16x16_t { // NOLINT(readability-identifier-naming) } inline void store(void *alignedPtr) { - DEBUG_BREAK_IF(!isAligned<32>(alignedPtr)); - _mm256_store_si256(reinterpret_cast<__m256i *>(alignedPtr), value); // AVX + if (isAligned<32>(alignedPtr)) { + _mm256_store_si256(reinterpret_cast<__m256i *>(alignedPtr), value); // AVX + } else { + storeUnaligned(alignedPtr); + } } inline void storeUnaligned(void *ptr) {