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Revert "performance: Set L1 cache policy to WB on PTL"

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This reverts commit 577de9770d.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
This commit is contained in:
Compute-Runtime-Validation
2025-10-30 04:32:46 +01:00
committed by Compute-Runtime-Automation
parent 56ce056ee2
commit 59179fa9d9
9 changed files with 5 additions and 29 deletions
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7
shared/source/xe3_core/definitions/enable_xe3_core_products.inl
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@@ -6,13 +6,6 @@
*/
#ifdef SUPPORT_PTL
template <>
uint32_t L1CachePolicyHelper<IGFX_PTL>::getDefaultL1CachePolicy(bool isDebuggerActive) {
using GfxFamily = HwMapper<IGFX_PTL>::GfxFamily;
return GfxFamily::STATE_BASE_ADDRESS::L1_CACHE_CONTROL_WB;
}
template struct L1CachePolicyHelper<IGFX_PTL>;
static EnableGfxProductHw<IGFX_PTL> enableGfxProductHwPTL;
#endif

4
shared/test/unit_test/helpers/cache_policy_tests.cpp
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@@ -26,9 +26,7 @@ HWTEST2_F(ProductHelperTest, givenL1CachePolicyHelperWhenUnsupportedL1PoliciesAn
HWTEST2_F(ProductHelperTest, givenAtLeastXeHpgCoreWhenGetL1CachePolicyThenReturnCorrectValue, IsAtLeastXeCore) {
using GfxFamily = typename HwMapper<productFamily>::GfxFamily;
auto policy = [&]() -> uint32_t {
if constexpr (productFamily == IGFX_PTL) {
return GfxFamily::RENDER_SURFACE_STATE::L1_CACHE_CONTROL_WB;
} else if constexpr (GfxFamily::isHeaplessRequired()) {
if constexpr (GfxFamily::isHeaplessRequired()) {
return GfxFamily::RENDER_SURFACE_STATE::L1_CACHE_CONTROL_WBP;
} else {
return GfxFamily::STATE_BASE_ADDRESS::L1_CACHE_CONTROL_WBP;

3
shared/test/unit_test/xe3_core/ptl/excludes_xe3_core_ptl.cpp
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@@ -8,6 +8,3 @@
#include "shared/test/common/test_macros/hw_test_base.h"
HWTEST_EXCLUDE_PRODUCT(ProductHelperTest, whenGettingPreferredAllocationMethodThenNoPreferenceIsReturned, IGFX_PTL);
HWTEST_EXCLUDE_PRODUCT(ProductHelperTest, givenProductHelperWhenGetL1CachePolicyThenReturnWriteByPass_IsSbaRequiredAndAtLeastXeCore, IGFX_PTL);
HWTEST_EXCLUDE_PRODUCT(CompilerProductHelperFixture, givenAtLeastXeHpgCoreWhenGetCachingPolicyOptionsThenReturnWriteByPassPolicyOption_IsAtLeastXeCore, IGFX_PTL);
HWTEST_EXCLUDE_PRODUCT(SbaTest, givenStateBaseAddressAndDebugFlagSetWhenAppendExtraCacheSettingsThenProgramCorrectL1CachePolicy_IsSbaRequiredAndAtLeastXeCore, IGFX_PTL);

5
shared/test/unit_test/xe3_core/ptl/product_helper_tests_ptl.cpp
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@@ -75,11 +75,6 @@ PTLTEST_F(PtlProductHelper, givenProductHelperWhenCheckingIsBufferPoolAllocatorS
EXPECT_TRUE(productHelper->isBufferPoolAllocatorSupported());
}
PTLTEST_F(ProductHelperTest, givenProductHelperWhenGetL1CachePolicyThenReturnWriteByPass) {
EXPECT_EQ(2u, productHelper->getL1CachePolicy(false));
EXPECT_EQ(2u, productHelper->getL1CachePolicy(true));
}
PTLTEST_F(PtlProductHelper, givenDebugFlagWhenCheckingIsResolveDependenciesByPipeControlsSupportedThenTheFlagDerivedValueIsReturned) {
DebugManagerStateRestore restorer;

2
shared/test/unit_test/xe3_core/test_encode_xe3_core.cpp
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@@ -593,7 +593,7 @@ XE3_CORETEST_F(Xe3SbaTest, givenSpecificProductFamilyWhenAppendingSbaThenProgram
StateBaseAddressHelper<FamilyType>::appendStateBaseAddressParameters(args);
EXPECT_EQ(pDevice->getHardwareInfo().platform.eProductFamily == IGFX_PTL ? 2 : 0, sbaCmd.getL1CacheControlCachePolicy());
EXPECT_EQ(FamilyType::STATE_BASE_ADDRESS::L1_CACHE_CONTROL_WBP, sbaCmd.getL1CacheControlCachePolicy());
}
XE3_CORETEST_F(Xe3SbaTest, givenL1CachingOverrideWhenStateBaseAddressIsProgrammedThenItMatchesTheOverrideValue) {