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Refactor surface state programming, add enum value for default halign value
Related-To: NEO-6466 Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
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Compute-Runtime-Automation
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5cd76aef6a
@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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* Copyright (C) 2018-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -188,7 +188,7 @@ HWTEST_F(EnqueueCopyBufferToImageTest, WhenCopyingBufferToImageThenSurfaceStateI
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surfaceFormat == RENDER_SURFACE_STATE::SURFACE_FORMAT_R16_UINT ||
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surfaceFormat == RENDER_SURFACE_STATE::SURFACE_FORMAT_R8_UINT;
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EXPECT_TRUE(isRedescribedFormat);
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_4, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_DEFAULT, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_VERTICAL_ALIGNMENT_VALIGN_4, surfaceState.getSurfaceVerticalAlignment());
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EXPECT_EQ(dstImage->getGraphicsAllocation(pClDevice->getRootDeviceIndex())->getGpuAddress(), surfaceState.getSurfaceBaseAddress());
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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* Copyright (C) 2018-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -190,7 +190,7 @@ HWTEST_F(EnqueueCopyImageTest, WhenCopyingImageThenSurfaceStateIsCorrect) {
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surfaceFormat == RENDER_SURFACE_STATE::SURFACE_FORMAT_R16_UINT ||
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surfaceFormat == RENDER_SURFACE_STATE::SURFACE_FORMAT_R8_UINT;
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EXPECT_TRUE(isRedescribedFormat);
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_4, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_DEFAULT, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_VERTICAL_ALIGNMENT_VALIGN_4, surfaceState.getSurfaceVerticalAlignment());
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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* Copyright (C) 2018-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -181,7 +181,7 @@ HWTEST_F(EnqueueCopyImageToBufferTest, WhenCopyingImageToBufferThenSurfaceStateI
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surfaceFormat == RENDER_SURFACE_STATE::SURFACE_FORMAT_R16_UINT ||
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surfaceFormat == RENDER_SURFACE_STATE::SURFACE_FORMAT_R8_UINT;
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EXPECT_TRUE(isRedescribedFormat);
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_4, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_DEFAULT, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_VERTICAL_ALIGNMENT_VALIGN_4, surfaceState.getSurfaceVerticalAlignment());
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EXPECT_EQ(srcImage->getGraphicsAllocation(pClDevice->getRootDeviceIndex())->getGpuAddress(), surfaceState.getSurfaceBaseAddress());
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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* Copyright (C) 2018-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -186,7 +186,7 @@ HWTEST_F(EnqueueFillImageTest, WhenFillingImageThenSurfaceStateIsCorrect) {
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EXPECT_EQ(imageDesc.image_height, surfaceState.getHeight());
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EXPECT_NE(0u, surfaceState.getSurfacePitch());
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EXPECT_NE(0u, surfaceState.getSurfaceType());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_4, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_DEFAULT, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_VERTICAL_ALIGNMENT_VALIGN_4, surfaceState.getSurfaceVerticalAlignment());
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EXPECT_EQ(image->getGraphicsAllocation(pClDevice->getRootDeviceIndex())->getGpuAddress(), surfaceState.getSurfaceBaseAddress());
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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* Copyright (C) 2018-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -624,7 +624,7 @@ HWTEST_F(EnqueueReadImageTest, WhenReadingImageThenSurfaceStateIsCorrect) {
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EXPECT_NE(0u, surfaceState.getSurfacePitch());
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EXPECT_NE(0u, surfaceState.getSurfaceType());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_FORMAT_R32_UINT, surfaceState.getSurfaceFormat());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_4, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_DEFAULT, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_VERTICAL_ALIGNMENT_VALIGN_4, surfaceState.getSurfaceVerticalAlignment());
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EXPECT_EQ(srcAllocation->getGpuAddress(), surfaceState.getSurfaceBaseAddress());
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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* Copyright (C) 2018-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -192,7 +192,7 @@ HWTEST_F(EnqueueWriteImageTest, WhenWritingImageThenSurfaceStateIsProgrammedCorr
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EXPECT_NE(0u, surfaceState.getSurfacePitch());
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EXPECT_NE(0u, surfaceState.getSurfaceType());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_FORMAT_R32_UINT, surfaceState.getSurfaceFormat());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_4, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_DEFAULT, surfaceState.getSurfaceHorizontalAlignment());
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EXPECT_EQ(RENDER_SURFACE_STATE::SURFACE_VERTICAL_ALIGNMENT_VALIGN_4, surfaceState.getSurfaceVerticalAlignment());
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EXPECT_EQ(dstAllocation->getGpuAddress(), surfaceState.getSurfaceBaseAddress());
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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* Copyright (C) 2018-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -310,7 +310,7 @@ HWTEST_F(ImageSetArgTest, givenNonCubeMapIndexWhenSetKernelArgImageIsCalledThenD
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auto hAlign = static_cast<uint32_t>(surfaceState->getSurfaceHorizontalAlignment());
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auto vAlign = static_cast<uint32_t>(surfaceState->getSurfaceVerticalAlignment());
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auto expectedHAlign = static_cast<uint32_t>(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_4);
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auto expectedHAlign = static_cast<uint32_t>(RENDER_SURFACE_STATE::SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_DEFAULT);
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auto expectedVAlign = static_cast<uint32_t>(RENDER_SURFACE_STATE::SURFACE_VERTICAL_ALIGNMENT_VALIGN_4);
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// 3D image
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