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Unify surface state programming logic related to implicit scaling

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OCL image surface state programming for Xe Hp core is now reusing logic
of EncodeSurfaceState helper

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
This commit is contained in:
Mateusz Jablonski
2022-01-24 15:42:16 +00:00
committed by Compute-Runtime-Automation
parent 52d636394c
commit 5e238dc7f1
9 changed files with 52 additions and 60 deletions
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1
shared/source/command_container/command_encoder.h
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@@ -257,6 +257,7 @@ struct EncodeSurfaceState {
static void encodeBuffer(EncodeSurfaceStateArgs &args);
static void encodeExtraBufferParams(EncodeSurfaceStateArgs &args);
static void encodeImplicitScalingParams(const EncodeSurfaceStateArgs &args);
static void encodeExtraCacheSettings(R_SURFACE_STATE *surfaceState, const HardwareInfo &hwInfo);
static void appendBufferSurfaceState(EncodeSurfaceStateArgs &args);

3
shared/source/command_container/command_encoder.inl
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@@ -478,6 +478,9 @@ template <typename Family>
void EncodeSurfaceState<Family>::appendParamsForImageFromBuffer(R_SURFACE_STATE *surfaceState) {
}
template <typename Family>
void EncodeSurfaceState<Family>::encodeImplicitScalingParams(const EncodeSurfaceStateArgs &args) {}
template <typename Family>
void *EncodeDispatchKernel<Family>::getInterfaceDescriptor(CommandContainer &container, uint32_t &iddOffset) {

20
shared/source/command_container/command_encoder_xehp_and_later.inl
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@@ -649,25 +649,7 @@ void EncodeSurfaceState<Family>::encodeExtraBufferParams(EncodeSurfaceStateArgs
encodeExtraCacheSettings(surfaceState, *args.gmmHelper->getHardwareInfo());
if constexpr (Family::isUsingMultiGpuProgrammingInSurfaceState) {
bool enablePartialWrites = args.implicitScaling;
bool enableMultiGpuAtomics = enablePartialWrites;
if (DebugManager.flags.EnableMultiGpuAtomicsOptimization.get()) {
enableMultiGpuAtomics = args.useGlobalAtomics && (enablePartialWrites || args.areMultipleSubDevicesInContext);
}
surfaceState->setDisableSupportForMultiGpuAtomics(!enableMultiGpuAtomics);
surfaceState->setDisableSupportForMultiGpuPartialWrites(!enablePartialWrites);
if (DebugManager.flags.ForceMultiGpuAtomics.get() != -1) {
surfaceState->setDisableSupportForMultiGpuAtomics(!!DebugManager.flags.ForceMultiGpuAtomics.get());
}
if (DebugManager.flags.ForceMultiGpuPartialWrites.get() != -1) {
surfaceState->setDisableSupportForMultiGpuPartialWrites(!!DebugManager.flags.ForceMultiGpuPartialWrites.get());
}
}
encodeImplicitScalingParams(args);
if (EncodeSurfaceState<Family>::isAuxModeEnabled(surfaceState, gmm)) {
auto resourceFormat = gmm->gmmResourceInfo->getResourceFormat();

22
shared/source/xe_hp_core/command_encoder_xe_hp_core.cpp
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@@ -31,6 +31,28 @@ template <>
inline void EncodeSurfaceState<Family>::encodeExtraCacheSettings(R_SURFACE_STATE *surfaceState, const HardwareInfo &hwInfo) {
}
template <>
void EncodeSurfaceState<Family>::encodeImplicitScalingParams(const EncodeSurfaceStateArgs &args) {
auto surfaceState = reinterpret_cast<R_SURFACE_STATE *>(args.outMemory);
bool enablePartialWrites = args.implicitScaling;
bool enableMultiGpuAtomics = enablePartialWrites;
if (DebugManager.flags.EnableMultiGpuAtomicsOptimization.get()) {
enableMultiGpuAtomics = args.useGlobalAtomics && (enablePartialWrites || args.areMultipleSubDevicesInContext);
}
surfaceState->setDisableSupportForMultiGpuAtomics(!enableMultiGpuAtomics);
surfaceState->setDisableSupportForMultiGpuPartialWrites(!enablePartialWrites);
if (DebugManager.flags.ForceMultiGpuAtomics.get() != -1) {
surfaceState->setDisableSupportForMultiGpuAtomics(!!DebugManager.flags.ForceMultiGpuAtomics.get());
}
if (DebugManager.flags.ForceMultiGpuPartialWrites.get() != -1) {
surfaceState->setDisableSupportForMultiGpuPartialWrites(!!DebugManager.flags.ForceMultiGpuPartialWrites.get());
}
}
template <>
void EncodeDispatchKernel<Family>::appendAdditionalIDDFields(INTERFACE_DESCRIPTOR_DATA *pInterfaceDescriptor, const HardwareInfo &hwInfo, const uint32_t threadsPerThreadGroup, uint32_t slmTotalSize, SlmPolicy slmPolicy) {
}

1
shared/source/xe_hp_core/hw_cmds_base.h
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@@ -31,7 +31,6 @@ struct XeHpCore {
static constexpr bool isUsingMediaSamplerDopClockGate = true;
static constexpr bool supportsSampler = true;
static constexpr bool isUsingGenericMediaStateClear = true;
static constexpr bool isUsingMultiGpuProgrammingInSurfaceState = true;
struct DataPortBindlessSurfaceExtendedMessageDescriptor {
union {

1
shared/source/xe_hpc_core/hw_cmds_base.h
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@@ -37,7 +37,6 @@ struct XE_HPC_CORE {
static constexpr bool isUsingMediaSamplerDopClockGate = false;
static constexpr bool supportsSampler = false;
static constexpr bool isUsingGenericMediaStateClear = true;
static constexpr bool isUsingMultiGpuProgrammingInSurfaceState = false;
static bool isXlA0(const HardwareInfo &hwInfo) {
auto revId = hwInfo.platform.usRevId & pvcSteppingBits;

1
shared/source/xe_hpg_core/hw_cmds_base.h
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@@ -31,7 +31,6 @@ struct XE_HPG_CORE {
static constexpr bool isUsingMediaSamplerDopClockGate = false;
static constexpr bool supportsSampler = true;
static constexpr bool isUsingGenericMediaStateClear = true;
static constexpr bool isUsingMultiGpuProgrammingInSurfaceState = false;
struct DataPortBindlessSurfaceExtendedMessageDescriptor {
union {