diff --git a/CMakeLists.txt b/CMakeLists.txt index f34c3b596d..fe6fecbe08 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -942,10 +942,16 @@ if(MSVC) else() include_directories(${NEO_SHARED_DIRECTORY}/os_interface/linux/flags${BRANCH_DIR_SUFFIX}) endif() -if(SUPPORT_XE_HP_CORE) - include_directories(${NEO_SHARED_DIRECTORY}/xe_hp_core/definitions${BRANCH_DIR_SUFFIX}) - include_directories(${NEO_SOURCE_DIR}/opencl/source/xe_hp_core/definitions${BRANCH_DIR_SUFFIX}) -endif() + +macro(macro_for_each_gen) + foreach(PLATFORM_DIRECTORY ${NEO_SHARED_DIRECTORY}/${GEN_TYPE_LOWER}/definitions${BRANCH_DIR_SUFFIX} ${NEO_SOURCE_DIR}/opencl/source/${GEN_TYPE_LOWER}/definitions${BRANCH_DIR_SUFFIX}) + if(EXISTS ${PLATFORM_DIRECTORY}) + include_directories(${PLATFORM_DIRECTORY}) + endif() + endforeach() +endmacro() +apply_macro_for_each_gen("SUPPORTED") + # Define where to put binaries set(TargetDir ${CMAKE_RUNTIME_OUTPUT_DIRECTORY}) if(MSVC) diff --git a/cmake/setup_platform_flags.cmake b/cmake/setup_platform_flags.cmake index 158728904f..673fd1c461 100644 --- a/cmake/setup_platform_flags.cmake +++ b/cmake/setup_platform_flags.cmake @@ -7,7 +7,7 @@ SET_FLAGS_FOR("GEN8" "BDW") SET_FLAGS_FOR("GEN9" "SKL" "KBL" "BXT" "GLK" "CFL") SET_FLAGS_FOR("GEN11" "ICLLP" "LKF" "EHL") -SET_FLAGS_FOR("GEN12LP" "TGLLP" "RKL" "ADLS") +SET_FLAGS_FOR("GEN12LP" "TGLLP" "RKL" "ADLS" "ADLP") foreach(GEN_TYPE ${XEHP_AND_LATER_GENS}) if(TESTS_${GEN_TYPE}) @@ -188,6 +188,16 @@ if(SUPPORT_GEN12LP) ADD_PRODUCT("TESTED" "ADLS" "IGFX_ALDERLAKE_S") endif() endif() + + if(SUPPORT_ADLP) + ADD_PRODUCT("SUPPORTED" "ADLP" "IGFX_ALDERLAKE_P") + ADD_PLATFORM_FOR_GEN("SUPPORTED" "GEN12LP" "ADLP" "LP") + ADD_PLATFORM_FOR_GEN("SUPPORTED_IMAGES" "GEN12LP" "ADLP" "LP") + if(TESTS_ADLP) + ADD_ITEM_FOR_GEN("PLATFORMS" "TESTED" "GEN12LP" "ADLP") + ADD_PRODUCT("TESTED" "ADLP" "IGFX_ALDERLAKE_P") + endif() + endif() endif() if(SUPPORT_XE_HP_CORE) diff --git a/level_zero/CMakeLists.txt b/level_zero/CMakeLists.txt index fbdc768d84..af87ffcfd3 100644 --- a/level_zero/CMakeLists.txt +++ b/level_zero/CMakeLists.txt @@ -261,6 +261,7 @@ if(BUILD_WITH_L0) PRIVATE ${NEO_SHARED_DIRECTORY}/os_interface/linux/sys_calls_linux.cpp ${NEO_SHARED_DIRECTORY}/dll/devices${BRANCH_DIR_SUFFIX}/devices.inl + ${NEO_SHARED_DIRECTORY}/dll/devices${BRANCH_DIR_SUFFIX}/devices_additional.inl ${NEO_SHARED_DIRECTORY}/dll/devices/devices_base.inl ${COMPUTE_RUNTIME_DIR}/opencl/source/dll/linux/allocator_helper.cpp ${COMPUTE_RUNTIME_DIR}/opencl/source/dll/linux/options_linux.cpp diff --git a/level_zero/core/source/gen12lp/adlp/CMakeLists.txt b/level_zero/core/source/gen12lp/adlp/CMakeLists.txt new file mode 100644 index 0000000000..a37d9fc986 --- /dev/null +++ b/level_zero/core/source/gen12lp/adlp/CMakeLists.txt @@ -0,0 +1,18 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(SUPPORT_ADLP) + set(HW_SOURCES_GEN12LP + ${HW_SOURCES_GEN12LP} + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_adlp.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/cmdqueue_adlp.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/kernel_adlp.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/image_adlp.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/sampler_adlp.cpp + PARENT_SCOPE + ) +endif() diff --git a/level_zero/core/source/gen12lp/adlp/cmdlist_adlp.cpp b/level_zero/core/source/gen12lp/adlp/cmdlist_adlp.cpp new file mode 100644 index 0000000000..d6e5daebb8 --- /dev/null +++ b/level_zero/core/source/gen12lp/adlp/cmdlist_adlp.cpp @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "level_zero/core/source/cmdlist/cmdlist_hw.inl" +#include "level_zero/core/source/cmdlist/cmdlist_hw_base.inl" +#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl" +#include "level_zero/core/source/gen12lp/cmdlist_gen12lp.h" + +#include "cache_flush_gen12lp.inl" +#include "cmdlist_extended.inl" + +namespace L0 { +template struct CommandListCoreFamily; + +static CommandListPopulateFactory> + populateADLP; + +static CommandListImmediatePopulateFactory> + populateADLPImmediate; + +} // namespace L0 \ No newline at end of file diff --git a/level_zero/core/source/gen12lp/adlp/cmdqueue_adlp.cpp b/level_zero/core/source/gen12lp/adlp/cmdqueue_adlp.cpp new file mode 100644 index 0000000000..f3c3ee5534 --- /dev/null +++ b/level_zero/core/source/gen12lp/adlp/cmdqueue_adlp.cpp @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "level_zero/core/source/cmdqueue/cmdqueue_hw.inl" +#include "level_zero/core/source/cmdqueue/cmdqueue_hw_base.inl" + +#include "cmdqueue_extended.inl" + +namespace L0 { +template struct CommandQueueHw; +static CommandQueuePopulateFactory> + populateADLP; + +} // namespace L0 \ No newline at end of file diff --git a/level_zero/core/source/gen12lp/adlp/image_adlp.cpp b/level_zero/core/source/gen12lp/adlp/image_adlp.cpp new file mode 100644 index 0000000000..ecd743c0da --- /dev/null +++ b/level_zero/core/source/gen12lp/adlp/image_adlp.cpp @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "level_zero/core/source/image/image_hw.inl" + +namespace L0 { + +template <> +struct ImageProductFamily : public ImageCoreFamily { + using ImageCoreFamily::ImageCoreFamily; + + ze_result_t initialize(Device *device, const ze_image_desc_t *desc) override { + return ImageCoreFamily::initialize(device, desc); + }; +}; + +static ImagePopulateFactory> populateADLP; + +} // namespace L0 diff --git a/level_zero/core/source/gen12lp/adlp/kernel_adlp.cpp b/level_zero/core/source/gen12lp/adlp/kernel_adlp.cpp new file mode 100644 index 0000000000..e443545053 --- /dev/null +++ b/level_zero/core/source/gen12lp/adlp/kernel_adlp.cpp @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "level_zero/core/source/kernel/kernel_hw.h" + +namespace L0 { + +static KernelPopulateFactory> populateADLP; + +} // namespace L0 \ No newline at end of file diff --git a/level_zero/core/source/gen12lp/adlp/sampler_adlp.cpp b/level_zero/core/source/gen12lp/adlp/sampler_adlp.cpp new file mode 100644 index 0000000000..5abffbe3b3 --- /dev/null +++ b/level_zero/core/source/gen12lp/adlp/sampler_adlp.cpp @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "level_zero/core/source/sampler/sampler_hw.inl" + +namespace L0 { + +template <> +struct SamplerProductFamily : public SamplerCoreFamily { + using SamplerCoreFamily::SamplerCoreFamily; +}; + +static SamplerPopulateFactory> populateADLP; + +} // namespace L0 diff --git a/opencl/source/dll/CMakeLists.txt b/opencl/source/dll/CMakeLists.txt index 70ffd2e602..8af83cc745 100644 --- a/opencl/source/dll/CMakeLists.txt +++ b/opencl/source/dll/CMakeLists.txt @@ -46,6 +46,7 @@ set(RUNTIME_SRCS_DLL_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/linux/options_linux.cpp ${CMAKE_CURRENT_SOURCE_DIR}/linux/os_interface.cpp ${NEO_SHARED_DIRECTORY}/dll/devices${BRANCH_DIR_SUFFIX}/devices.inl + ${NEO_SHARED_DIRECTORY}/dll/devices${BRANCH_DIR_SUFFIX}/devices_additional.inl ${NEO_SHARED_DIRECTORY}/dll/devices/devices_base.inl ${NEO_SHARED_DIRECTORY}/os_interface/linux/sys_calls_linux.cpp ${NEO_SOURCE_DIR}/opencl/source/os_interface/linux/platform_teardown_linux.cpp diff --git a/opencl/source/enable_gens.cmake b/opencl/source/enable_gens.cmake index c7e22d3379..8b85098953 100644 --- a/opencl/source/enable_gens.cmake +++ b/opencl/source/enable_gens.cmake @@ -40,6 +40,11 @@ macro(macro_for_each_platform) string(TOLOWER ${PLATFORM_IT} PLATFORM_IT_LOWER) foreach(BRANCH_DIR ${BRANCH_DIR_LIST}) + set(PLATFORM_FILE "hw_info_setup_${PLATFORM_IT_LOWER}.inl") + set(SRC_FILE ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR}${GEN_TYPE_LOWER}/definitions${BRANCH_DIR_SUFFIX}/${PLATFORM_FILE}) + if(EXISTS ${SRC_FILE}) + list(APPEND RUNTIME_SRCS_${GEN_TYPE}_CPP_BASE ${SRC_FILE}) + endif() foreach(BRANCH ${BRANCH_DIR_LIST}) set(PLATFORM_FILE "hw_info_${PLATFORM_IT_LOWER}.cpp") set(SRC_FILE ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR}${GEN_TYPE_LOWER}${BRANCH}${PLATFORM_FILE}) diff --git a/opencl/source/gen12lp/definitions/hw_info_setup_adlp.inl b/opencl/source/gen12lp/definitions/hw_info_setup_adlp.inl new file mode 100644 index 0000000000..73995f1020 --- /dev/null +++ b/opencl/source/gen12lp/definitions/hw_info_setup_adlp.inl @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +const uint64_t ADLP::defaultHardwareInfoConfig = 0x0; +const HardwareInfo ADLP::hwInfo = ADLP_CONFIG::hwInfo; + +void setupADLPHardwareInfoImpl(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig) { + ADLP_CONFIG::setupHardwareInfo(hwInfo, setupFeatureTableAndWorkaroundTable); +} + +void (*ADLP::setupHardwareInfo)(HardwareInfo *, bool, const uint64_t) = setupADLPHardwareInfoImpl; diff --git a/opencl/source/gen12lp/hw_info_adlp.cpp b/opencl/source/gen12lp/hw_info_adlp.cpp new file mode 100644 index 0000000000..257f03e78a --- /dev/null +++ b/opencl/source/gen12lp/hw_info_adlp.cpp @@ -0,0 +1,154 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/aub_mem_dump/definitions/aub_services.h" +#include "shared/source/gen12lp/hw_cmds.h" +#include "shared/source/helpers/constants.h" + +#include "engine_node.h" + +namespace NEO { + +const char *HwMapper::abbreviation = "adlp"; + +bool isSimulationADLP(unsigned short deviceId) { + return false; +}; + +const PLATFORM ADLP::platform = { + IGFX_ALDERLAKE_P, + PCH_UNKNOWN, + IGFX_GEN12LP_CORE, + IGFX_GEN12LP_CORE, + PLATFORM_NONE, // default init + 0, // usDeviceID + 0, // usRevId. 0 sets the stepping to A0 + 0, // usDeviceID_PCH + 0, // usRevId_PCH + GTTYPE_UNDEFINED}; + +const RuntimeCapabilityTable ADLP::capabilityTable{ + EngineDirectSubmissionInitVec{ + {aub_stream::ENGINE_RCS, {true, true}}, + {aub_stream::ENGINE_CCS, {true, true}}}, // directSubmissionEngines + {0, 0, 0, false, false, false}, // kmdNotifyProperties + MemoryConstants::max64BitAppAddress, // gpuAddressSpace + 83.333, // defaultProfilingTimerResolution + MemoryConstants::pageSize, // requiredPreemptionSurfaceSize + &isSimulationADLP, // isSimulation + PreemptionMode::MidThread, // defaultPreemptionMode + aub_stream::ENGINE_RCS, // defaultEngineType + 0, // maxRenderFrequency + 30, // clVersionSupport + CmdServicesMemTraceVersion::DeviceValues::Adlp, // aubDeviceId + 1, // extraQuantityThreadsPerEU + 64, // slmSize + sizeof(ADLP::GRF), // grfSize + 36u, // timestampValidBits + 32u, // kernelTimestampValidBits + false, // blitterOperationsSupported + true, // ftrSupportsInteger64BitAtomics + false, // ftrSupportsFP64 + false, // ftrSupports64BitMath + true, // ftrSvm + false, // ftrSupportsCoherency + false, // ftrSupportsVmeAvcTextureSampler + false, // ftrSupportsVmeAvcPreemption + false, // ftrRenderCompressedBuffers + false, // ftrRenderCompressedImages + true, // instrumentationEnabled + true, // forceStatelessCompilationFor32Bit + true, // ftr64KBpages + "lp", // platformType + "", // deviceName + true, // sourceLevelDebuggerSupported + false, // supportsVme + false, // supportCacheFlushAfterWalker + true, // supportsImages + false, // supportsDeviceEnqueue + false, // supportsPipes + true, // supportsOcl21Features + false, // supportsOnDemandPageFaults + false, // supportsIndependentForwardProgress + false, // hostPtrTrackingEnabled + true, // levelZeroSupported + true, // isIntegratedDevice + true, // supportsMediaBlock + true // fusedEuEnabled +}; + +WorkaroundTable ADLP::workaroundTable = {}; +FeatureTable ADLP::featureTable = {}; + +void ADLP::setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo) { + FeatureTable *featureTable = &hwInfo->featureTable; + WorkaroundTable *workaroundTable = &hwInfo->workaroundTable; + + featureTable->ftrL3IACoherency = true; + featureTable->ftrPPGTT = true; + featureTable->ftrSVM = true; + featureTable->ftrIA32eGfxPTEs = true; + featureTable->ftrStandardMipTailFormat = true; + + featureTable->ftrTranslationTable = true; + featureTable->ftrUserModeTranslationTable = true; + featureTable->ftrTileMappedResource = true; + featureTable->ftrEnableGuC = true; + + featureTable->ftrFbc = true; + featureTable->ftrFbc2AddressTranslation = true; + featureTable->ftrFbcBlitterTracking = true; + featureTable->ftrFbcCpuTracking = true; + featureTable->ftrTileY = false; + + featureTable->ftrAstcHdr2D = true; + featureTable->ftrAstcLdr2D = true; + + featureTable->ftr3dMidBatchPreempt = true; + featureTable->ftrGpGpuMidBatchPreempt = true; + featureTable->ftrGpGpuThreadGroupLevelPreempt = true; + featureTable->ftrPerCtxtPreemptionGranularityControl = true; + + workaroundTable->wa4kAlignUVOffsetNV12LinearSurface = true; + workaroundTable->waEnablePreemptionGranularityControlByUMD = true; + workaroundTable->waUntypedBufferCompression = true; +}; +const HardwareInfo ADLP_CONFIG::hwInfo = { + &ADLP::platform, + &ADLP::featureTable, + &ADLP::workaroundTable, + &ADLP_CONFIG::gtSystemInfo, + ADLP::capabilityTable, +}; + +GT_SYSTEM_INFO ADLP_CONFIG::gtSystemInfo = {0}; +void ADLP_CONFIG::setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable) { + GT_SYSTEM_INFO *gtSysInfo = &hwInfo->gtSystemInfo; + gtSysInfo->CsrSizeInMb = 8; + gtSysInfo->IsDynamicallyPopulated = false; + + // non-zero values for unit tests + if (gtSysInfo->SliceCount == 0) { + gtSysInfo->SliceCount = 2; + gtSysInfo->SubSliceCount = 8; + gtSysInfo->EUCount = 40; + gtSysInfo->MaxEuPerSubSlice = ADLP::maxEuPerSubslice; + gtSysInfo->MaxSlicesSupported = ADLP::maxSlicesSupported; + gtSysInfo->MaxSubSlicesSupported = ADLP::maxSubslicesSupported; + + gtSysInfo->L3BankCount = 1; + + gtSysInfo->CCSInfo.IsValid = true; + gtSysInfo->CCSInfo.NumberOfCCSEnabled = 1; + } + + if (setupFeatureTableAndWorkaroundTable) { + setupFeatureAndWorkaroundTable(hwInfo); + } +}; +#include "hw_info_setup_adlp.inl" +} // namespace NEO diff --git a/opencl/source/xe_hp_core/definitions/hw_info_config_xehp.inl b/opencl/source/xe_hp_core/definitions/hw_info_setup_xehp.inl similarity index 100% rename from opencl/source/xe_hp_core/definitions/hw_info_config_xehp.inl rename to opencl/source/xe_hp_core/definitions/hw_info_setup_xehp.inl diff --git a/opencl/source/xe_hp_core/hw_info_xe_hp_sdv.cpp b/opencl/source/xe_hp_core/hw_info_xe_hp_sdv.cpp index 5e2a33e150..6dd42be4d0 100644 --- a/opencl/source/xe_hp_core/hw_info_xe_hp_sdv.cpp +++ b/opencl/source/xe_hp_core/hw_info_xe_hp_sdv.cpp @@ -163,5 +163,5 @@ void XE_HP_SDV_CONFIG::setupHardwareInfoMultiTile(HardwareInfo *hwInfo, bool set XE_HP_SDV::setupFeatureAndWorkaroundTable(hwInfo); } }; -#include "hw_info_config_xehp.inl" +#include "hw_info_setup_xehp.inl" } // namespace NEO diff --git a/opencl/test/unit_test/gen12lp/adlp/CMakeLists.txt b/opencl/test/unit_test/gen12lp/adlp/CMakeLists.txt new file mode 100644 index 0000000000..0645528629 --- /dev/null +++ b/opencl/test/unit_test/gen12lp/adlp/CMakeLists.txt @@ -0,0 +1,26 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_ADLP) + set(IGDRCL_SRCS_tests_gen12lp_adlp_excludes + ${CMAKE_CURRENT_SOURCE_DIR}/excludes_adlp.cpp + ) + set_property(GLOBAL APPEND PROPERTY IGDRCL_SRCS_tests_excludes ${IGDRCL_SRCS_tests_gen12lp_adlp_excludes}) + + set(IGDRCL_SRCS_tests_gen12lp_adlp + ${IGDRCL_SRCS_tests_gen12lp_adlp_excludes} + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/test_device_caps_adlp.cpp + ) + + get_property(NEO_CORE_TESTS_GEN12LP_ADLP GLOBAL PROPERTY NEO_CORE_TESTS_GEN12LP_ADLP) + list(APPEND IGDRCL_SRCS_tests_gen12lp_adlp ${NEO_CORE_TESTS_GEN12LP_ADLP}) + + target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_gen12lp_adlp}) + add_subdirectories() + neo_copy_test_files_with_revision(copy_test_files_adlp_0 adlp 0) + add_dependencies(copy_test_files_per_product copy_test_files_adlp_0) +endif() diff --git a/opencl/test/unit_test/gen12lp/adlp/excludes_adlp.cpp b/opencl/test/unit_test/gen12lp/adlp/excludes_adlp.cpp new file mode 100644 index 0000000000..f89994ebaf --- /dev/null +++ b/opencl/test/unit_test/gen12lp/adlp/excludes_adlp.cpp @@ -0,0 +1,12 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "test.h" + +HWTEST_EXCLUDE_PRODUCT(BufferSetSurfaceTests, givenBufferSetSurfaceThatMemoryIsUnalignedToCachelineButReadOnlyThenL3CacheShouldBeStillOn, IGFX_ALDERLAKE_P) +HWTEST_EXCLUDE_PRODUCT(BufferSetSurfaceTests, givenAlignedCacheableReadOnlyBufferThenChoseOclBufferPolicy, IGFX_ALDERLAKE_P); +HWTEST_EXCLUDE_PRODUCT(DeviceFactoryTest, givenInvalidHwConfigStringWhenPrepareDeviceEnvironmentsForProductFamilyOverrideThenThrowsException, IGFX_ALDERLAKE_P); diff --git a/opencl/test/unit_test/gen12lp/adlp/linux/CMakeLists.txt b/opencl/test/unit_test/gen12lp/adlp/linux/CMakeLists.txt new file mode 100644 index 0000000000..32308044b2 --- /dev/null +++ b/opencl/test/unit_test/gen12lp/adlp/linux/CMakeLists.txt @@ -0,0 +1,14 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +set(IGDRCL_SRCS_tests_gen12_adlp_linux + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/hw_info_config_tests_adlp.cpp +) +if(UNIX) + target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_gen12_adlp_linux}) + add_subdirectory(dll) +endif() diff --git a/opencl/test/unit_test/gen12lp/adlp/linux/dll/CMakeLists.txt b/opencl/test/unit_test/gen12lp/adlp/linux/dll/CMakeLists.txt new file mode 100644 index 0000000000..abd8f4f07b --- /dev/null +++ b/opencl/test/unit_test/gen12lp/adlp/linux/dll/CMakeLists.txt @@ -0,0 +1,11 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +set(IGDRCL_SRCS_linux_dll_tests_gen12_adlp + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}/device_id_tests_adlp.cpp +) +target_sources(igdrcl_linux_dll_tests PRIVATE ${IGDRCL_SRCS_linux_dll_tests_gen12_adlp}) diff --git a/opencl/test/unit_test/gen12lp/adlp/linux/dll/device_id_tests_adlp.cpp b/opencl/test/unit_test/gen12lp/adlp/linux/dll/device_id_tests_adlp.cpp new file mode 100644 index 0000000000..8c4f62ca1c --- /dev/null +++ b/opencl/test/unit_test/gen12lp/adlp/linux/dll/device_id_tests_adlp.cpp @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/gen12lp/hw_cmds.h" +#include "shared/source/os_interface/linux/drm_neo.h" + +#include "test.h" + +#include + +using namespace NEO; + +TEST(AdlpDeviceIdTest, GivenSupportedDeviceIdThenDeviceDescriptorTableExists) { + std::array expectedDescriptors = {{ + {0x46A0, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46B0, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46A1, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46A2, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46A3, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46A6, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46A8, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46AA, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x462A, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x4626, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x4628, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46B1, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46B2, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46B3, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46C0, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46C1, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46C2, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + {0x46C3, &ADLP_CONFIG::hwInfo, &ADLP_CONFIG::setupHardwareInfo, GTTYPE_GT2}, + }}; + + auto compareStructs = [](const DeviceDescriptor *first, const DeviceDescriptor *second) { + return first->deviceId == second->deviceId && first->pHwInfo == second->pHwInfo && + first->setupHardwareInfo == second->setupHardwareInfo && first->eGtType == second->eGtType; + }; + + size_t startIndex = 0; + while (!compareStructs(&expectedDescriptors[0], &deviceDescriptorTable[startIndex]) && + deviceDescriptorTable[startIndex].deviceId != 0) { + startIndex++; + }; + EXPECT_NE(0u, deviceDescriptorTable[startIndex].deviceId); + + for (auto &expected : expectedDescriptors) { + EXPECT_TRUE(compareStructs(&expected, &deviceDescriptorTable[startIndex])); + startIndex++; + } +} diff --git a/opencl/test/unit_test/gen12lp/adlp/linux/hw_info_config_tests_adlp.cpp b/opencl/test/unit_test/gen12lp/adlp/linux/hw_info_config_tests_adlp.cpp new file mode 100644 index 0000000000..963eeb91f4 --- /dev/null +++ b/opencl/test/unit_test/gen12lp/adlp/linux/hw_info_config_tests_adlp.cpp @@ -0,0 +1,170 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/os_interface/os_interface.h" +#include "shared/test/common/helpers/default_hw_info.h" + +#include "opencl/test/unit_test/helpers/gtest_helpers.h" +#include "opencl/test/unit_test/os_interface/linux/drm_mock.h" +#include "opencl/test/unit_test/os_interface/linux/hw_info_config_linux_tests.h" + +using namespace NEO; + +struct HwInfoConfigTestLinuxAdlp : HwInfoConfigTestLinux { + void SetUp() override { + HwInfoConfigTestLinux::SetUp(); + + drm = new DrmMock(*executionEnvironment->rootDeviceEnvironments[0]); + osInterface->setDriverModel(std::unique_ptr(drm)); + + drm->storedDeviceID = IGFX_ALDERLAKE_P; + drm->setGtType(GTTYPE_GT2); + } +}; + +ADLPTEST_F(HwInfoConfigTestLinuxAdlp, WhenConfiguringHwInfoThenInfoIsSetCorrectly) { + auto hwInfoConfig = HwInfoConfig::get(productFamily); + int ret = hwInfoConfig->configureHwInfoDrm(&pInHwInfo, &outHwInfo, osInterface); + EXPECT_EQ(0, ret); + EXPECT_EQ(static_cast(drm->storedDeviceID), outHwInfo.platform.usDeviceID); + EXPECT_EQ(static_cast(drm->storedDeviceRevID), outHwInfo.platform.usRevId); + EXPECT_EQ(static_cast(drm->storedEUVal), outHwInfo.gtSystemInfo.EUCount); + EXPECT_EQ(static_cast(drm->storedSSVal), outHwInfo.gtSystemInfo.SubSliceCount); + EXPECT_EQ(1u, outHwInfo.gtSystemInfo.SliceCount); + + EXPECT_EQ(GTTYPE_GT2, outHwInfo.platform.eGTType); + EXPECT_FALSE(outHwInfo.featureTable.ftrGT1); + EXPECT_FALSE(outHwInfo.featureTable.ftrGT1_5); + EXPECT_TRUE(outHwInfo.featureTable.ftrGT2); + EXPECT_FALSE(outHwInfo.featureTable.ftrGT3); + EXPECT_FALSE(outHwInfo.featureTable.ftrGT4); + EXPECT_FALSE(outHwInfo.featureTable.ftrGTA); + EXPECT_FALSE(outHwInfo.featureTable.ftrGTC); + EXPECT_FALSE(outHwInfo.featureTable.ftrGTX); + EXPECT_FALSE(outHwInfo.featureTable.ftrTileY); +} + +ADLPTEST_F(HwInfoConfigTestLinuxAdlp, GivenInvalidDeviceIdWhenConfiguringHwInfoThenErrorIsReturned) { + auto hwInfoConfig = HwInfoConfig::get(productFamily); + + drm->storedRetValForDeviceID = -1; + int ret = hwInfoConfig->configureHwInfoDrm(&pInHwInfo, &outHwInfo, osInterface); + EXPECT_EQ(-1, ret); + + drm->storedRetValForDeviceID = 0; + drm->storedRetValForDeviceRevID = -1; + ret = hwInfoConfig->configureHwInfoDrm(&pInHwInfo, &outHwInfo, osInterface); + EXPECT_EQ(-1, ret); + + drm->storedRetValForDeviceRevID = 0; + drm->failRetTopology = true; + drm->storedRetValForEUVal = -1; + ret = hwInfoConfig->configureHwInfoDrm(&pInHwInfo, &outHwInfo, osInterface); + EXPECT_EQ(-1, ret); + + drm->storedRetValForEUVal = 0; + drm->storedRetValForSSVal = -1; + ret = hwInfoConfig->configureHwInfoDrm(&pInHwInfo, &outHwInfo, osInterface); + EXPECT_EQ(-1, ret); +} + +template +using AdlpConfigHwInfoTests = ::testing::Test; +using adlpConfigTestTypes = ::testing::Types; +TYPED_TEST_CASE(AdlpConfigHwInfoTests, adlpConfigTestTypes); +TYPED_TEST(AdlpConfigHwInfoTests, givenAdlpConfigWhenSetupHardwareInfoThenGtSystemInfoAndWaAndFtrTablesAreSetCorrect) { + HardwareInfo hwInfo = *defaultHwInfo; + auto executionEnvironment = std::make_unique(); + executionEnvironment->prepareRootDeviceEnvironments(1); + executionEnvironment->rootDeviceEnvironments[0]->setHwInfo(defaultHwInfo.get()); + DrmMock drm(*executionEnvironment->rootDeviceEnvironments[0]); + GT_SYSTEM_INFO >SystemInfo = hwInfo.gtSystemInfo; + auto &featureTable = hwInfo.featureTable; + auto &workaroundTable = hwInfo.workaroundTable; + DeviceDescriptor device = {0, &hwInfo, &TypeParam::setupHardwareInfo, GTTYPE_GT1}; + + int ret = drm.setupHardwareInfo(&device, false); + + EXPECT_EQ(ret, 0); + EXPECT_EQ(8u, gtSystemInfo.CsrSizeInMb); + EXPECT_FALSE(gtSystemInfo.IsL3HashModeEnabled); + EXPECT_FALSE(gtSystemInfo.IsDynamicallyPopulated); + + EXPECT_FALSE(featureTable.ftrL3IACoherency); + EXPECT_FALSE(featureTable.ftrPPGTT); + EXPECT_FALSE(featureTable.ftrSVM); + EXPECT_FALSE(featureTable.ftrIA32eGfxPTEs); + EXPECT_FALSE(featureTable.ftrStandardMipTailFormat); + EXPECT_FALSE(featureTable.ftrTranslationTable); + EXPECT_FALSE(featureTable.ftrUserModeTranslationTable); + EXPECT_FALSE(featureTable.ftrTileMappedResource); + EXPECT_FALSE(featureTable.ftrEnableGuC); + EXPECT_FALSE(featureTable.ftrFbc); + EXPECT_FALSE(featureTable.ftrFbc2AddressTranslation); + EXPECT_FALSE(featureTable.ftrFbcBlitterTracking); + EXPECT_FALSE(featureTable.ftrFbcCpuTracking); + EXPECT_FALSE(featureTable.ftrTileY); + EXPECT_FALSE(featureTable.ftrAstcHdr2D); + EXPECT_FALSE(featureTable.ftrAstcLdr2D); + EXPECT_FALSE(featureTable.ftr3dMidBatchPreempt); + EXPECT_FALSE(featureTable.ftrGpGpuMidBatchPreempt); + EXPECT_FALSE(featureTable.ftrGpGpuThreadGroupLevelPreempt); + EXPECT_FALSE(featureTable.ftrPerCtxtPreemptionGranularityControl); + + EXPECT_FALSE(workaroundTable.wa4kAlignUVOffsetNV12LinearSurface); + EXPECT_FALSE(workaroundTable.waEnablePreemptionGranularityControlByUMD); + EXPECT_FALSE(workaroundTable.waUntypedBufferCompression); + + ret = drm.setupHardwareInfo(&device, true); + + EXPECT_EQ(ret, 0); + EXPECT_EQ(8u, gtSystemInfo.CsrSizeInMb); + EXPECT_FALSE(gtSystemInfo.IsL3HashModeEnabled); + EXPECT_FALSE(gtSystemInfo.IsDynamicallyPopulated); + + EXPECT_TRUE(featureTable.ftrL3IACoherency); + EXPECT_TRUE(featureTable.ftrPPGTT); + EXPECT_TRUE(featureTable.ftrSVM); + EXPECT_TRUE(featureTable.ftrIA32eGfxPTEs); + EXPECT_TRUE(featureTable.ftrStandardMipTailFormat); + EXPECT_TRUE(featureTable.ftrTranslationTable); + EXPECT_TRUE(featureTable.ftrUserModeTranslationTable); + EXPECT_TRUE(featureTable.ftrTileMappedResource); + EXPECT_TRUE(featureTable.ftrEnableGuC); + EXPECT_TRUE(featureTable.ftrFbc); + EXPECT_TRUE(featureTable.ftrFbc2AddressTranslation); + EXPECT_TRUE(featureTable.ftrFbcBlitterTracking); + EXPECT_TRUE(featureTable.ftrFbcCpuTracking); + EXPECT_FALSE(featureTable.ftrTileY); + EXPECT_TRUE(featureTable.ftrAstcHdr2D); + EXPECT_TRUE(featureTable.ftrAstcLdr2D); + EXPECT_TRUE(featureTable.ftr3dMidBatchPreempt); + EXPECT_TRUE(featureTable.ftrGpGpuMidBatchPreempt); + EXPECT_TRUE(featureTable.ftrGpGpuThreadGroupLevelPreempt); + EXPECT_TRUE(featureTable.ftrPerCtxtPreemptionGranularityControl); + + EXPECT_TRUE(workaroundTable.wa4kAlignUVOffsetNV12LinearSurface); + EXPECT_TRUE(workaroundTable.waEnablePreemptionGranularityControlByUMD); + EXPECT_TRUE(workaroundTable.waUntypedBufferCompression); +} + +TYPED_TEST(AdlpConfigHwInfoTests, givenSliceCountZeroWhenSetupHardwareInfoThenNotZeroValuesSetInGtSystemInfo) { + HardwareInfo hwInfo = {}; + hwInfo.gtSystemInfo = {0}; + + TypeParam::setupHardwareInfo(&hwInfo, false); + + EXPECT_NE(0u, hwInfo.gtSystemInfo.SliceCount); + EXPECT_NE(0u, hwInfo.gtSystemInfo.SubSliceCount); + EXPECT_NE(0u, hwInfo.gtSystemInfo.EUCount); + EXPECT_NE(0u, hwInfo.gtSystemInfo.MaxEuPerSubSlice); + EXPECT_NE(0u, hwInfo.gtSystemInfo.MaxSlicesSupported); + EXPECT_NE(0u, hwInfo.gtSystemInfo.MaxSubSlicesSupported); + EXPECT_NE(0u, hwInfo.gtSystemInfo.L3BankCount); + EXPECT_TRUE(hwInfo.gtSystemInfo.CCSInfo.IsValid); + EXPECT_NE(0u, hwInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled); +} diff --git a/opencl/test/unit_test/gen12lp/adlp/test_device_caps_adlp.cpp b/opencl/test/unit_test/gen12lp/adlp/test_device_caps_adlp.cpp new file mode 100644 index 0000000000..73d9258caa --- /dev/null +++ b/opencl/test/unit_test/gen12lp/adlp/test_device_caps_adlp.cpp @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "opencl/test/unit_test/fixtures/cl_device_fixture.h" +#include "test.h" + +using namespace NEO; + +using AdlpUsDeviceIdTest = Test; + +ADLPTEST_F(AdlpUsDeviceIdTest, GivenNonZeroIdThenIsSimulationIsTrue) { + unsigned short simulationIds[] = { + 0, // default, non-simulation + }; + + for (auto id : simulationIds) { + auto mockDevice = std::unique_ptr(createWithUsDeviceId(id)); + ASSERT_NE(mockDevice.get(), nullptr); + + if (id == 0) { + EXPECT_FALSE(mockDevice->isSimulation()); + } else { + EXPECT_TRUE(mockDevice->isSimulation()); + } + } +} + +ADLPTEST_F(AdlpUsDeviceIdTest, givenADLPWhenCheckFtrSupportsInteger64BitAtomicsThenReturnFalse) { + EXPECT_TRUE(pDevice->getHardwareInfo().capabilityTable.ftrSupportsInteger64BitAtomics); +} + +ADLPTEST_F(AdlpUsDeviceIdTest, givenAdlpWhenRequestedVmeFlagsThenReturnFalse) { + EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.supportsVme); + EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.ftrSupportsVmeAvcTextureSampler); + EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.ftrSupportsVmeAvcPreemption); +} diff --git a/opencl/test/unit_test/gen12lp/special_ult_helper_gen12lp.cpp b/opencl/test/unit_test/gen12lp/special_ult_helper_gen12lp.cpp index cb5abb361b..0ebd30596b 100644 --- a/opencl/test/unit_test/gen12lp/special_ult_helper_gen12lp.cpp +++ b/opencl/test/unit_test/gen12lp/special_ult_helper_gen12lp.cpp @@ -22,11 +22,7 @@ bool SpecialUltHelperGen12lp::additionalCoherencyCheck(PRODUCT_FAMILY productFam } bool SpecialUltHelperGen12lp::shouldPerformimagePitchAlignment(PRODUCT_FAMILY productFamily) { - if (productFamily == IGFX_ROCKETLAKE || productFamily == IGFX_ALDERLAKE_S) { - return false; - } - - return true; + return productFamily == PRODUCT_FAMILY::IGFX_TIGERLAKE_LP || productFamily == PRODUCT_FAMILY::IGFX_DG1; } bool SpecialUltHelperGen12lp::shouldTestDefaultImplementationOfSetupHardwareCapabilities(PRODUCT_FAMILY productFamily) { @@ -34,11 +30,7 @@ bool SpecialUltHelperGen12lp::shouldTestDefaultImplementationOfSetupHardwareCapa } bool SpecialUltHelperGen12lp::isPipeControlWArequired(PRODUCT_FAMILY productFamily) { - if (productFamily == IGFX_ROCKETLAKE || productFamily == IGFX_ALDERLAKE_S) { - return false; - } - - return true; + return productFamily == IGFX_TIGERLAKE_LP || productFamily == IGFX_DG1; } } // namespace NEO diff --git a/opencl/test/unit_test/linux/CMakeLists.txt b/opencl/test/unit_test/linux/CMakeLists.txt index 28f39168fa..317641048a 100644 --- a/opencl/test/unit_test/linux/CMakeLists.txt +++ b/opencl/test/unit_test/linux/CMakeLists.txt @@ -48,7 +48,7 @@ target_link_libraries(igdrcl_${target_name} ${NEO_STATICALLY_LINKED_LIBRARIES_MO set_property(TARGET igdrcl_${target_name} APPEND_STRING PROPERTY COMPILE_FLAGS ${ASAN_FLAGS}) target_include_directories(igdrcl_${target_name} PRIVATE ${NEO_SHARED_TEST_DIRECTORY}/common/test_macros/header${BRANCH_DIR_SUFFIX} - ${NEO_SOURCE_DIR}/opencl/source/dll/linux/devices${BRANCH_DIR_SUFFIX} + ${NEO_SHARED_DIRECTORY}/dll/linux/devices${BRANCH_DIR_SUFFIX} ${NEO_SOURCE_DIR}/opencl/test/unit_test/gen_common${BRANCH_DIR_SUFFIX} ${CMAKE_CURRENT_SOURCE_DIR} ) diff --git a/shared/offline_compiler/source/CMakeLists.txt b/shared/offline_compiler/source/CMakeLists.txt index 05b83cec09..1e0796e580 100644 --- a/shared/offline_compiler/source/CMakeLists.txt +++ b/shared/offline_compiler/source/CMakeLists.txt @@ -24,6 +24,7 @@ set(CLOC_LIB_SRCS_LIB ${NEO_SHARED_DIRECTORY}/device_binary_format/elf/elf_encoder.h ${NEO_SHARED_DIRECTORY}/device_binary_format/elf/ocl_elf.h ${NEO_SHARED_DIRECTORY}/dll/devices${BRANCH_DIR_SUFFIX}/devices.inl + ${NEO_SHARED_DIRECTORY}/dll/devices${BRANCH_DIR_SUFFIX}/devices_additional.inl ${NEO_SHARED_DIRECTORY}/dll/devices/devices_base.inl ${NEO_SHARED_DIRECTORY}/helpers/abort.cpp ${NEO_SHARED_DIRECTORY}/helpers/compiler_options_parser.cpp @@ -110,10 +111,13 @@ set(RUNTIME_GENX_CPP_FILES macro(macro_for_each_platform) foreach(BRANCH_DIR ${BRANCH_DIR_LIST}) foreach(BRANCH ${BRANCH_DIR_LIST}) - set(SRC_FILE ${NEO_SOURCE_DIR}/opencl/source${BRANCH}${GEN_TYPE_LOWER}${BRANCH_DIR}hw_info_${PLATFORM_IT_LOWER}.cpp) - if(EXISTS ${SRC_FILE}) - list(APPEND CLOC_LIB_SRCS_LIB ${SRC_FILE}) - endif() + foreach(SRC_FILE ${NEO_SOURCE_DIR}/opencl/source${BRANCH}${GEN_TYPE_LOWER}/definitions${BRANCH_DIR_SUFFIX}hw_info_setup_${PLATFORM_IT_LOWER}.inl + ${NEO_SOURCE_DIR}/opencl/source${BRANCH}${GEN_TYPE_LOWER}${BRANCH_DIR}hw_info_${PLATFORM_IT_LOWER}.cpp + ) + if(EXISTS ${SRC_FILE}) + list(APPEND CLOC_LIB_SRCS_LIB ${SRC_FILE}) + endif() + endforeach() endforeach() endforeach() endmacro() diff --git a/shared/source/ail/gen12lp/adlp/ail_configuration_adlp.cpp b/shared/source/ail/gen12lp/adlp/ail_configuration_adlp.cpp new file mode 100644 index 0000000000..40835c4b6c --- /dev/null +++ b/shared/source/ail/gen12lp/adlp/ail_configuration_adlp.cpp @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/ail/ail_configuration.h" + +#include +namespace NEO { +static EnableAIL enableAILADLP; + +std::map> applicationMapADLP = {}; + +template <> +inline void AILConfigurationHw::applyExt(RuntimeCapabilityTable &runtimeCapabilityTable) { +} +} // namespace NEO diff --git a/shared/source/aub_mem_dump/definitions/aub_services.h b/shared/source/aub_mem_dump/definitions/aub_services.h index 794c959fa8..a9a7ec2c45 100644 --- a/shared/source/aub_mem_dump/definitions/aub_services.h +++ b/shared/source/aub_mem_dump/definitions/aub_services.h @@ -104,6 +104,7 @@ struct CmdServicesMemTraceVersion { Dg1 = 30, Adls = 37, XeHP_SDV = 29, + Adlp = 38, }; }; struct RecordingMethodValues { diff --git a/shared/source/dll/devices/devices.inl b/shared/source/dll/devices/devices.inl index f602d568d6..365670f797 100644 --- a/shared/source/dll/devices/devices.inl +++ b/shared/source/dll/devices/devices.inl @@ -5,4 +5,5 @@ * */ -#include "shared/source/dll/devices/devices_base.inl" +#include "shared/source/dll/devices/devices_additional.inl" +#include "shared/source/dll/devices/devices_base.inl" \ No newline at end of file diff --git a/shared/source/dll/devices/devices_additional.inl b/shared/source/dll/devices/devices_additional.inl new file mode 100644 index 0000000000..887976361a --- /dev/null +++ b/shared/source/dll/devices/devices_additional.inl @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#ifdef SUPPORT_GEN12LP +#ifdef SUPPORT_ADLP +DEVICE(0x46A0, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46B0, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46A1, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46A2, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46A3, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46A6, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46A8, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46AA, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x462A, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x4626, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x4628, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46B1, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46B2, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46B3, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46C0, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46C1, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46C2, ADLP_CONFIG, GTTYPE_GT2) +DEVICE(0x46C3, ADLP_CONFIG, GTTYPE_GT2) +#endif +#endif diff --git a/shared/source/gen12lp/CMakeLists.txt b/shared/source/gen12lp/CMakeLists.txt index 74c2b580bb..37aaf244cc 100644 --- a/shared/source/gen12lp/CMakeLists.txt +++ b/shared/source/gen12lp/CMakeLists.txt @@ -8,14 +8,23 @@ if(SUPPORT_DG1) set(SHARED_SRCS_ADDITIONAL_FILES_GEN12LP ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}/helpers_gen12lp_dg1.cpp ${CMAKE_CURRENT_SOURCE_DIR}/helpers_gen12lp.h + ${CMAKE_CURRENT_SOURCE_DIR}/helpers_gen12lp.inl ) else() set(SHARED_SRCS_ADDITIONAL_FILES_GEN12LP ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}/helpers_gen12lp.cpp ${CMAKE_CURRENT_SOURCE_DIR}/helpers_gen12lp.h + ${CMAKE_CURRENT_SOURCE_DIR}/helpers_gen12lp.inl ) endif() set_property(GLOBAL PROPERTY SHARED_SRCS_ADDITIONAL_FILES_GEN12LP ${SHARED_SRCS_ADDITIONAL_FILES_GEN12LP}) +if(SUPPORT_ADLP) + set(HW_DEFINITIONS_ADLP + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/definitions${BRANCH_DIR_SUFFIX}/hw_cmds_adlp.inl + ) + set_property(GLOBAL APPEND PROPERTY CORE_SRCS_GENX_ALL_BASE ${HW_DEFINITIONS_ADLP}) +endif() add_subdirectories() diff --git a/shared/source/gen12lp/definitions/hw_cmds_adlp.inl b/shared/source/gen12lp/definitions/hw_cmds_adlp.inl new file mode 100644 index 0000000000..af3c51cc00 --- /dev/null +++ b/shared/source/gen12lp/definitions/hw_cmds_adlp.inl @@ -0,0 +1,6 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ diff --git a/shared/source/gen12lp/enable_gen12lp.cpp b/shared/source/gen12lp/enable_gen12lp.cpp index 4a6d3a5dff..00a3613095 100644 --- a/shared/source/gen12lp/enable_gen12lp.cpp +++ b/shared/source/gen12lp/enable_gen12lp.cpp @@ -24,4 +24,7 @@ static EnableGfxProductHw enableGfxProductHwRKL; #ifdef SUPPORT_ADLS static EnableGfxProductHw enableGfxProductHwADLS; #endif +#ifdef SUPPORT_ADLP +static EnableGfxProductHw enableGfxProductHwADLP; +#endif } // namespace NEO diff --git a/shared/source/gen12lp/enable_hw_info_config_adlp.cpp b/shared/source/gen12lp/enable_hw_info_config_adlp.cpp new file mode 100644 index 0000000000..a6931edfa5 --- /dev/null +++ b/shared/source/gen12lp/enable_hw_info_config_adlp.cpp @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/gen12lp/hw_cmds.h" +#include "shared/source/os_interface/hw_info_config.h" + +namespace NEO { + +static EnableProductHwInfoConfig enableADLP; + +} // namespace NEO diff --git a/shared/source/gen12lp/helpers_gen12lp.cpp b/shared/source/gen12lp/helpers_gen12lp.cpp index 0b9fbdbd2a..69ef822c98 100644 --- a/shared/source/gen12lp/helpers_gen12lp.cpp +++ b/shared/source/gen12lp/helpers_gen12lp.cpp @@ -8,7 +8,7 @@ #include "shared/source/gen12lp/helpers_gen12lp.h" #include "shared/source/command_stream/command_stream_receiver.h" -#include "shared/source/helpers/hw_helper.h" +#include "shared/source/gen12lp/helpers_gen12lp.inl" #include "opencl/source/helpers/hardware_commands_helper.h" @@ -45,10 +45,6 @@ uint64_t getPPGTTAdditionalBits(GraphicsAllocation *graphicsAllocation) { void adjustAubGTTData(const CommandStreamReceiver &commandStreamReceiver, AubGTTData &data) {} -void setAdditionalPipelineSelectFields(void *pipelineSelectCmd, - const PipelineSelectArgs &pipelineSelectArgs, - const HardwareInfo &hwInfo) {} - bool isOffsetToSkipSetFFIDGPWARequired(const HardwareInfo &hwInfo) { HwHelper &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily); return hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo); diff --git a/shared/source/gen12lp/helpers_gen12lp.inl b/shared/source/gen12lp/helpers_gen12lp.inl new file mode 100644 index 0000000000..2873a9a6f4 --- /dev/null +++ b/shared/source/gen12lp/helpers_gen12lp.inl @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/hw_helper.h" +#include "shared/source/helpers/pipeline_select_helper.h" + +namespace NEO { +namespace Gen12LPHelpers { +void setAdditionalPipelineSelectFields(void *pipelineSelectCmd, + const PipelineSelectArgs &pipelineSelectArgs, + const HardwareInfo &hwInfo) { + using PIPELINE_SELECT = typename TGLLPFamily::PIPELINE_SELECT; + auto pipelineSelectTglplpCmd = reinterpret_cast(pipelineSelectCmd); + + auto mask = pipelineSelectTglplpCmd->getMaskBits(); + + if (hwInfo.platform.eProductFamily == IGFX_ALDERLAKE_P) { + mask |= pipelineSelectSystolicModeEnableMaskBits; + pipelineSelectTglplpCmd->setMaskBits(mask); + pipelineSelectTglplpCmd->setSpecialModeEnable(pipelineSelectArgs.specialPipelineSelectMode); + } +} +} // namespace Gen12LPHelpers +} // namespace NEO diff --git a/shared/source/gen12lp/helpers_gen12lp_dg1.cpp b/shared/source/gen12lp/helpers_gen12lp_dg1.cpp index 9e25e620d5..88fd9a2185 100644 --- a/shared/source/gen12lp/helpers_gen12lp_dg1.cpp +++ b/shared/source/gen12lp/helpers_gen12lp_dg1.cpp @@ -8,7 +8,7 @@ #include "shared/source/aub_mem_dump/page_table_entry_bits.h" #include "shared/source/command_stream/command_stream_receiver.h" #include "shared/source/gen12lp/helpers_gen12lp.h" -#include "shared/source/helpers/hw_helper.h" +#include "shared/source/gen12lp/helpers_gen12lp.inl" #include "opencl/source/command_stream/command_stream_receiver_simulated_common_hw.h" @@ -70,10 +70,6 @@ void adjustAubGTTData(const CommandStreamReceiver &commandStreamReceiver, AubGTT data.localMemory = commandStreamReceiver.isLocalMemoryEnabled(); } -void setAdditionalPipelineSelectFields(void *pipelineSelectCmd, - const PipelineSelectArgs &pipelineSelectArgs, - const HardwareInfo &hwInfo) {} - bool isOffsetToSkipSetFFIDGPWARequired(const HardwareInfo &hwInfo) { HwHelper &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily); return hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo); diff --git a/shared/source/gen12lp/hw_cmds.h b/shared/source/gen12lp/hw_cmds.h index e5ef818727..900acb4d51 100644 --- a/shared/source/gen12lp/hw_cmds.h +++ b/shared/source/gen12lp/hw_cmds.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019-2020 Intel Corporation + * Copyright (C) 2019-2021 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -19,3 +19,6 @@ #ifdef SUPPORT_ADLS #include "hw_cmds_adls.h" #endif +#ifdef SUPPORT_ADLP +#include "hw_cmds_adlp.h" +#endif diff --git a/shared/source/gen12lp/hw_cmds_adlp.h b/shared/source/gen12lp/hw_cmds_adlp.h new file mode 100644 index 0000000000..563a781614 --- /dev/null +++ b/shared/source/gen12lp/hw_cmds_adlp.h @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#pragma once +#include "shared/source/gen12lp/hw_cmds_base.h" +namespace NEO { + +struct ADLP : public TGLLPFamily { + static const PLATFORM platform; + static const HardwareInfo hwInfo; + static const uint64_t defaultHardwareInfoConfig; + static FeatureTable featureTable; + static WorkaroundTable workaroundTable; + static const uint32_t threadsPerEu = 7; + static const uint32_t maxEuPerSubslice = 16; + static const uint32_t maxSlicesSupported = 1; + static const uint32_t maxSubslicesSupported = 6; + static const uint32_t maxDualSubslicesSupported = 12; + static const RuntimeCapabilityTable capabilityTable; + static void (*setupHardwareInfo)(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig); + static void setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo); +}; + +class ADLP_CONFIG : public ADLP { + public: + static void setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable); + static const HardwareInfo hwInfo; + + private: + static GT_SYSTEM_INFO gtSystemInfo; +}; +#include "hw_cmds_adlp.inl" +} // namespace NEO diff --git a/shared/source/gen12lp/hw_helper_gen12lp.cpp b/shared/source/gen12lp/hw_helper_gen12lp.cpp index f934db5953..bff3552faa 100644 --- a/shared/source/gen12lp/hw_helper_gen12lp.cpp +++ b/shared/source/gen12lp/hw_helper_gen12lp.cpp @@ -94,7 +94,8 @@ uint32_t HwHelperHw::getHwRevIdFromStepping(uint32_t stepping, const Har case REVISION_C: return 0x4; } - } else if (hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_S) { + } else if ((hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_S) || + (hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_P)) { switch (stepping) { case REVISION_A0: return 0x0; @@ -125,7 +126,8 @@ uint32_t HwHelperHw::getSteppingFromHwRevId(const HardwareInfo &hwInfo) case 0x4: return REVISION_C; } - } else if (hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_S) { + } else if ((hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_S) || + (hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_P)) { switch (hwInfo.platform.usRevId) { case 0x0: return REVISION_A0; diff --git a/shared/source/gen12lp/hw_info.h b/shared/source/gen12lp/hw_info.h index 46bf2ab00d..fa16724bfd 100644 --- a/shared/source/gen12lp/hw_info.h +++ b/shared/source/gen12lp/hw_info.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019-2020 Intel Corporation + * Copyright (C) 2019-2021 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -18,3 +18,6 @@ #ifdef SUPPORT_ADLS #include "hw_info_adls.h" #endif +#ifdef SUPPORT_ADLP +#include "hw_info_adlp.h" +#endif \ No newline at end of file diff --git a/shared/source/gen12lp/hw_info_adlp.h b/shared/source/gen12lp/hw_info_adlp.h new file mode 100644 index 0000000000..e47ab7fc01 --- /dev/null +++ b/shared/source/gen12lp/hw_info_adlp.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#pragma once +#include "shared/source/gen12lp/hw_info_gen12lp.h" + +namespace NEO { + +struct ADLP; + +template <> +struct HwMapper { + enum { gfxFamily = IGFX_GEN12LP_CORE }; + + static const char *abbreviation; + using GfxFamily = GfxFamilyMapper(gfxFamily)>::GfxFamily; + using GfxProduct = ADLP; +}; +} // namespace NEO diff --git a/shared/source/gen12lp/linux/hw_info_config_adlp.cpp b/shared/source/gen12lp/linux/hw_info_config_adlp.cpp new file mode 100644 index 0000000000..42b3be767d --- /dev/null +++ b/shared/source/gen12lp/linux/hw_info_config_adlp.cpp @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/gen12lp/helpers_gen12lp.h" +#include "shared/source/os_interface/hw_info_config.h" +#include "shared/source/os_interface/hw_info_config.inl" +#include "shared/source/os_interface/hw_info_config_bdw_and_later.inl" + +namespace NEO { + +template <> +void HwInfoConfigHw::adjustPlatformForProductFamily(HardwareInfo *hwInfo) { + PLATFORM *platform = &hwInfo->platform; + platform->eRenderCoreFamily = IGFX_GEN12LP_CORE; + platform->eDisplayCoreFamily = IGFX_GEN12LP_CORE; +} + +template <> +int HwInfoConfigHw::configureHardwareCustom(HardwareInfo *hwInfo, OSInterface *osIface) { + GT_SYSTEM_INFO *gtSystemInfo = &hwInfo->gtSystemInfo; + gtSystemInfo->SliceCount = 1; + HwHelper &hwHelper = HwHelper::get(hwInfo->platform.eRenderCoreFamily); + hwInfo->featureTable.ftrGpGpuMidThreadLevelPreempt = (hwInfo->platform.usRevId >= hwHelper.getHwRevIdFromStepping(REVISION_B, *hwInfo)); + + enableBlitterOperationsSupport(hwInfo); + + return 0; +} + +template class HwInfoConfigHw; +} // namespace NEO diff --git a/shared/source/gen12lp/windows/hw_info_config_adlp.cpp b/shared/source/gen12lp/windows/hw_info_config_adlp.cpp new file mode 100644 index 0000000000..d07a233941 --- /dev/null +++ b/shared/source/gen12lp/windows/hw_info_config_adlp.cpp @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/hw_info.h" +#include "shared/source/os_interface/hw_info_config.h" +#include "shared/source/os_interface/hw_info_config.inl" +#include "shared/source/os_interface/hw_info_config_bdw_and_later.inl" + +namespace NEO { + +template <> +void HwInfoConfigHw::adjustPlatformForProductFamily(HardwareInfo *hwInfo) { + PLATFORM *platform = &hwInfo->platform; + platform->eRenderCoreFamily = IGFX_GEN12LP_CORE; + platform->eDisplayCoreFamily = IGFX_GEN12LP_CORE; +} + +template class HwInfoConfigHw; + +} // namespace NEO diff --git a/shared/source/sku_info/operations/sku_info_transfer.h b/shared/source/sku_info/operations/sku_info_transfer.h index eba3502305..0d0a1e91ea 100644 --- a/shared/source/sku_info/operations/sku_info_transfer.h +++ b/shared/source/sku_info/operations/sku_info_transfer.h @@ -7,7 +7,6 @@ #pragma once #include "shared/source/gmm_helper/gmm_lib.h" -#include "shared/source/sku_info/operations/sku_info_transfer.h" #include "sku_info.h" diff --git a/shared/test/common/gen12lp/adlp/CMakeLists.txt b/shared/test/common/gen12lp/adlp/CMakeLists.txt new file mode 100644 index 0000000000..29c90220bc --- /dev/null +++ b/shared/test/common/gen12lp/adlp/CMakeLists.txt @@ -0,0 +1,18 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_ADLP) + set(NEO_CORE_TESTS_GEN12LP_ADLP + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/preamble_helper_tests_adlp.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/test_hw_info_config_adlp.cpp + ) + set_property(GLOBAL PROPERTY NEO_CORE_TESTS_GEN12LP_ADLP ${NEO_CORE_TESTS_GEN12LP_ADLP}) + add_subdirectories() + target_sources(${TARGET_NAME} PRIVATE + ${NEO_CORE_TESTS_GEN12LP_ADLP} + ) +endif() diff --git a/shared/test/common/gen12lp/adlp/preamble_helper_tests_adlp.cpp b/shared/test/common/gen12lp/adlp/preamble_helper_tests_adlp.cpp new file mode 100644 index 0000000000..f9607b3d71 --- /dev/null +++ b/shared/test/common/gen12lp/adlp/preamble_helper_tests_adlp.cpp @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/command_stream/csr_definitions.h" +#include "shared/source/command_stream/linear_stream.h" +#include "shared/source/helpers/pipeline_select_helper.h" +#include "shared/source/helpers/preamble.h" +#include "shared/test/common/helpers/dispatch_flags_helper.h" + +#include "test.h" + +using namespace NEO; + +using PreambleHelperTestsAdlp = ::testing::Test; + +ADLPTEST_F(PreambleHelperTestsAdlp, givenSpecialPipelineSelectModeDisabledWhenProgrammingPipelineSelectThenDisableSystolicMode) { + using PIPELINE_SELECT = typename FamilyType::PIPELINE_SELECT; + constexpr static auto bufferSize = sizeof(PIPELINE_SELECT); + + char streamBuffer[bufferSize]; + LinearStream stream{streamBuffer, sizeof(bufferSize)}; + + DispatchFlags flags = DispatchFlagsHelper::createDefaultDispatchFlags(); + flags.pipelineSelectArgs.specialPipelineSelectMode = false; + + auto *pCmd = static_cast(stream.getSpace(0)); + PreambleHelper::programPipelineSelect(&stream, flags.pipelineSelectArgs, ADLP::hwInfo); + + const auto expectedMask = pipelineSelectEnablePipelineSelectMaskBits | pipelineSelectMediaSamplerDopClockGateMaskBits | pipelineSelectSystolicModeEnableMaskBits; + EXPECT_FALSE(pCmd->getSpecialModeEnable()); + EXPECT_EQ(expectedMask, pCmd->getMaskBits()); + EXPECT_EQ(PIPELINE_SELECT::PIPELINE_SELECTION_GPGPU, pCmd->getPipelineSelection()); +} + +ADLPTEST_F(PreambleHelperTestsAdlp, givenSpecialPipelineSelectModeEnabledWhenProgrammingPipelineSelectThenEnableSystolicMode) { + using PIPELINE_SELECT = typename FamilyType::PIPELINE_SELECT; + constexpr static auto bufferSize = sizeof(PIPELINE_SELECT); + + char streamBuffer[bufferSize]; + LinearStream stream{streamBuffer, sizeof(bufferSize)}; + + DispatchFlags flags = DispatchFlagsHelper::createDefaultDispatchFlags(); + flags.pipelineSelectArgs.specialPipelineSelectMode = true; + + auto *pCmd = static_cast(stream.getSpace(0)); + PreambleHelper::programPipelineSelect(&stream, flags.pipelineSelectArgs, ADLP::hwInfo); + + const auto expectedMask = pipelineSelectEnablePipelineSelectMaskBits | pipelineSelectMediaSamplerDopClockGateMaskBits | pipelineSelectSystolicModeEnableMaskBits; + EXPECT_TRUE(pCmd->getSpecialModeEnable()); + EXPECT_EQ(expectedMask, pCmd->getMaskBits()); + EXPECT_EQ(PIPELINE_SELECT::PIPELINE_SELECTION_GPGPU, pCmd->getPipelineSelection()); +} diff --git a/shared/test/common/gen12lp/adlp/test_hw_info_config_adlp.cpp b/shared/test/common/gen12lp/adlp/test_hw_info_config_adlp.cpp new file mode 100644 index 0000000000..b93d074a90 --- /dev/null +++ b/shared/test/common/gen12lp/adlp/test_hw_info_config_adlp.cpp @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2021 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/hw_helper.h" +#include "shared/test/common/helpers/default_hw_info.h" + +#include "opencl/source/helpers/hardware_commands_helper.h" +#include "test.h" + +using namespace NEO; + +using AdlpHwInfo = ::testing::Test; + +ADLPTEST_F(AdlpHwInfo, givenBoolWhenCallAdlpHardwareInfoSetupThenFeatureTableAndWorkaroundTableAreSetCorrect) { + static bool boolValue[]{ + true, false}; + HardwareInfo hwInfo = *defaultHwInfo; + GT_SYSTEM_INFO >SystemInfo = hwInfo.gtSystemInfo; + FeatureTable &featureTable = hwInfo.featureTable; + WorkaroundTable &workaroundTable = hwInfo.workaroundTable; + + uint64_t config = 0x0; + for (auto setParamBool : boolValue) { + + gtSystemInfo = {0}; + featureTable = {}; + workaroundTable = {}; + hardwareInfoSetup[productFamily](&hwInfo, setParamBool, config); + + EXPECT_EQ(setParamBool, featureTable.ftrL3IACoherency); + EXPECT_EQ(setParamBool, featureTable.ftrPPGTT); + EXPECT_EQ(setParamBool, featureTable.ftrSVM); + EXPECT_EQ(setParamBool, featureTable.ftrIA32eGfxPTEs); + EXPECT_EQ(setParamBool, featureTable.ftrStandardMipTailFormat); + EXPECT_EQ(setParamBool, featureTable.ftrTranslationTable); + EXPECT_EQ(setParamBool, featureTable.ftrUserModeTranslationTable); + EXPECT_EQ(setParamBool, featureTable.ftrTileMappedResource); + EXPECT_EQ(setParamBool, featureTable.ftrEnableGuC); + EXPECT_EQ(setParamBool, featureTable.ftrFbc); + EXPECT_EQ(setParamBool, featureTable.ftrFbc2AddressTranslation); + EXPECT_EQ(setParamBool, featureTable.ftrFbcBlitterTracking); + EXPECT_EQ(setParamBool, featureTable.ftrFbcCpuTracking); + EXPECT_FALSE(featureTable.ftrTileY); + EXPECT_EQ(setParamBool, featureTable.ftrAstcHdr2D); + EXPECT_EQ(setParamBool, featureTable.ftrAstcLdr2D); + EXPECT_EQ(setParamBool, featureTable.ftr3dMidBatchPreempt); + EXPECT_EQ(setParamBool, featureTable.ftrGpGpuMidBatchPreempt); + EXPECT_EQ(setParamBool, featureTable.ftrGpGpuThreadGroupLevelPreempt); + EXPECT_EQ(setParamBool, featureTable.ftrPerCtxtPreemptionGranularityControl); + + EXPECT_EQ(setParamBool, workaroundTable.wa4kAlignUVOffsetNV12LinearSurface); + EXPECT_EQ(setParamBool, workaroundTable.waEnablePreemptionGranularityControlByUMD); + EXPECT_EQ(setParamBool, workaroundTable.waUntypedBufferCompression); + } +} + +ADLPTEST_F(AdlpHwInfo, whenPlatformIsAdlpThenExpectSvmIsSet) { + const HardwareInfo &hardwareInfo = ADLP::hwInfo; + EXPECT_TRUE(hardwareInfo.capabilityTable.ftrSvm); +} + +ADLPTEST_F(AdlpHwInfo, givenAdlpWhenCheckL0ThenReturnTrue) { + const HardwareInfo &hardwareInfo = ADLP::hwInfo; + EXPECT_TRUE(hardwareInfo.capabilityTable.levelZeroSupported); +} diff --git a/shared/test/common/test_macros/header/test.h b/shared/test/common/test_macros/header/test.h index 87535a7908..e72490fca9 100644 --- a/shared/test/common/test_macros/header/test.h +++ b/shared/test/common/test_macros/header/test.h @@ -926,6 +926,16 @@ extern GFXCORE_FAMILY renderCoreFamily; IGFX_GEN12LP_CORE, \ IGFX_ALDERLAKE_S) #endif +#ifdef TESTS_ADLP +#define ADLPTEST_F(test_fixture, test_name) \ + FAMILYTEST_TEST_(test_fixture, test_name, test_fixture, \ + ::testing::internal::GetTypeId(), \ + IGFX_GEN12LP_CORE, IGFX_ALDERLAKE_P) +#define ADLPTEST_P(test_suite_name, test_name) \ + FAMILYTEST_TEST_P(test_suite_name, test_name, \ + IGFX_GEN12LP_CORE, \ + IGFX_ALDERLAKE_P) +#endif #ifdef TESTS_XE_HP_SDV #define XEHPTEST_F(test_fixture, test_name) \ FAMILYTEST_TEST_(test_fixture, test_name, test_fixture, \ @@ -1118,4 +1128,5 @@ using IsLKF = IsProduct; using IsSKL = IsProduct; using IsTGLLP = IsProduct; using IsRKL = IsProduct; -using IsXEHP = IsProduct; \ No newline at end of file +using IsXEHP = IsProduct; +using IsADLP = IsProduct; diff --git a/target_unit_tests/gen12lp/adlp/CMakeLists.txt b/target_unit_tests/gen12lp/adlp/CMakeLists.txt new file mode 100644 index 0000000000..e9bec2fb95 --- /dev/null +++ b/target_unit_tests/gen12lp/adlp/CMakeLists.txt @@ -0,0 +1,10 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_ADLP) + include(${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}/enable_adlp_testing.cmake) +endif() + diff --git a/target_unit_tests/gen12lp/adlp/enable_adlp_testing.cmake b/target_unit_tests/gen12lp/adlp/enable_adlp_testing.cmake new file mode 100644 index 0000000000..f594bb57a9 --- /dev/null +++ b/target_unit_tests/gen12lp/adlp/enable_adlp_testing.cmake @@ -0,0 +1,10 @@ +# +# Copyright (C) 2021 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_ADLP) + set(unit_test_config "adlp/1/2/8/0") # non-zero values for unit tests + include(${NEO_SOURCE_DIR}/cmake/run_ult_target.cmake) +endif()