From 602474f8684a2605e6a4e4b299269eab25ef4f23 Mon Sep 17 00:00:00 2001 From: "Zdanowicz, Zbigniew" Date: Tue, 14 Nov 2017 11:15:09 +0100 Subject: [PATCH] Command streamers should use device default engine type Change-Id: I7286f15ba78001729ea489a43576d96f109d44f0 --- manifests/manifest.yml | 2 +- runtime/CMakeLists.txt | 2 + runtime/command_queue/enqueue_common.h | 6 +-- .../aub_command_stream_receiver_hw.h | 14 +++---- .../aub_command_stream_receiver_hw.inl | 41 +++++++++--------- .../command_stream/command_stream_receiver.h | 2 +- .../command_stream_receiver_hw.h | 2 +- .../command_stream_receiver_hw.inl | 16 ++++--- .../tbx_command_stream_receiver_hw.h | 14 +++---- .../tbx_command_stream_receiver_hw.inl | 40 +++++++++--------- runtime/device/device.cpp | 4 ++ runtime/device/device.h | 2 + runtime/gen8/hw_info_bdw.cpp | 4 +- runtime/gen8/linux/drm_engine_mapper.cpp | 13 ++---- runtime/gen8/windows/wddm_engine_mapper.cpp | 13 ++---- runtime/gen9/hw_info_bxt.cpp | 2 +- runtime/gen9/hw_info_cfl.cpp | 2 +- runtime/gen9/hw_info_glk.cpp | 2 +- runtime/gen9/hw_info_kbl.cpp | 2 +- runtime/gen9/hw_info_skl.cpp | 2 +- runtime/gen9/linux/drm_engine_mapper.cpp | 13 ++---- runtime/gen9/windows/wddm_engine_mapper.cpp | 13 ++---- runtime/helpers/completion_stamp.h | 4 +- runtime/helpers/engine_node.h | 4 +- runtime/helpers/hw_info.h | 4 +- .../os_interface/linux/drm_command_stream.h | 4 +- .../os_interface/linux/drm_command_stream.inl | 12 ++++-- .../os_interface/linux/drm_engine_mapper.h | 4 +- .../os_interface/linux/drm_engine_mapper.inl | 41 ++++++++++++++++++ runtime/os_interface/linux/hw_info_config.cpp | 7 +++- .../os_interface/windows/device_factory.cpp | 11 ++++- .../windows/wddm_device_command_stream.h | 4 +- .../windows/wddm_device_command_stream.inl | 12 ++---- .../os_interface/windows/wddm_engine_mapper.h | 4 +- .../windows/wddm_engine_mapper.inl | 42 +++++++++++++++++++ .../aub_command_stream_tests.cpp | 8 ++-- .../command_stream/aub_mem_dump_tests.h | 6 +-- .../command_queue/drm_requirements_tests.cpp | 4 +- .../enqueue_fill_buffer_tests.cpp | 4 +- .../command_queue/enqueue_thread_tests.cpp | 4 +- .../aub_command_stream_receiver_tests.cpp | 20 ++++----- .../command_stream_receiver_hw_tests.cpp | 8 ++-- unit_tests/device/device_tests.cpp | 14 ++++++- unit_tests/gen8/hw_helper_tests.cpp | 4 +- unit_tests/gen9/hw_helper_tests.cpp | 4 +- unit_tests/kernel/kernel_tests.cpp | 4 +- unit_tests/mem_obj/buffer_tests.cpp | 8 ++-- unit_tests/mem_obj/image_tests.cpp | 8 ++-- unit_tests/mocks/mock_csr.cpp | 6 +-- unit_tests/mocks/mock_csr.h | 6 +-- .../os_interface/device_factory_tests.cpp | 18 +++++++- .../linux/drm_command_stream_tests.cpp | 4 +- 52 files changed, 300 insertions(+), 194 deletions(-) create mode 100644 runtime/os_interface/linux/drm_engine_mapper.inl create mode 100644 runtime/os_interface/windows/wddm_engine_mapper.inl diff --git a/manifests/manifest.yml b/manifests/manifest.yml index 4b05aed3e7..bc756390a3 100644 --- a/manifests/manifest.yml +++ b/manifests/manifest.yml @@ -36,7 +36,7 @@ components: internal: branch: master dest_dir: internal - revision: 2f5771ae1b1110c5b9df6afa56121489e105706c + revision: b3cece81eeefac6287b5f97eee11f93d26859116 type: git khronos: branch: master diff --git a/runtime/CMakeLists.txt b/runtime/CMakeLists.txt index 405bb5e11a..be700637c6 100644 --- a/runtime/CMakeLists.txt +++ b/runtime/CMakeLists.txt @@ -557,6 +557,7 @@ if (WIN32) os_interface/windows/wddm_device_command_stream.inl os_interface/windows/wddm_device_command_stream.h os_interface/windows/wddm_engine_mapper.h + os_interface/windows/wddm_engine_mapper.inl os_interface/windows/wddm_memory_manager.cpp os_interface/windows/wddm_memory_manager.h os_interface/windows/windows_inc.cpp @@ -587,6 +588,7 @@ if (UNIX) os_interface/linux/drm_command_stream.inl os_interface/linux/drm_command_stream.h os_interface/linux/drm_engine_mapper.h + os_interface/linux/drm_engine_mapper.inl os_interface/linux/drm_null_device.h os_interface/linux/drm_gem_close_worker.cpp os_interface/linux/drm_gem_close_worker.h diff --git a/runtime/command_queue/enqueue_common.h b/runtime/command_queue/enqueue_common.h index faf269fd28..caba825ecf 100644 --- a/runtime/command_queue/enqueue_common.h +++ b/runtime/command_queue/enqueue_common.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -180,6 +180,7 @@ void CommandQueueHw::enqueueHandler(Surface **surfacesForResidency, KernelOperation *blockedCommandsData = nullptr; std::unique_ptr printfHandler; bool slmUsed = false; + EngineType engineType = device->getEngineType(); TakeOwnershipWrapper> queueOwnership(*this); auto blockQueue = false; @@ -360,7 +361,7 @@ void CommandQueueHw::enqueueHandler(Surface **surfacesForResidency, Event::eventNotReady, taskLevel, 0, - EngineType::ENGINE_RCS}; + engineType}; completionStamp = cmplStamp; } updateFromCompletionStamp(completionStamp); @@ -371,7 +372,6 @@ void CommandQueueHw::enqueueHandler(Surface **surfacesForResidency, } if (blockQueue) { - if (executionModelKernel) { size_t minSizeISHForEM = KernelCommandsHelper::template getSizeRequiredForExecutionModel(const_cast(*(multiDispatchInfo.begin()->getKernel()))); size_t minSizeSSHForEM = KernelCommandsHelper::template getSizeRequiredForExecutionModel(const_cast(*(multiDispatchInfo.begin()->getKernel()))); diff --git a/runtime/command_stream/aub_command_stream_receiver_hw.h b/runtime/command_stream/aub_command_stream_receiver_hw.h index c96513369e..d8ddb10b8a 100644 --- a/runtime/command_stream/aub_command_stream_receiver_hw.h +++ b/runtime/command_stream/aub_command_stream_receiver_hw.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -36,7 +36,7 @@ class AUBCommandStreamReceiverHw : public CommandStreamReceiverHw { typedef typename AUB::MiContextDescriptorReg MiContextDescriptorReg; public: - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override; + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override; void makeResident(GraphicsAllocation &gfxAllocation) override; void makeNonResident(GraphicsAllocation &gfxAllocation) override; @@ -44,10 +44,10 @@ class AUBCommandStreamReceiverHw : public CommandStreamReceiverHw { void writeMemory(GraphicsAllocation &gfxAllocation); // Family specific version - void submitLRCA(EngineType engineOrdinal, const MiContextDescriptorReg &contextDescriptor); - void pollForCompletion(EngineType engineOrdinal); + void submitLRCA(EngineType engineType, const MiContextDescriptorReg &contextDescriptor); + void pollForCompletion(EngineType engineType); void initGlobalMMIO(); - void initEngineMMIO(EngineType engineOrdinal); + void initEngineMMIO(EngineType engineType); void addContextToken(); @@ -56,14 +56,14 @@ class AUBCommandStreamReceiverHw : public CommandStreamReceiverHw { AUBCommandStreamReceiverHw(const HardwareInfo &hwInfoIn); ~AUBCommandStreamReceiverHw() override; - void initializeEngine(EngineType engineOrdinal); + void initializeEngine(EngineType engineType); MemoryManager *createMemoryManager(bool enable64kbPages) override { this->memoryManager = new OsAgnosticMemoryManager(enable64kbPages); return this->memoryManager; } - static const AubMemDump::LrcaHelper &getCsTraits(EngineType engineOrdinal); + static const AubMemDump::LrcaHelper &getCsTraits(EngineType engineType); struct EngineInfo { void *pLRCA; diff --git a/runtime/command_stream/aub_command_stream_receiver_hw.inl b/runtime/command_stream/aub_command_stream_receiver_hw.inl index dd1d46c9cd..5022317d58 100644 --- a/runtime/command_stream/aub_command_stream_receiver_hw.inl +++ b/runtime/command_stream/aub_command_stream_receiver_hw.inl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 -2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -69,8 +69,8 @@ AUBCommandStreamReceiverHw::~AUBCommandStreamReceiverHw() { } template -const AubMemDump::LrcaHelper &AUBCommandStreamReceiverHw::getCsTraits(EngineType engineOrdinal) { - return *AUBFamilyMapper::csTraits[engineOrdinal]; +const AubMemDump::LrcaHelper &AUBCommandStreamReceiverHw::getCsTraits(EngineType engineType) { + return *AUBFamilyMapper::csTraits[engineType]; } template @@ -81,8 +81,8 @@ void AUBCommandStreamReceiverHw::initGlobalMMIO() { } template -void AUBCommandStreamReceiverHw::initEngineMMIO(EngineType engineOrdinal) { - auto mmioList = AUBFamilyMapper::perEngineMMIO[engineOrdinal]; +void AUBCommandStreamReceiverHw::initEngineMMIO(EngineType engineType) { + auto mmioList = AUBFamilyMapper::perEngineMMIO[engineType]; DEBUG_BREAK_IF(!mmioList); for (auto &mmioPair : *mmioList) { @@ -91,12 +91,12 @@ void AUBCommandStreamReceiverHw::initEngineMMIO(EngineType engineOrdi } template -void AUBCommandStreamReceiverHw::initializeEngine(EngineType engineOrdinal) { - auto mmioBase = getCsTraits(engineOrdinal).mmioBase; - auto &engineInfo = engineInfoTable[engineOrdinal]; +void AUBCommandStreamReceiverHw::initializeEngine(EngineType engineType) { + auto mmioBase = getCsTraits(engineType).mmioBase; + auto &engineInfo = engineInfoTable[engineType]; initGlobalMMIO(); - initEngineMMIO(engineOrdinal); + initEngineMMIO(engineType); // Global HW Status Page { @@ -118,7 +118,7 @@ void AUBCommandStreamReceiverHw::initializeEngine(EngineType engineOr } // Allocate the LRCA - auto csTraits = getCsTraits(engineOrdinal); + auto csTraits = getCsTraits(engineType); const size_t sizeLRCA = csTraits.sizeLRCA; const size_t alignLRCA = csTraits.alignLRCA; auto pLRCABase = alignedMalloc(sizeLRCA, alignLRCA); @@ -201,12 +201,12 @@ CommandStreamReceiver *AUBCommandStreamReceiverHw::create(const Hardw template FlushStamp AUBCommandStreamReceiverHw::flush(BatchBuffer &batchBuffer, - EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) { - uint32_t mmioBase = getCsTraits(engineOrdinal).mmioBase; - auto &engineInfo = engineInfoTable[engineOrdinal]; + EngineType engineType, ResidencyContainer *allocationsForResidency) { + uint32_t mmioBase = getCsTraits(engineType).mmioBase; + auto &engineInfo = engineInfoTable[engineType]; if (!engineInfo.pLRCA) { - initializeEngine(engineOrdinal); + initializeEngine(engineType); DEBUG_BREAK_IF(!engineInfo.pLRCA); } @@ -358,17 +358,16 @@ FlushStamp AUBCommandStreamReceiverHw::flush(BatchBuffer &batchBuffer contextDescriptor.sData.LogicalRingCtxAddress = ggttLRCA / 4096; contextDescriptor.sData.ContextID = 0; - submitLRCA(engineOrdinal, contextDescriptor); + submitLRCA(engineType, contextDescriptor); } - pollForCompletion(engineOrdinal); - + pollForCompletion(engineType); return 0; } template -void AUBCommandStreamReceiverHw::submitLRCA(EngineType engineOrdinal, const typename AUBCommandStreamReceiverHw::MiContextDescriptorReg &contextDescriptor) { - auto mmioBase = getCsTraits(engineOrdinal).mmioBase; +void AUBCommandStreamReceiverHw::submitLRCA(EngineType engineType, const typename AUBCommandStreamReceiverHw::MiContextDescriptorReg &contextDescriptor) { + auto mmioBase = getCsTraits(engineType).mmioBase; stream.writeMMIO(mmioBase + 0x2230, 0); stream.writeMMIO(mmioBase + 0x2230, 0); stream.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[1]); @@ -376,10 +375,10 @@ void AUBCommandStreamReceiverHw::submitLRCA(EngineType engineOrdinal, } template -void AUBCommandStreamReceiverHw::pollForCompletion(EngineType engineOrdinal) { +void AUBCommandStreamReceiverHw::pollForCompletion(EngineType engineType) { typedef typename AubMemDump::CmdServicesMemTraceRegisterPoll CmdServicesMemTraceRegisterPoll; - auto mmioBase = getCsTraits(engineOrdinal).mmioBase; + auto mmioBase = getCsTraits(engineType).mmioBase; bool pollNotEqual = false; this->stream.registerPoll( mmioBase + 0x2234, //EXECLIST_STATUS diff --git a/runtime/command_stream/command_stream_receiver.h b/runtime/command_stream/command_stream_receiver.h index 8fe7320e2b..5934a56d2b 100644 --- a/runtime/command_stream/command_stream_receiver.h +++ b/runtime/command_stream/command_stream_receiver.h @@ -52,7 +52,7 @@ class CommandStreamReceiver { CommandStreamReceiver(); virtual ~CommandStreamReceiver(); - virtual FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) = 0; + virtual FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) = 0; virtual CompletionStamp flushTask(LinearStream &commandStream, size_t commandStreamStart, const LinearStream &dsh, const LinearStream &ih, diff --git a/runtime/command_stream/command_stream_receiver_hw.h b/runtime/command_stream/command_stream_receiver_hw.h index d29ce642bd..717a96782e 100644 --- a/runtime/command_stream/command_stream_receiver_hw.h +++ b/runtime/command_stream/command_stream_receiver_hw.h @@ -43,7 +43,7 @@ class CommandStreamReceiverHw : public CommandStreamReceiver { CommandStreamReceiverHw(const HardwareInfo &hwInfoIn) : hwInfo(hwInfoIn) {} - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override { + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override { return flushStamp->peekStamp(); } diff --git a/runtime/command_stream/command_stream_receiver_hw.inl b/runtime/command_stream/command_stream_receiver_hw.inl index fc38cc42d0..9506c00f70 100644 --- a/runtime/command_stream/command_stream_receiver_hw.inl +++ b/runtime/command_stream/command_stream_receiver_hw.inl @@ -106,6 +106,7 @@ CompletionStamp CommandStreamReceiverHw::flushTask( auto levelClosed = false; void *currentPipeControlForNooping = nullptr; + Device *device = this->getMemoryManager()->device; if (dispatchFlags.blocking || dispatchFlags.dcFlush || dispatchFlags.guardCommandBufferWithPipeControl) { if (this->dispatchMode == ImmediateDispatch) { @@ -331,10 +332,11 @@ CompletionStamp CommandStreamReceiverHw::flushTask( size_t startOffset = submitCommandStreamFromCsr ? commandStreamStartCSR : commandStreamStartTask; auto &streamToSubmit = submitCommandStreamFromCsr ? commandStreamCSR : commandStreamTask; BatchBuffer batchBuffer{streamToSubmit.getGraphicsAllocation(), startOffset, dispatchFlags.requiresCoherency, dispatchFlags.low_priority, streamToSubmit.getUsed(), &streamToSubmit}; + EngineType engineType = device->getEngineType(); if (submitCSR | submitTask) { if (this->dispatchMode == DispatchMode::ImmediateDispatch) { - flushStamp->setStamp(this->flush(batchBuffer, EngineType::ENGINE_RCS, nullptr)); + flushStamp->setStamp(this->flush(batchBuffer, engineType, nullptr)); this->latestFlushedTaskCount = this->taskCount + 1; this->makeSurfacePackNonResident(nullptr); } else { @@ -353,7 +355,7 @@ CompletionStamp CommandStreamReceiverHw::flushTask( //check if we are not over the budget, if we are do implicit flush if (getMemoryManager()->isMemoryBudgetExhausted()) { - if (this->totalMemoryUsed >= this->getMemoryManager()->device->getDeviceInfo().globalMemSize / 4) { + if (this->totalMemoryUsed >= device->getDeviceInfo().globalMemSize / 4) { dispatchFlags.implicitFlush = true; } } @@ -371,7 +373,7 @@ CompletionStamp CommandStreamReceiverHw::flushTask( this->taskLevel, flushStamp->peekStamp(), 0, - EngineType::ENGINE_RCS}; + engineType}; this->taskLevel += levelClosed ? 1 : 0; return completionStamp; @@ -383,7 +385,9 @@ inline void CommandStreamReceiverHw::flushBatchedSubmissions() { return; } typedef typename GfxFamily::MI_BATCH_BUFFER_START MI_BATCH_BUFFER_START; - TakeOwnershipWrapper deviceOwnership(*this->getMemoryManager()->device); + Device *device = this->getMemoryManager()->device; + TakeOwnershipWrapper deviceOwnership(*device); + EngineType engineType = device->getEngineType(); auto &commandBufferList = this->submissionAggregator->peekCmdBufferList(); if (!commandBufferList.peekIsEmpty()) { @@ -394,7 +398,7 @@ inline void CommandStreamReceiverHw::flushBatchedSubmissions() { while (!commandBufferList.peekIsEmpty()) { size_t totalUsedSize = 0u; - this->submissionAggregator->aggregateCommandBuffers(resourcePackage, totalUsedSize, (size_t)this->getMemoryManager()->device->getDeviceInfo().globalMemSize * 5 / 10); + this->submissionAggregator->aggregateCommandBuffers(resourcePackage, totalUsedSize, (size_t)device->getDeviceInfo().globalMemSize * 5 / 10); auto primaryCmdBuffer = commandBufferList.removeFrontOne(); auto nextCommandBuffer = commandBufferList.peekHead(); auto currentBBendLocation = primaryCmdBuffer->batchBufferEndLocation; @@ -427,7 +431,7 @@ inline void CommandStreamReceiverHw::flushBatchedSubmissions() { surfacesForSubmit.push_back(surface); } - auto flushStamp = this->flush(primaryCmdBuffer->batchBuffer, EngineType::ENGINE_RCS, &surfacesForSubmit); + auto flushStamp = this->flush(primaryCmdBuffer->batchBuffer, engineType, &surfacesForSubmit); //after flush task level is closed this->taskLevel++; diff --git a/runtime/command_stream/tbx_command_stream_receiver_hw.h b/runtime/command_stream/tbx_command_stream_receiver_hw.h index ea7088d9b5..432629fd76 100644 --- a/runtime/command_stream/tbx_command_stream_receiver_hw.h +++ b/runtime/command_stream/tbx_command_stream_receiver_hw.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -45,24 +45,24 @@ class TbxCommandStreamReceiverHw : public CommandStreamReceiverHw { typedef typename AUB::MiContextDescriptorReg MiContextDescriptorReg; public: - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override; + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override; void makeResident(GraphicsAllocation &gfxAllocation) override; void makeCoherent(void *address, size_t length) override; // Family specific version - void submitLRCA(EngineType engineOrdinal, const MiContextDescriptorReg &contextDescriptor); - void pollForCompletion(EngineType engineOrdinal); + void submitLRCA(EngineType engineType, const MiContextDescriptorReg &contextDescriptor); + void pollForCompletion(EngineType engineType); void initGlobalMMIO(); - void initEngineMMIO(EngineType engineOrdinal); + void initEngineMMIO(EngineType engineType); static CommandStreamReceiver *create(const HardwareInfo &hwInfoIn); TbxCommandStreamReceiverHw(const HardwareInfo &hwInfoIn); ~TbxCommandStreamReceiverHw() override; - void initializeEngine(EngineType engineOrdinal); + void initializeEngine(EngineType engineType); - static const AubMemDump::LrcaHelper &getCsTraits(EngineType engineOrdinal); + static const AubMemDump::LrcaHelper &getCsTraits(EngineType engineType); struct EngineInfo { void *pLRCA; diff --git a/runtime/command_stream/tbx_command_stream_receiver_hw.inl b/runtime/command_stream/tbx_command_stream_receiver_hw.inl index dbc6c41360..c0544d037f 100644 --- a/runtime/command_stream/tbx_command_stream_receiver_hw.inl +++ b/runtime/command_stream/tbx_command_stream_receiver_hw.inl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -64,8 +64,8 @@ TbxCommandStreamReceiverHw::~TbxCommandStreamReceiverHw() { } template -const AubMemDump::LrcaHelper &TbxCommandStreamReceiverHw::getCsTraits(EngineType engineOrdinal) { - return *AUBFamilyMapper::csTraits[engineOrdinal]; +const AubMemDump::LrcaHelper &TbxCommandStreamReceiverHw::getCsTraits(EngineType engineType) { + return *AUBFamilyMapper::csTraits[engineType]; } template @@ -76,8 +76,8 @@ void TbxCommandStreamReceiverHw::initGlobalMMIO() { } template -void TbxCommandStreamReceiverHw::initEngineMMIO(EngineType engineOrdinal) { - auto mmioList = AUBFamilyMapper::perEngineMMIO[engineOrdinal]; +void TbxCommandStreamReceiverHw::initEngineMMIO(EngineType engineType) { + auto mmioList = AUBFamilyMapper::perEngineMMIO[engineType]; DEBUG_BREAK_IF(!mmioList); for (auto &mmioPair : *mmioList) { @@ -86,12 +86,12 @@ void TbxCommandStreamReceiverHw::initEngineMMIO(EngineType engineOrdi } template -void TbxCommandStreamReceiverHw::initializeEngine(EngineType engineOrdinal) { - auto mmioBase = getCsTraits(engineOrdinal).mmioBase; - auto &engineInfo = engineInfoTable[engineOrdinal]; +void TbxCommandStreamReceiverHw::initializeEngine(EngineType engineType) { + auto mmioBase = getCsTraits(engineType).mmioBase; + auto &engineInfo = engineInfoTable[engineType]; initGlobalMMIO(); - initEngineMMIO(engineOrdinal); + initEngineMMIO(engineType); // Global HW Status Page { @@ -107,7 +107,7 @@ void TbxCommandStreamReceiverHw::initializeEngine(EngineType engineOr } // Allocate the LRCA - auto csTraits = getCsTraits(engineOrdinal); + auto csTraits = getCsTraits(engineType); const size_t sizeLRCA = csTraits.sizeLRCA; const size_t alignLRCA = csTraits.alignLRCA; auto pLRCABase = alignedMalloc(sizeLRCA, alignLRCA); @@ -169,12 +169,12 @@ CommandStreamReceiver *TbxCommandStreamReceiverHw::create(const Hardw } template -FlushStamp TbxCommandStreamReceiverHw::flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) { - uint32_t mmioBase = getCsTraits(engineOrdinal).mmioBase; - auto &engineInfo = engineInfoTable[engineOrdinal]; +FlushStamp TbxCommandStreamReceiverHw::flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) { + uint32_t mmioBase = getCsTraits(engineType).mmioBase; + auto &engineInfo = engineInfoTable[engineType]; if (!engineInfo.pLRCA) { - initializeEngine(engineOrdinal); + initializeEngine(engineType); DEBUG_BREAK_IF(!engineInfo.pLRCA); } @@ -292,16 +292,16 @@ FlushStamp TbxCommandStreamReceiverHw::flush(BatchBuffer &batchBuffer contextDescriptor.sData.LogicalRingCtxAddress = ggttLRCA / 4096; contextDescriptor.sData.ContextID = 0; - submitLRCA(engineOrdinal, contextDescriptor); + submitLRCA(engineType, contextDescriptor); } - pollForCompletion(engineOrdinal); + pollForCompletion(engineType); return 0; } template -void TbxCommandStreamReceiverHw::submitLRCA(EngineType engineOrdinal, const MiContextDescriptorReg &contextDescriptor) { - auto mmioBase = getCsTraits(engineOrdinal).mmioBase; +void TbxCommandStreamReceiverHw::submitLRCA(EngineType engineType, const MiContextDescriptorReg &contextDescriptor) { + auto mmioBase = getCsTraits(engineType).mmioBase; stream.writeMMIO(mmioBase + 0x2230, 0); stream.writeMMIO(mmioBase + 0x2230, 0); stream.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[1]); @@ -309,10 +309,10 @@ void TbxCommandStreamReceiverHw::submitLRCA(EngineType engineOrdinal, } template -void TbxCommandStreamReceiverHw::pollForCompletion(EngineType engineOrdinal) { +void TbxCommandStreamReceiverHw::pollForCompletion(EngineType engineType) { typedef typename AubMemDump::CmdServicesMemTraceRegisterPoll CmdServicesMemTraceRegisterPoll; - auto mmioBase = getCsTraits(engineOrdinal).mmioBase; + auto mmioBase = getCsTraits(engineType).mmioBase; bool pollNotEqual = false; stream.registerPoll( mmioBase + 0x2234, //EXECLIST_STATUS diff --git a/runtime/device/device.cpp b/runtime/device/device.cpp index 8d72d528b4..aaa8969e2c 100644 --- a/runtime/device/device.cpp +++ b/runtime/device/device.cpp @@ -176,6 +176,10 @@ const HardwareInfo *Device::getDeviceInitHwInfo(const HardwareInfo *pHwInfoIn) { const HardwareInfo &Device::getHardwareInfo() const { return hwInfo; } +EngineType Device::getEngineType() const { + return hwInfo.capabilityTable.defaultEngineType; +} + const WorkaroundTable *Device::getWaTable() const { return hwInfo.pWaTable; } const DeviceInfo &Device::getDeviceInfo() const { diff --git a/runtime/device/device.h b/runtime/device/device.h index 915414857d..0f7f123004 100644 --- a/runtime/device/device.h +++ b/runtime/device/device.h @@ -25,6 +25,7 @@ #include "runtime/device/device_info_map.h" #include "runtime/helpers/base_object.h" #include "runtime/helpers/hw_info.h" +#include "runtime/helpers/engine_node.h" #include "runtime/os_interface/performance_counters.h" #include @@ -80,6 +81,7 @@ class Device : public BaseObject<_cl_device_id> { const DeviceInfo &getDeviceInfo() const; DeviceInfo *getMutableDeviceInfo(); MOCKABLE_VIRTUAL const WorkaroundTable *getWaTable() const; + EngineType getEngineType() const; void *getSLMWindowStartAddress(); void prepareSLMWindow(); diff --git a/runtime/gen8/hw_info_bdw.cpp b/runtime/gen8/hw_info_bdw.cpp index b076aff038..665da520e3 100644 --- a/runtime/gen8/hw_info_bdw.cpp +++ b/runtime/gen8/hw_info_bdw.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -72,7 +72,7 @@ const RuntimeCapabilityTable BDW::capabilityTable{ false, // EnableKmdNotify 30, // delayKmdNotifyMs false, // ftr64KBpages - EngineType::ENGINE_RCS // nodeOrdinal + EngineType::ENGINE_RCS // defaultEngineType }; const HardwareInfo BDW_1x2x6::hwInfo = { diff --git a/runtime/gen8/linux/drm_engine_mapper.cpp b/runtime/gen8/linux/drm_engine_mapper.cpp index a98426c073..288300bc65 100644 --- a/runtime/gen8/linux/drm_engine_mapper.cpp +++ b/runtime/gen8/linux/drm_engine_mapper.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,16 +22,9 @@ #include "hw_cmds.h" #include "runtime/os_interface/linux/drm_engine_mapper.h" +#include "runtime/os_interface/linux/drm_engine_mapper.inl" namespace OCLRT { -template <> -bool DrmEngineMapper::engineNodeMap(EngineType engineType, unsigned int &flag) { - if (engineType == EngineType::ENGINE_RCS) { - flag = I915_EXEC_RENDER; - return true; - } - return false; -} - +template class DrmEngineMapper; } // namespace OCLRT diff --git a/runtime/gen8/windows/wddm_engine_mapper.cpp b/runtime/gen8/windows/wddm_engine_mapper.cpp index 014b722086..98e25cb297 100644 --- a/runtime/gen8/windows/wddm_engine_mapper.cpp +++ b/runtime/gen8/windows/wddm_engine_mapper.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,16 +22,9 @@ #include "hw_cmds.h" #include "runtime/os_interface/windows/wddm_engine_mapper.h" +#include "runtime/os_interface/windows/wddm_engine_mapper.inl" namespace OCLRT { -template <> -bool WddmEngineMapper::engineNodeMap(EngineType engineType, GPUNODE_ORDINAL &gpuNode) { - if (engineType == EngineType::ENGINE_RCS) { - gpuNode = GPUNODE_3D; - return true; - } - return false; -} - +template class WddmEngineMapper; } // namespace OCLRT diff --git a/runtime/gen9/hw_info_bxt.cpp b/runtime/gen9/hw_info_bxt.cpp index bc559b9f2c..e84d353171 100644 --- a/runtime/gen9/hw_info_bxt.cpp +++ b/runtime/gen9/hw_info_bxt.cpp @@ -68,7 +68,7 @@ const RuntimeCapabilityTable BXT::capabilityTable{ false, // EnableKmdNotify 30, // delayKmdNotifyMs false, // ftr64KBpages - EngineType::ENGINE_RCS // nodeOrdinal + EngineType::ENGINE_RCS // defaultEngineType }; const HardwareInfo BXT_1x2x6::hwInfo = { diff --git a/runtime/gen9/hw_info_cfl.cpp b/runtime/gen9/hw_info_cfl.cpp index 1930f2c0ef..0593dae841 100644 --- a/runtime/gen9/hw_info_cfl.cpp +++ b/runtime/gen9/hw_info_cfl.cpp @@ -63,7 +63,7 @@ const RuntimeCapabilityTable CFL::capabilityTable{ false, // EnableKmdNotify 30, // delayKmdNotifyMs true, // ftr64KBpages - EngineType::ENGINE_RCS // nodeOrdinal + EngineType::ENGINE_RCS // defaultEngineType }; const HardwareInfo CFL_1x2x6::hwInfo = { diff --git a/runtime/gen9/hw_info_glk.cpp b/runtime/gen9/hw_info_glk.cpp index cec3f4aa09..8f2d570811 100644 --- a/runtime/gen9/hw_info_glk.cpp +++ b/runtime/gen9/hw_info_glk.cpp @@ -63,7 +63,7 @@ const RuntimeCapabilityTable GLK::capabilityTable{ true, // EnableKmdNotify 30, // delayKmdNotifyMs false, // ftr64KBpages - EngineType::ENGINE_RCS // nodeOrdinal + EngineType::ENGINE_RCS // defaultEngineType }; const HardwareInfo GLK_1x3x6::hwInfo = { diff --git a/runtime/gen9/hw_info_kbl.cpp b/runtime/gen9/hw_info_kbl.cpp index daa86d5fe7..9319b214e2 100644 --- a/runtime/gen9/hw_info_kbl.cpp +++ b/runtime/gen9/hw_info_kbl.cpp @@ -63,7 +63,7 @@ const RuntimeCapabilityTable KBL::capabilityTable{ false, // EnableKmdNotify 30, // delayKmdNotifyMs true, // ftr64KBpages - EngineType::ENGINE_RCS // nodeOrdinal + EngineType::ENGINE_RCS // defaultEngineType }; const HardwareInfo KBL_1x2x6::hwInfo = { diff --git a/runtime/gen9/hw_info_skl.cpp b/runtime/gen9/hw_info_skl.cpp index 3dfb3af5b1..2fcf12921d 100644 --- a/runtime/gen9/hw_info_skl.cpp +++ b/runtime/gen9/hw_info_skl.cpp @@ -71,7 +71,7 @@ const RuntimeCapabilityTable SKL::capabilityTable{ false, // EnableKmdNotify 30, // delayKmdNotifyMs true, // ftr64KBpages - EngineType::ENGINE_RCS // nodeOrdinal + EngineType::ENGINE_RCS // defaultEngineType }; const HardwareInfo SKL_1x2x6::hwInfo = { diff --git a/runtime/gen9/linux/drm_engine_mapper.cpp b/runtime/gen9/linux/drm_engine_mapper.cpp index f411b2e08d..6fb7c96005 100644 --- a/runtime/gen9/linux/drm_engine_mapper.cpp +++ b/runtime/gen9/linux/drm_engine_mapper.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,16 +22,9 @@ #include "hw_cmds.h" #include "runtime/os_interface/linux/drm_engine_mapper.h" +#include "runtime/os_interface/linux/drm_engine_mapper.inl" namespace OCLRT { -template <> -bool DrmEngineMapper::engineNodeMap(EngineType engineType, unsigned int &flag) { - if (engineType == EngineType::ENGINE_RCS) { - flag = I915_EXEC_RENDER; - return true; - } - return false; -} - +template class DrmEngineMapper; } // namespace OCLRT diff --git a/runtime/gen9/windows/wddm_engine_mapper.cpp b/runtime/gen9/windows/wddm_engine_mapper.cpp index 06d7d36f23..97ea386c35 100644 --- a/runtime/gen9/windows/wddm_engine_mapper.cpp +++ b/runtime/gen9/windows/wddm_engine_mapper.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,16 +22,9 @@ #include "hw_cmds.h" #include "runtime/os_interface/windows/wddm_engine_mapper.h" +#include "runtime/os_interface/windows/wddm_engine_mapper.inl" namespace OCLRT { -template <> -bool WddmEngineMapper::engineNodeMap(EngineType engineType, GPUNODE_ORDINAL &gpuNode) { - if (engineType == EngineType::ENGINE_RCS) { - gpuNode = GPUNODE_3D; - return true; - } - return false; -} - +template class WddmEngineMapper; } // namespace OCLRT diff --git a/runtime/helpers/completion_stamp.h b/runtime/helpers/completion_stamp.h index 6565604e7b..2c104cbddb 100644 --- a/runtime/helpers/completion_stamp.h +++ b/runtime/helpers/completion_stamp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -32,6 +32,6 @@ struct CompletionStamp { uint32_t taskLevel; FlushStamp flushStamp; uint32_t deviceOrdinal; - uint32_t engineOrdinal; + EngineType engineType; }; } // namespace OCLRT diff --git a/runtime/helpers/engine_node.h b/runtime/helpers/engine_node.h index 3e0b287db5..d57a15dfc3 100644 --- a/runtime/helpers/engine_node.h +++ b/runtime/helpers/engine_node.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -24,7 +24,7 @@ namespace OCLRT { -enum EngineType { +enum EngineType : uint32_t { ENGINE_RCS = 0, ENGINE_BCS, ENGINE_VCS, diff --git a/runtime/helpers/hw_info.h b/runtime/helpers/hw_info.h index bc10914d57..d2f80dc7bd 100644 --- a/runtime/helpers/hw_info.h +++ b/runtime/helpers/hw_info.h @@ -25,6 +25,8 @@ #include "gtsysinfo.h" #include "sku_info.h" +#include "runtime/helpers/engine_node.h" + namespace OCLRT { enum class PreemptionMode : uint32_t { @@ -64,7 +66,7 @@ struct RuntimeCapabilityTable { int64_t delayKmdNotifyMs; bool ftr64KBpages; - int32_t nodeOrdinal; + EngineType defaultEngineType; }; struct HardwareInfo { diff --git a/runtime/os_interface/linux/drm_command_stream.h b/runtime/os_interface/linux/drm_command_stream.h index 8ede45bb05..89f887ea06 100644 --- a/runtime/os_interface/linux/drm_command_stream.h +++ b/runtime/os_interface/linux/drm_command_stream.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -50,7 +50,7 @@ class DrmCommandStreamReceiver : public DeviceCommandStreamReceiver { // When drm is passed, DCSR will not free it at destruction DrmCommandStreamReceiver(const HardwareInfo &hwInfoIn, Drm *drm, gemCloseWorkerMode mode); - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override; + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override; void makeResident(GraphicsAllocation &gfxAllocation) override; void processResidency(ResidencyContainer *allocationsForResidency) override; void makeNonResident(GraphicsAllocation &gfxAllocation) override; diff --git a/runtime/os_interface/linux/drm_command_stream.inl b/runtime/os_interface/linux/drm_command_stream.inl index 2b61b141e0..b0895fb032 100644 --- a/runtime/os_interface/linux/drm_command_stream.inl +++ b/runtime/os_interface/linux/drm_command_stream.inl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -27,6 +27,7 @@ #include "runtime/mem_obj/buffer.h" #include "runtime/os_interface/linux/drm_buffer_object.h" #include "runtime/os_interface/linux/drm_command_stream.h" +#include "runtime/os_interface/linux/drm_engine_mapper.h" #include "runtime/os_interface/linux/drm_memory_manager.h" #include "runtime/os_interface/linux/drm_neo.h" #include "runtime/os_interface/linux/os_interface.h" @@ -47,8 +48,11 @@ DrmCommandStreamReceiver::DrmCommandStreamReceiver(const HardwareInfo } template -FlushStamp DrmCommandStreamReceiver::flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) { - DEBUG_BREAK_IF(engineOrdinal != EngineType::ENGINE_RCS); +FlushStamp DrmCommandStreamReceiver::flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) { + DEBUG_BREAK_IF(engineType != EngineType::ENGINE_RCS); + unsigned int engineFlag = 0xFF; + bool ret = DrmEngineMapper::engineNodeMap(engineType, engineFlag); + UNRECOVERABLE_IF(!(ret)); DrmAllocation *alloc = static_cast(batchBuffer.commandBufferAllocation); DEBUG_BREAK_IF(!alloc); @@ -71,7 +75,7 @@ FlushStamp DrmCommandStreamReceiver::flush(BatchBuffer &batchBuffer, this->residency.reserve(512); bb->exec(static_cast(alignUp(batchBuffer.usedSize - batchBuffer.startOffset, 8)), - alignedStart, I915_EXEC_RENDER | I915_EXEC_NO_RELOC, + alignedStart, engineFlag | I915_EXEC_NO_RELOC, batchBuffer.requiresCoherency, batchBuffer.low_priority); diff --git a/runtime/os_interface/linux/drm_engine_mapper.h b/runtime/os_interface/linux/drm_engine_mapper.h index eefb863659..a95a169649 100644 --- a/runtime/os_interface/linux/drm_engine_mapper.h +++ b/runtime/os_interface/linux/drm_engine_mapper.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -30,7 +30,7 @@ namespace OCLRT { -template +template class DrmEngineMapper { public: static bool engineNodeMap(EngineType engineType, unsigned int &flag); diff --git a/runtime/os_interface/linux/drm_engine_mapper.inl b/runtime/os_interface/linux/drm_engine_mapper.inl new file mode 100644 index 0000000000..5f332e66eb --- /dev/null +++ b/runtime/os_interface/linux/drm_engine_mapper.inl @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2018, Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "hw_cmds.h" +#include "runtime/os_interface/linux/drm_engine_mapper.h" + +namespace OCLRT { + +template +bool DrmEngineMapper::engineNodeMap(EngineType engineType, unsigned int &flag) { + bool ret = false; + switch (engineType) { + case EngineType::ENGINE_RCS: + flag = I915_EXEC_RENDER; + ret = true; + break; + default: + break; + } + return ret; +} +} // namespace OCLRT diff --git a/runtime/os_interface/linux/hw_info_config.cpp b/runtime/os_interface/linux/hw_info_config.cpp index 5eb2af52a0..37f9f35209 100644 --- a/runtime/os_interface/linux/hw_info_config.cpp +++ b/runtime/os_interface/linux/hw_info_config.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,6 +26,7 @@ #include "runtime/os_interface/linux/drm_neo.h" #include "runtime/os_interface/linux/hw_info_config.h" #include "runtime/os_interface/linux/os_interface.h" +#include "runtime/os_interface/debug_settings_manager.h" #include "runtime/utilities/cpu_info.h" #include @@ -166,6 +167,10 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou hwHelper.setCapabilityCoherencyFlag(const_cast(outHwInfo), platformCoherency); outHwInfo->capabilityTable.ftrSupportsCoherency = (platformCoherency && drm->peekCoherencyDisablePatchActive()); + outHwInfo->capabilityTable.defaultEngineType = DebugManager.flags.NodeOrdinal.get() == -1 + ? outHwInfo->capabilityTable.defaultEngineType + : static_cast(DebugManager.flags.NodeOrdinal.get()); + outHwInfo->capabilityTable.instrumentationEnabled = false; bool preemption = drm->hasPreemption(); diff --git a/runtime/os_interface/windows/device_factory.cpp b/runtime/os_interface/windows/device_factory.cpp index 76352676a2..ed5f0f3c35 100644 --- a/runtime/os_interface/windows/device_factory.cpp +++ b/runtime/os_interface/windows/device_factory.cpp @@ -69,16 +69,23 @@ bool DeviceFactory::getDevices(HardwareInfo **pHWInfos, size_t &numDevices) { tempHwInfos[devNum].capabilityTable.ftrSvm = adapterInfo->SkuTable.FtrSVM; HwHelper &hwHelper = HwHelper::get(adapterInfo->GfxPlatform.eRenderCoreFamily); + hwHelper.adjustDefaultEngineType(&tempHwInfos[devNum]); + tempHwInfos[devNum].capabilityTable.defaultEngineType = DebugManager.flags.NodeOrdinal.get() == -1 + ? tempHwInfos[devNum].capabilityTable.defaultEngineType + : static_cast(DebugManager.flags.NodeOrdinal.get()); + hwHelper.setCapabilityCoherencyFlag(&tempHwInfos[devNum], tempHwInfos[devNum].capabilityTable.ftrSupportsCoherency); + hwHelper.setupPreemptionRegisters(&tempHwInfos[devNum], !!adapterInfo->WaTable.WaEnablePreemptionGranularityControlByUMD); - // Instrumentation - tempHwInfos[devNum].capabilityTable.instrumentationEnabled = false; // Intentionally disable, after enabling use adapterInfo->Caps.InstrumentationIsEnabled PreemptionHelper::adjustDefaultPreemptionMode(tempHwInfos[devNum].capabilityTable, static_cast(adapterInfo->SkuTable.FtrGpGpuMidThreadLevelPreempt), static_cast(adapterInfo->SkuTable.FtrGpGpuThreadGroupLevelPreempt), static_cast(adapterInfo->SkuTable.FtrGpGpuMidBatchPreempt)); + // Instrumentation + tempHwInfos[devNum].capabilityTable.instrumentationEnabled = false; // Intentionally disable, after enabling use adapterInfo->Caps.InstrumentationIsEnabled + tempHwInfos[devNum].capabilityTable.enableKmdNotify = DebugManager.flags.OverrideEnableKmdNotify.get() >= 0 ? !!DebugManager.flags.OverrideEnableKmdNotify.get() : tempHwInfos[devNum].capabilityTable.enableKmdNotify; diff --git a/runtime/os_interface/windows/wddm_device_command_stream.h b/runtime/os_interface/windows/wddm_device_command_stream.h index 2557639a40..2fb78d0ed1 100644 --- a/runtime/os_interface/windows/wddm_device_command_stream.h +++ b/runtime/os_interface/windows/wddm_device_command_stream.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -40,7 +40,7 @@ class WddmCommandStreamReceiver : public DeviceCommandStreamReceiver WddmCommandStreamReceiver(const HardwareInfo &hwInfoIn, Wddm *wddm); virtual ~WddmCommandStreamReceiver(); - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override; + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override; void makeResident(GraphicsAllocation &gfxAllocation) override; void processResidency(ResidencyContainer *allocationsForResidency) override; void processEviction() override; diff --git a/runtime/os_interface/windows/wddm_device_command_stream.inl b/runtime/os_interface/windows/wddm_device_command_stream.inl index 72f658804d..64c34322f2 100644 --- a/runtime/os_interface/windows/wddm_device_command_stream.inl +++ b/runtime/os_interface/windows/wddm_device_command_stream.inl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -53,12 +53,8 @@ WddmCommandStreamReceiver::WddmCommandStreamReceiver(const HardwareIn if (this->wddm == nullptr) { this->wddm = Wddm::createWddm(); } - int32_t node = DebugManager.flags.NodeOrdinal.get(); - if (node == -1) { - node = hwInfoIn.capabilityTable.nodeOrdinal; - } GPUNODE_ORDINAL nodeOrdinal = GPUNODE_3D; - UNRECOVERABLE_IF(!WddmEngineMapper::engineNodeMap(static_cast(node), nodeOrdinal)); + UNRECOVERABLE_IF(!WddmEngineMapper::engineNodeMap(hwInfoIn.capabilityTable.defaultEngineType, nodeOrdinal)); this->wddm->setNode(nodeOrdinal); this->osInterface = std::unique_ptr(new OSInterface()); this->osInterface.get()->get()->setWddm(this->wddm); @@ -88,9 +84,7 @@ WddmCommandStreamReceiver::~WddmCommandStreamReceiver() { template FlushStamp WddmCommandStreamReceiver::flush(BatchBuffer &batchBuffer, - EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) { - DEBUG_BREAK_IF(engineOrdinal != EngineType::ENGINE_RCS); - + EngineType engineType, ResidencyContainer *allocationsForResidency) { void *commandStreamAddress = ptrOffset(batchBuffer.commandBufferAllocation->getUnderlyingBuffer(), batchBuffer.startOffset); bool success = true; diff --git a/runtime/os_interface/windows/wddm_engine_mapper.h b/runtime/os_interface/windows/wddm_engine_mapper.h index 97e370dce4..eb8ef71a7f 100644 --- a/runtime/os_interface/windows/wddm_engine_mapper.h +++ b/runtime/os_interface/windows/wddm_engine_mapper.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -30,7 +30,7 @@ namespace OCLRT { -template +template class WddmEngineMapper { public: static bool engineNodeMap(EngineType engineType, GPUNODE_ORDINAL &gpuNode); diff --git a/runtime/os_interface/windows/wddm_engine_mapper.inl b/runtime/os_interface/windows/wddm_engine_mapper.inl new file mode 100644 index 0000000000..47932495de --- /dev/null +++ b/runtime/os_interface/windows/wddm_engine_mapper.inl @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2018, Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "hw_cmds.h" +#include "runtime/os_interface/windows/wddm_engine_mapper.h" + +namespace OCLRT { + +template +bool WddmEngineMapper::engineNodeMap(EngineType engineType, GPUNODE_ORDINAL &gpuNode) { + bool ret = false; + switch (engineType) { + case EngineType::ENGINE_RCS: + gpuNode = GPUNODE_3D; + ret = true; + break; + default: + break; + } + return ret; +} + +} // namespace OCLRT diff --git a/unit_tests/aub_tests/command_stream/aub_command_stream_tests.cpp b/unit_tests/aub_tests/command_stream/aub_command_stream_tests.cpp index 7d0a38e85e..fa7ac17f04 100644 --- a/unit_tests/aub_tests/command_stream/aub_command_stream_tests.cpp +++ b/unit_tests/aub_tests/command_stream/aub_command_stream_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -52,7 +52,7 @@ struct AUBFixture : public AUBCommandStreamFixture, } template - void testNoopIdXcs(EngineType engineOrdinal) { + void testNoopIdXcs(EngineType engineType) { typedef typename FamilyType::MI_NOOP MI_NOOP; auto pCmd = (MI_NOOP *)pCS->getSpace(sizeof(MI_NOOP) * 4); @@ -70,9 +70,9 @@ struct AUBFixture : public AUBCommandStreamFixture, CommandStreamReceiverHw::alignToCacheLine(*pCS); BatchBuffer batchBuffer{pCS->getGraphicsAllocation(), 0, false, false, pCS->getUsed(), pCS}; ResidencyContainer allocationsForResidency; - pCommandStreamReceiver->flush(batchBuffer, engineOrdinal, &allocationsForResidency); + pCommandStreamReceiver->flush(batchBuffer, engineType, &allocationsForResidency); - auto mmioBase = AUBCommandStreamReceiverHw::getCsTraits(engineOrdinal).mmioBase; + auto mmioBase = AUBCommandStreamReceiverHw::getCsTraits(engineType).mmioBase; AUBCommandStreamFixture::expectMMIO(mmioBase + 0x2094, noopId); } }; diff --git a/unit_tests/aub_tests/command_stream/aub_mem_dump_tests.h b/unit_tests/aub_tests/command_stream/aub_mem_dump_tests.h index e670ba9f25..64654d88d5 100644 --- a/unit_tests/aub_tests/command_stream/aub_mem_dump_tests.h +++ b/unit_tests/aub_tests/command_stream/aub_mem_dump_tests.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2017, Intel Corporation +* Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -42,9 +42,9 @@ static std::string getAubFileName(const OCLRT::Device *pDevice, const std::strin } template -void setupAUB(const OCLRT::Device *pDevice, OCLRT::EngineType engineOrdinal) { +void setupAUB(const OCLRT::Device *pDevice, OCLRT::EngineType engineType) { typedef typename OCLRT::AUBFamilyMapper::AUB AUB; - const auto &csTraits = OCLRT::AUBCommandStreamReceiverHw::getCsTraits(engineOrdinal); + const auto &csTraits = OCLRT::AUBCommandStreamReceiverHw::getCsTraits(engineType); auto mmioBase = csTraits.mmioBase; uint64_t physAddress = 0x10000; diff --git a/unit_tests/command_queue/drm_requirements_tests.cpp b/unit_tests/command_queue/drm_requirements_tests.cpp index 87a3935756..3182fc5a12 100644 --- a/unit_tests/command_queue/drm_requirements_tests.cpp +++ b/unit_tests/command_queue/drm_requirements_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -40,7 +40,7 @@ class CommandStreamReceiverDrmMock : public UltCommandStreamReceiver std::vector toFree; // pointers to be freed on destruction public: - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override { + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override { EXPECT_NE(nullptr, batchBuffer.commandBufferAllocation->getUnderlyingBuffer()); toFree.push_back(batchBuffer.commandBufferAllocation); diff --git a/unit_tests/command_queue/enqueue_fill_buffer_tests.cpp b/unit_tests/command_queue/enqueue_fill_buffer_tests.cpp index 4e25538fd8..32ad8f2c94 100644 --- a/unit_tests/command_queue/enqueue_fill_buffer_tests.cpp +++ b/unit_tests/command_queue/enqueue_fill_buffer_tests.cpp @@ -56,11 +56,11 @@ HWTEST_F(EnqueueFillBufferCmdTests, bumpsTaskLevel) { HWTEST_F(EnqueueFillBufferCmdTests, setsBufferCompletionStamp) { enqueueFillBuffer(); - + auto deviceEngineType = pDevice->getEngineType(); auto &commandStreamReceiver = pDevice->getCommandStreamReceiver(); EXPECT_EQ(commandStreamReceiver.peekTaskCount(), buffer->getCompletionStamp().taskCount); EXPECT_EQ(0u, buffer->getCompletionStamp().deviceOrdinal); - EXPECT_EQ(EngineType::ENGINE_RCS, buffer->getCompletionStamp().engineOrdinal); + EXPECT_EQ(deviceEngineType, buffer->getCompletionStamp().engineType); } HWTEST_F(EnqueueFillBufferCmdTests, addsCommands) { diff --git a/unit_tests/command_queue/enqueue_thread_tests.cpp b/unit_tests/command_queue/enqueue_thread_tests.cpp index daacec2c37..1f4c40aae5 100644 --- a/unit_tests/command_queue/enqueue_thread_tests.cpp +++ b/unit_tests/command_queue/enqueue_thread_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -50,7 +50,7 @@ class CommandStreamReceiverMock : public UltCommandStreamReceiver { this->pDevice = pDevice; } - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override { + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override { EXPECT_NE(nullptr, batchBuffer.commandBufferAllocation->getUnderlyingBuffer()); toFree.push_back(batchBuffer.commandBufferAllocation); diff --git a/unit_tests/command_stream/aub_command_stream_receiver_tests.cpp b/unit_tests/command_stream/aub_command_stream_receiver_tests.cpp index 1f244e095c..9fba1953bb 100644 --- a/unit_tests/command_stream/aub_command_stream_receiver_tests.cpp +++ b/unit_tests/command_stream/aub_command_stream_receiver_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -125,20 +125,20 @@ HWTEST_F(AubCommandStreamReceiverTests, flushShouldLeaveProperRingTailAlignment) ASSERT_NE(nullptr, commandBuffer); LinearStream cs(commandBuffer); - auto engineOrdinal = OCLRT::ENGINE_RCS; + auto engineType = OCLRT::ENGINE_RCS; auto ringTailAlignment = sizeof(uint64_t); BatchBuffer batchBuffer{cs.getGraphicsAllocation(), 0, false, false, cs.getUsed(), &cs}; // First flush typically includes a preamble and chain to command buffer csr->overrideDispatchPolicy(CommandStreamReceiver::DispatchMode::ImmediateDispatch); - csr->flush(batchBuffer, engineOrdinal, nullptr); - EXPECT_EQ(0ull, csr->engineInfoTable[engineOrdinal].tailRingBuffer % ringTailAlignment); + csr->flush(batchBuffer, engineType, nullptr); + EXPECT_EQ(0ull, csr->engineInfoTable[engineType].tailRingBuffer % ringTailAlignment); // Second flush should just submit command buffer cs.getSpace(sizeof(uint64_t)); - csr->flush(batchBuffer, engineOrdinal, nullptr); - EXPECT_EQ(0ull, csr->engineInfoTable[engineOrdinal].tailRingBuffer % ringTailAlignment); + csr->flush(batchBuffer, engineType, nullptr); + EXPECT_EQ(0ull, csr->engineInfoTable[engineType].tailRingBuffer % ringTailAlignment); mm->freeGraphicsMemory(commandBuffer); delete csr; @@ -154,12 +154,12 @@ HWTEST_F(AubCommandStreamReceiverTests, flushShouldCallMakeResidentOnCommandBuff LinearStream cs(commandBuffer); BatchBuffer batchBuffer{cs.getGraphicsAllocation(), 0, false, false, cs.getUsed(), &cs}; - auto engineOrdinal = OCLRT::ENGINE_RCS; + auto engineType = OCLRT::ENGINE_RCS; EXPECT_EQ(ObjectNotResident, commandBuffer->residencyTaskCount); csr->overrideDispatchPolicy(CommandStreamReceiver::DispatchMode::ImmediateDispatch); - csr->flush(batchBuffer, engineOrdinal, nullptr); + csr->flush(batchBuffer, engineType, nullptr); EXPECT_NE(ObjectNotResident, commandBuffer->residencyTaskCount); EXPECT_EQ((int)csr->peekTaskCount(), commandBuffer->residencyTaskCount); @@ -182,14 +182,14 @@ HWTEST_F(AubCommandStreamReceiverTests, flushShouldCallMakeResidentOnResidencyAl LinearStream cs(commandBuffer); BatchBuffer batchBuffer{cs.getGraphicsAllocation(), 0, false, false, cs.getUsed(), &cs}; - auto engineOrdinal = OCLRT::ENGINE_RCS; + auto engineType = OCLRT::ENGINE_RCS; ResidencyContainer allocationsForResidency = {gfxAllocation}; EXPECT_EQ(ObjectNotResident, gfxAllocation->residencyTaskCount); EXPECT_EQ(ObjectNotResident, commandBuffer->residencyTaskCount); csr->overrideDispatchPolicy(CommandStreamReceiver::DispatchMode::BatchedDispatch); - csr->flush(batchBuffer, engineOrdinal, &allocationsForResidency); + csr->flush(batchBuffer, engineType, &allocationsForResidency); EXPECT_NE(ObjectNotResident, gfxAllocation->residencyTaskCount); EXPECT_EQ((int)csr->peekTaskCount(), gfxAllocation->residencyTaskCount); diff --git a/unit_tests/command_stream/command_stream_receiver_hw_tests.cpp b/unit_tests/command_stream/command_stream_receiver_hw_tests.cpp index f8fc783c03..6c8348ea06 100644 --- a/unit_tests/command_stream/command_stream_receiver_hw_tests.cpp +++ b/unit_tests/command_stream/command_stream_receiver_hw_tests.cpp @@ -371,13 +371,14 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, completionStampValid) { HWTEST_F(CommandStreamReceiverFlushTaskTests, completionStamp) { auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver(); + auto deviceEngineType = pDevice->getEngineType(); auto completionStamp = flushTask(commandStreamReceiver); EXPECT_EQ(1u, completionStamp.taskCount); EXPECT_EQ(taskLevel, completionStamp.taskLevel); EXPECT_EQ(commandStreamReceiver.flushStamp->peekStamp(), completionStamp.flushStamp); EXPECT_EQ(0u, completionStamp.deviceOrdinal); - EXPECT_EQ(EngineType::ENGINE_RCS, completionStamp.engineOrdinal); + EXPECT_EQ(deviceEngineType, completionStamp.engineType); } HWTEST_F(CommandStreamReceiverFlushTaskTests, stateBaseAddressTracking) { @@ -659,7 +660,7 @@ struct CommandStreamReceiverHwLog : public UltCommandStreamReceiver flushCount(0) { } - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override { + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override { ++flushCount; return 0; } @@ -940,6 +941,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, FlushTaskWithTaskCSPassedAsCommand commandStreamReceiver.setMemoryManager(pDevice->getMemoryManager()); auto &commandStreamTask = commandQueue.getCS(); + auto deviceEngineType = pDevice->getEngineType(); DispatchFlags dispatchFlags; @@ -958,7 +960,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, FlushTaskWithTaskCSPassedAsCommand EXPECT_EQ(commandStreamReceiver.peekTaskCount(), cs.taskCount); EXPECT_EQ(commandStreamReceiver.peekTaskLevel(), cs.taskLevel); EXPECT_EQ(0u, cs.deviceOrdinal); - EXPECT_EQ(EngineType::ENGINE_RCS, cs.engineOrdinal); + EXPECT_EQ(deviceEngineType, cs.engineType); } HWTEST_F(CommandStreamReceiverFlushTaskTests, TrackSentTagsWhenEmptyQueue) { diff --git a/unit_tests/device/device_tests.cpp b/unit_tests/device/device_tests.cpp index 2eccc985f6..9bcb71b5eb 100644 --- a/unit_tests/device/device_tests.cpp +++ b/unit_tests/device/device_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,6 +22,7 @@ #include "runtime/helpers/options.h" #include "runtime/indirect_heap/indirect_heap.h" +#include "unit_tests/helpers/debug_manager_state_restore.h" #include "unit_tests/libult/ult_command_stream_receiver.h" #include "unit_tests/fixtures/device_fixture.h" #include "unit_tests/fixtures/memory_management_fixture.h" @@ -102,4 +103,13 @@ TEST_F(DeviceTest, retainAndRelease) { TEST_F(DeviceTest, givenMemoryManagerWhenDeviceIsCreatedThenItHasAccessToDevice) { auto memoryManager = pDevice->getMemoryManager(); EXPECT_EQ(memoryManager->device, pDevice); -} \ No newline at end of file +} + +TEST_F(DeviceTest, getEngineTypeDefault) { + auto pTestDevice = std::unique_ptr(createWithUsDeviceId(0)); + + EngineType actualEngineType = pDevice->getEngineType(); + EngineType defaultEngineType = hwInfoHelper.capabilityTable.defaultEngineType; + + EXPECT_EQ(defaultEngineType, actualEngineType); +} diff --git a/unit_tests/gen8/hw_helper_tests.cpp b/unit_tests/gen8/hw_helper_tests.cpp index dce773d305..3a2eaf86e5 100644 --- a/unit_tests/gen8/hw_helper_tests.cpp +++ b/unit_tests/gen8/hw_helper_tests.cpp @@ -51,8 +51,8 @@ GEN8TEST_F(HwHelperTestBdw, setupPreemptionRegisters) { } GEN8TEST_F(HwHelperTestBdw, adjustDefaultEngineType) { - auto engineType = hwInfo.capabilityTable.nodeOrdinal; + auto engineType = hwInfo.capabilityTable.defaultEngineType; auto &helper = HwHelper::get(renderCoreFamily); helper.adjustDefaultEngineType(&hwInfo); - EXPECT_EQ(engineType, hwInfo.capabilityTable.nodeOrdinal); + EXPECT_EQ(engineType, hwInfo.capabilityTable.defaultEngineType); } diff --git a/unit_tests/gen9/hw_helper_tests.cpp b/unit_tests/gen9/hw_helper_tests.cpp index 50242bddb6..1cfc9c6119 100644 --- a/unit_tests/gen9/hw_helper_tests.cpp +++ b/unit_tests/gen9/hw_helper_tests.cpp @@ -52,8 +52,8 @@ GEN9TEST_F(HwHelperTestSkl, setupPreemptionRegisters) { } GEN9TEST_F(HwHelperTestSkl, adjustDefaultEngineType) { - auto engineType = hwInfo.capabilityTable.nodeOrdinal; + auto engineType = hwInfo.capabilityTable.defaultEngineType; auto &helper = HwHelper::get(renderCoreFamily); helper.adjustDefaultEngineType(&hwInfo); - EXPECT_EQ(engineType, hwInfo.capabilityTable.nodeOrdinal); + EXPECT_EQ(engineType, hwInfo.capabilityTable.defaultEngineType); } diff --git a/unit_tests/kernel/kernel_tests.cpp b/unit_tests/kernel/kernel_tests.cpp index 6e1ae810f9..86324a49da 100644 --- a/unit_tests/kernel/kernel_tests.cpp +++ b/unit_tests/kernel/kernel_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -435,7 +435,7 @@ class CommandStreamReceiverMock : public CommandStreamReceiver { CommandStreamReceiver::makeNonResident(graphicsAllocation); } - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override { + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override { return flushStamp->peekStamp(); } diff --git a/unit_tests/mem_obj/buffer_tests.cpp b/unit_tests/mem_obj/buffer_tests.cpp index 1b467c0668..be978faf91 100644 --- a/unit_tests/mem_obj/buffer_tests.cpp +++ b/unit_tests/mem_obj/buffer_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -135,18 +135,18 @@ TEST_P(NoHostPtr, completionStamp) { EXPECT_EQ(0u, buffer->getCompletionStamp().taskCount); EXPECT_EQ(expectedFlushstamp, buffer->getCompletionStamp().flushStamp); EXPECT_EQ(0u, buffer->getCompletionStamp().deviceOrdinal); - EXPECT_EQ(0u, buffer->getCompletionStamp().engineOrdinal); + EXPECT_EQ(0u, buffer->getCompletionStamp().engineType); CompletionStamp completionStamp; completionStamp.taskCount = 42; completionStamp.deviceOrdinal = 43; - completionStamp.engineOrdinal = 44; + completionStamp.engineType = EngineType::ENGINE_RCS; completionStamp.flushStamp = 5; buffer->setCompletionStamp(completionStamp, nullptr, nullptr); EXPECT_EQ(completionStamp.taskCount, buffer->getCompletionStamp().taskCount); EXPECT_EQ(completionStamp.flushStamp, buffer->getCompletionStamp().flushStamp); EXPECT_EQ(completionStamp.deviceOrdinal, buffer->getCompletionStamp().deviceOrdinal); - EXPECT_EQ(completionStamp.engineOrdinal, buffer->getCompletionStamp().engineOrdinal); + EXPECT_EQ(completionStamp.engineType, buffer->getCompletionStamp().engineType); delete buffer; } diff --git a/unit_tests/mem_obj/image_tests.cpp b/unit_tests/mem_obj/image_tests.cpp index 5e36932baf..2553cc3d24 100644 --- a/unit_tests/mem_obj/image_tests.cpp +++ b/unit_tests/mem_obj/image_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -456,18 +456,18 @@ TEST_P(CreateImageNoHostPtr, completionStamp) { EXPECT_EQ(0u, image->getCompletionStamp().taskCount); EXPECT_EQ(expectedFlushStamp, image->getCompletionStamp().flushStamp); EXPECT_EQ(0u, image->getCompletionStamp().deviceOrdinal); - EXPECT_EQ(0u, image->getCompletionStamp().engineOrdinal); + EXPECT_EQ(0u, image->getCompletionStamp().engineType); CompletionStamp completionStamp; completionStamp.taskCount = 42; completionStamp.deviceOrdinal = 43; - completionStamp.engineOrdinal = 44; + completionStamp.engineType = EngineType::ENGINE_RCS; completionStamp.flushStamp = 5; image->setCompletionStamp(completionStamp, nullptr, nullptr); EXPECT_EQ(completionStamp.taskCount, image->getCompletionStamp().taskCount); EXPECT_EQ(completionStamp.flushStamp, image->getCompletionStamp().flushStamp); EXPECT_EQ(completionStamp.deviceOrdinal, image->getCompletionStamp().deviceOrdinal); - EXPECT_EQ(completionStamp.engineOrdinal, image->getCompletionStamp().engineOrdinal); + EXPECT_EQ(completionStamp.engineType, image->getCompletionStamp().engineType); delete image; } diff --git a/unit_tests/mocks/mock_csr.cpp b/unit_tests/mocks/mock_csr.cpp index 7ab63556a9..9de7522714 100644 --- a/unit_tests/mocks/mock_csr.cpp +++ b/unit_tests/mocks/mock_csr.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2017, Intel Corporation +* Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -23,7 +23,7 @@ #include "unit_tests/mocks/mock_csr.h" #include "runtime/os_interface/os_interface.h" -FlushStamp MockCommandStreamReceiver::flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) { +FlushStamp MockCommandStreamReceiver::flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) { FlushStamp stamp = 0; return stamp; } @@ -38,7 +38,7 @@ CompletionStamp MockCommandStreamReceiver::flushTask( uint32_t taskLevel, DispatchFlags &dispatchFlags) { ++taskCount; - CompletionStamp stamp = {taskCount, taskLevel, flushStamp->peekStamp(), 0, 0}; + CompletionStamp stamp = {taskCount, taskLevel, flushStamp->peekStamp(), 0, EngineType::ENGINE_RCS}; return stamp; } diff --git a/unit_tests/mocks/mock_csr.h b/unit_tests/mocks/mock_csr.h index 739a74d865..024411053e 100644 --- a/unit_tests/mocks/mock_csr.h +++ b/unit_tests/mocks/mock_csr.h @@ -104,7 +104,7 @@ class MockCsr : public MockCsrBase { MockCsr(int32_t &execStamp) : BaseClass(execStamp) { } - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override { + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override { return 0; } @@ -166,7 +166,7 @@ struct MockCsrHw2 : public CommandStreamReceiverHw { bool peekMediaVfeStateDirty() const { return mediaVfeStateDirty; } - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override { flushCalledCount++; recordedCommandBuffer.batchBuffer = batchBuffer; @@ -204,7 +204,7 @@ class MockCommandStreamReceiver : public CommandStreamReceiver { ~MockCommandStreamReceiver() { } - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override; + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override; CompletionStamp flushTask( LinearStream &commandStream, diff --git a/unit_tests/os_interface/device_factory_tests.cpp b/unit_tests/os_interface/device_factory_tests.cpp index e54aa921aa..41f3254423 100644 --- a/unit_tests/os_interface/device_factory_tests.cpp +++ b/unit_tests/os_interface/device_factory_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -116,3 +116,19 @@ TEST_F(DeviceFactoryTest, overrideKmdNotifySettings) { DeviceFactory::releaseDevices(); } + +TEST_F(DeviceFactoryTest, getEngineTypeDebugOverride) { + DebugManagerStateRestore dbgRestorer; + int32_t debugEngineType = 2; + DebugManager.flags.NodeOrdinal.set(debugEngineType); + HardwareInfo *hwInfoOverriden = nullptr; + size_t numDevices = 0; + + bool success = DeviceFactory::getDevices(&hwInfoOverriden, numDevices); + ASSERT_TRUE(success); + ASSERT_NE(nullptr, hwInfoOverriden); + int32_t actualEngineType = static_cast(hwInfoOverriden->capabilityTable.defaultEngineType); + EXPECT_EQ(debugEngineType, actualEngineType); + + DeviceFactory::releaseDevices(); +} diff --git a/unit_tests/os_interface/linux/drm_command_stream_tests.cpp b/unit_tests/os_interface/linux/drm_command_stream_tests.cpp index 9d05427ccf..535db3be87 100644 --- a/unit_tests/os_interface/linux/drm_command_stream_tests.cpp +++ b/unit_tests/os_interface/linux/drm_command_stream_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, Intel Corporation + * Copyright (c) 2017 - 2018, Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -510,7 +510,7 @@ struct DrmCsrVfeTests : ::testing::Test { using CommandStreamReceiver::commandStream; MyCsr() : DrmCommandStreamReceiver(*platformDevices[0], nullptr, gemCloseWorkerMode::gemCloseWorkerConsumingCommandBuffers) {} - FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineOrdinal, ResidencyContainer *allocationsForResidency) override { + FlushStamp flush(BatchBuffer &batchBuffer, EngineType engineType, ResidencyContainer *allocationsForResidency) override { return (FlushStamp)0; } bool peekDefaultMediaVfeStateDirty() {