Make sure that TBX requests 1 as preferred tag pool size.

Change-Id: I951117122b3e78cf40d413ce1899cd304f338ef6
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
This commit is contained in:
Mrozek, Michal
2019-04-16 15:07:27 +02:00
committed by sys_ocldev
parent 745c20c78a
commit 6223cd32cb
3 changed files with 6 additions and 2 deletions

View File

@@ -103,8 +103,6 @@ class AUBCommandStreamReceiverHw : public CommandStreamReceiverSimulatedHw<GfxFa
int getAddressSpaceFromPTEBits(uint64_t entryBits) const;
size_t getPreferredTagPoolSize() const override { return 1; }
protected:
constexpr static uint32_t getMaskAndValueForPollForCompletion();

View File

@@ -54,6 +54,8 @@ class CommandStreamReceiverSimulatedCommonHw : public CommandStreamReceiverHw<Gf
virtual void writeMemory(uint64_t gpuAddress, void *cpuAddress, size_t size, uint32_t memoryBank, uint64_t entryBits) = 0;
virtual void writeMemoryWithAubManager(GraphicsAllocation &graphicsAllocation) = 0;
size_t getPreferredTagPoolSize() const override { return 1; }
aub_stream::AubManager *aubManager = nullptr;
std::unique_ptr<HardwareContextController> hardwareContextController;