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add pipeline select hw properties support flags
Related-To: NEO-5019 Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
This commit is contained in:
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Compute-Runtime-Automation
parent
3ec0ceb2bf
commit
647661e701
@@ -31,4 +31,12 @@ std::vector<StreamProperty *> getAllFrontEndProperties(FrontEndProperties &prope
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return allProperties;
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}
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std::vector<StreamProperty *> getAllPipelineSelectProperties(PipelineSelectProperties &properties) {
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std::vector<StreamProperty *> allProperties;
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allProperties.push_back(&properties.modeSelected);
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allProperties.push_back(&properties.mediaSamplerDopClockGate);
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allProperties.push_back(&properties.systolicMode);
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return allProperties;
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}
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} // namespace NEO
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@@ -22,6 +22,11 @@ struct MockFrontEndProperties : public FrontEndProperties {
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using FrontEndProperties::propertiesSupportLoaded;
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};
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struct MockPipelineSelectProperties : public PipelineSelectProperties {
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using PipelineSelectProperties::pipelineSelectPropertiesSupport;
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using PipelineSelectProperties::propertiesSupportLoaded;
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};
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TEST(StreamPropertiesTests, whenPropertyValueIsChangedThenProperStateIsSet) {
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NEO::StreamProperty streamProperty;
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@@ -191,13 +196,17 @@ void verifyIsDirty() {
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}
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TEST(StreamPropertiesTests, givenVariousStatesOfStateComputeModePropertiesWhenIsDirtyIsQueriedThenCorrectValueIsReturned) {
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verifyIsDirty<StateComputeModeProperties, &getAllStateComputeModeProperties>();
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verifyIsDirty<StateComputeModeProperties, getAllStateComputeModeProperties>();
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}
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TEST(StreamPropertiesTests, givenVariousStatesOfFrontEndPropertiesWhenIsDirtyIsQueriedThenCorrectValueIsReturned) {
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verifyIsDirty<FrontEndProperties, getAllFrontEndProperties>();
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}
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TEST(StreamPropertiesTests, givenVariousStatesOfPipelineSelectPropertiesWhenIsDirtyIsQueriedThenCorrectValueIsReturned) {
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verifyIsDirty<PipelineSelectProperties, getAllPipelineSelectProperties>();
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}
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template <typename PropertiesT, getAllPropertiesFunctionPtr<PropertiesT> getAllProperties>
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void verifySettingPropertiesFromOtherStruct() {
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PropertiesT propertiesDestination;
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@@ -242,6 +251,10 @@ TEST(StreamPropertiesTests, givenOtherFrontEndPropertiesStructWhenSetPropertiesI
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verifySettingPropertiesFromOtherStruct<FrontEndProperties, getAllFrontEndProperties>();
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}
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TEST(StreamPropertiesTests, givenOtherPipelineSelectPropertiesStructWhenSetPropertiesIsCalledThenCorrectValuesAreSet) {
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verifySettingPropertiesFromOtherStruct<PipelineSelectProperties, getAllPipelineSelectProperties>();
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}
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TEST(StreamPropertiesTests, givenSingleDispatchCcsFrontEndPropertyWhenSettingPropertyAndCheckIfSupportedThenExpectCorrectState) {
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FrontEndPropertiesSupport fePropertiesSupport{};
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auto &hwInfoConfig = *HwInfoConfig::get(defaultHwInfo->platform.eProductFamily);
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@@ -269,3 +282,56 @@ TEST(StreamPropertiesTests, givenSingleDispatchCcsFrontEndPropertyWhenSettingPro
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EXPECT_TRUE(feProperties.singleSliceDispatchCcsMode.isDirty);
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EXPECT_EQ(engineInstancedDevice, feProperties.singleSliceDispatchCcsMode.value);
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}
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TEST(StreamPropertiesTests, whenSettingPipelineSelectPropertiesThenCorrectValueIsSet) {
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StreamProperties properties;
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PipelineSelectPropertiesSupport pipelineSelectPropertiesSupport = {};
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auto hwInfoConfig = HwInfoConfig::get(defaultHwInfo->platform.eProductFamily);
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hwInfoConfig->fillPipelineSelectPropertiesSupportStructure(pipelineSelectPropertiesSupport, *defaultHwInfo);
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for (auto modeSelected : ::testing::Bool()) {
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for (auto mediaSamplerDopClockGate : ::testing::Bool()) {
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for (auto systolicMode : ::testing::Bool()) {
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properties.pipelineSelect.setProperties(modeSelected, mediaSamplerDopClockGate, systolicMode, *defaultHwInfo);
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if (pipelineSelectPropertiesSupport.modeSelected) {
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EXPECT_EQ(modeSelected, properties.pipelineSelect.modeSelected.value);
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} else {
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EXPECT_EQ(-1, properties.pipelineSelect.modeSelected.value);
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}
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if (pipelineSelectPropertiesSupport.mediaSamplerDopClockGate) {
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EXPECT_EQ(mediaSamplerDopClockGate, properties.pipelineSelect.mediaSamplerDopClockGate.value);
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} else {
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EXPECT_EQ(-1, properties.pipelineSelect.mediaSamplerDopClockGate.value);
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}
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if (pipelineSelectPropertiesSupport.systolicMode) {
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EXPECT_EQ(systolicMode, properties.pipelineSelect.systolicMode.value);
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} else {
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EXPECT_EQ(-1, properties.pipelineSelect.systolicMode.value);
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}
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}
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}
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}
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}
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TEST(StreamPropertiesTests, givenModeSelectPipelineSelectPropertyNotSupportedWhenSettingPropertyAndCheckIfDirtyThenExpectCleanState) {
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MockPipelineSelectProperties pipeProperties{};
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pipeProperties.propertiesSupportLoaded = true;
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pipeProperties.pipelineSelectPropertiesSupport.modeSelected = false;
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pipeProperties.pipelineSelectPropertiesSupport.mediaSamplerDopClockGate = true;
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pipeProperties.pipelineSelectPropertiesSupport.systolicMode = true;
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constexpr bool constState = false;
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bool changingState = false;
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pipeProperties.setProperties(changingState, constState, constState, *defaultHwInfo);
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// expect dirty as media and systolic changes from initial registered
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EXPECT_TRUE(pipeProperties.isDirty());
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changingState = !changingState;
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pipeProperties.setProperties(changingState, constState, constState, *defaultHwInfo);
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// expect clean as changed modeSelected is not supported
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EXPECT_FALSE(pipeProperties.isDirty());
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2021 Intel Corporation
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* Copyright (C) 2021-2022 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -12,10 +12,12 @@
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namespace NEO {
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struct FrontEndProperties;
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struct PipelineSelectProperties;
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struct StateComputeModeProperties;
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struct StreamProperty;
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std::vector<StreamProperty *> getAllStateComputeModeProperties(StateComputeModeProperties &properties);
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std::vector<StreamProperty *> getAllFrontEndProperties(FrontEndProperties &properties);
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std::vector<StreamProperty *> getAllPipelineSelectProperties(PipelineSelectProperties &properties);
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} // namespace NEO
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