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Explicitly set dcFlushEnable value

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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
This commit is contained in:
Filip Hazubski
2021-12-20 21:37:45 +00:00
committed by Compute-Runtime-Automation
parent 2efcf1f62b
commit 6d439f88bb
59 changed files with 206 additions and 177 deletions
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53
level_zero/core/source/cmdlist/cmdlist_hw.inl
View File

@@ -326,10 +326,7 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendEventReset(ze_event_hand
Event::STATE_CLEARED, args);
} else {
NEO::PipeControlArgs args;
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
args.dcFlushEnable = !!event->signalScope;
}
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(event->signalScope);
auto &hwInfo = neoDevice->getHardwareInfo();
size_t estimateSize = NEO::MemorySynchronizationCommands<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(hwInfo) * packetsToReset;
if (this->partitionCount > 1) {
@@ -625,7 +622,8 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendImageCopyToMemory(void *
}
if (allocationStruct.needsFlush) {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
}
@@ -1038,9 +1036,10 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendPageFaultCopy(NEO::Graph
isStateless);
}
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true)) {
if (flushHost) {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
}
}
@@ -1158,14 +1157,15 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendMemoryCopy(void *dstptr,
appendEventForProfilingAllWalkers(hSignalEvent, false);
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true)) {
auto event = Event::fromHandle(hSignalEvent);
if (event) {
dstAllocationStruct.needsFlush &= !event->signalScope;
}
if (dstAllocationStruct.needsFlush && !isCopyOnly()) {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
}
}
@@ -1252,14 +1252,15 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendMemoryCopyRegion(void *d
return result;
}
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true)) {
auto event = Event::fromHandle(hSignalEvent);
if (event) {
dstAllocationStruct.needsFlush &= !event->signalScope;
}
if (dstAllocationStruct.needsFlush && !isCopyOnly()) {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
}
}
@@ -1603,14 +1604,15 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendMemoryFill(void *ptr,
appendEventForProfilingAllWalkers(hSignalEvent, false);
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true)) {
auto event = Event::fromHandle(hSignalEvent);
if (event) {
hostPointerNeedsFlush &= !event->signalScope;
}
if (hostPointerNeedsFlush) {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
}
}
@@ -1696,7 +1698,7 @@ void CommandListCoreFamily<gfxCoreFamily>::appendSignalEventPostWalker(ze_event_
auto &hwInfo = commandContainer.getDevice()->getHardwareInfo();
increaseCommandStreamSpace(NEO::MemorySynchronizationCommands<GfxFamily>::getSizeForPipeControlWithPostSyncOperation(hwInfo));
NEO::PipeControlArgs args;
args.dcFlushEnable = !!event->signalScope;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(event->signalScope);
if (this->partitionCount > 1) {
args.workloadPartitionOffset = true;
event->setPacketsInUse(this->partitionCount);
@@ -1822,7 +1824,6 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendSignalEvent(ze_event_han
using POST_SYNC_OPERATION = typename GfxFamily::PIPE_CONTROL::POST_SYNC_OPERATION;
using GfxFamily = typename NEO::GfxFamilyMapper<gfxCoreFamily>::GfxFamily;
auto event = Event::fromHandle(hEvent);
bool applyScope = false;
commandContainer.addToResidencyContainer(&event->getAllocation(this->device));
uint64_t baseAddr = event->getGpuAddress(this->device);
@@ -1848,10 +1849,8 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendSignalEvent(ze_event_han
NEO::EncodeMiFlushDW<GfxFamily>::programMiFlushDw(*commandContainer.getCommandStream(), ptrOffset(baseAddr, eventSignalOffset), Event::STATE_SIGNALED, args);
} else {
NEO::PipeControlArgs args;
applyScope = !!event->signalScope;
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
args.dcFlushEnable = applyScope;
}
bool applyScope = event->signalScope;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(applyScope);
if (this->partitionCount > 1) {
args.workloadPartitionOffset = true;
event->setPacketsInUse(this->partitionCount);
@@ -1912,7 +1911,7 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendWaitOnEvents(uint32_t nu
constexpr uint32_t eventStateClear = Event::State::STATE_CLEARED;
bool dcFlushRequired = false;
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true)) {
for (uint32_t i = 0; i < numEvents; i++) {
auto event = Event::fromHandle(phEvent[i]);
dcFlushRequired |= !!event->waitScope;
@@ -1941,7 +1940,8 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendWaitOnEvents(uint32_t nu
NEO::MiFlushArgs args;
NEO::EncodeMiFlushDW<GfxFamily>::programMiFlushDw(*commandContainer.getCommandStream(), 0, 0, args);
} else {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
}
}
@@ -2037,10 +2037,8 @@ void CommandListCoreFamily<gfxCoreFamily>::appendEventForProfiling(ze_event_hand
if (beforeWalker) {
appendWriteKernelTimestamp(hEvent, beforeWalker, true);
} else {
NEO::PipeControlArgs args = {};
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
args.dcFlushEnable = (!event->signalScope) ? false : true;
}
NEO::PipeControlArgs args;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(event->signalScope);
NEO::MemorySynchronizationCommands<GfxFamily>::setPostSyncExtraProperties(args,
commandContainer.getDevice()->getHardwareInfo());
@@ -2080,7 +2078,7 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendWriteGlobalTimestamp(
0,
args);
} else {
NEO::PipeControlArgs args(false);
NEO::PipeControlArgs args;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControlWithPostSync(
*commandContainer.getCommandStream(),
@@ -2318,7 +2316,8 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::setGlobalWorkSizeIndirect(NEO:
template <GFXCORE_FAMILY gfxCoreFamily>
void CommandListCoreFamily<gfxCoreFamily>::programStateBaseAddress(NEO::CommandContainer &container, bool genericMediaStateClearRequired) {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
args.hdcPipelineFlush = true;
args.textureCacheInvalidationEnable = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);

10
level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl
View File

@@ -284,9 +284,7 @@ ze_result_t CommandListCoreFamilyImmediate<gfxCoreFamily>::appendSignalEvent(ze_
}
} else {
NEO::PipeControlArgs args;
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
args.dcFlushEnable = (!event->signalScope) ? false : true;
}
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(event->signalScope);
this->csr->flushNonKernelTask(&event->getAllocation(this->device), event->getGpuAddress(this->device), Event::STATE_SIGNALED, args, false, false, false);
if (this->isSyncModeQueue) {
auto timeoutMicroseconds = NEO::TimeoutControls::maxTimeout;
@@ -317,9 +315,7 @@ ze_result_t CommandListCoreFamilyImmediate<gfxCoreFamily>::appendEventReset(ze_e
}
} else {
NEO::PipeControlArgs args;
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
args.dcFlushEnable = (!event->signalScope) ? false : true;
}
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(event->signalScope);
this->csr->flushNonKernelTask(&event->getAllocation(this->device), event->getGpuAddress(this->device), Event::STATE_CLEARED, args, false, false, false);
if (this->isSyncModeQueue) {
auto timeoutMicroseconds = NEO::TimeoutControls::maxTimeout;
@@ -374,7 +370,7 @@ ze_result_t CommandListCoreFamilyImmediate<gfxCoreFamily>::appendWaitOnEvents(ui
}
} else {
bool dcFlushRequired = false;
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true)) {
for (uint32_t i = 0; i < numEvents; i++) {
auto event = Event::fromHandle(phWaitEvents[i]);
dcFlushRequired |= (!event->waitScope) ? false : true;

6
level_zero/core/source/cmdlist/cmdlist_hw_xehp_and_later.inl
View File

@@ -133,7 +133,7 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendLaunchKernelWithParams(z
if (NEO::DebugManager.flags.ForcePipeControlPriorToWalker.get()) {
increaseCommandStreamSpace(NEO::MemorySynchronizationCommands<GfxFamily>::getSizeForSinglePipeControl());
NEO::PipeControlArgs args = {};
NEO::PipeControlArgs args;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
}
NEO::Device *neoDevice = device->getNEODevice();
@@ -165,9 +165,7 @@ ze_result_t CommandListCoreFamily<gfxCoreFamily>::appendLaunchKernelWithParams(z
auto event = Event::fromHandle(hEvent);
eventAlloc = &event->getAllocation(this->device);
commandContainer.addToResidencyContainer(eventAlloc);
if (NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed()) {
L3FlushEnable = (!event->signalScope) ? false : true;
}
L3FlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(event->signalScope);
isTimestampEvent = event->isEventTimestampFlagSet();
eventAddress = event->getPacketAddress(this->device);
}

6
level_zero/core/source/cmdqueue/cmdqueue_hw.inl
View File

@@ -434,7 +434,8 @@ ze_result_t CommandQueueHw<gfxCoreFamily>::executeCommandLists(
args.commandWithPostSync = true;
NEO::EncodeMiFlushDW<GfxFamily>::programMiFlushDw(child, fence->getGpuAddress(), Fence::STATE_SIGNALED, args);
} else {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
if (partitionCount > 1) {
args.workloadPartitionOffset = true;
}
@@ -576,7 +577,8 @@ void CommandQueueHw<gfxCoreFamily>::dispatchTaskCountWrite(NEO::LinearStream &co
args.notifyEnable = csr->isUsedNotifyEnableForPostSync();
NEO::EncodeMiFlushDW<GfxFamily>::programMiFlushDw(commandStream, gpuAddress, taskCountToWrite, args);
} else {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
if (partitionCount > 1) {
args.workloadPartitionOffset = true;
}

2
level_zero/core/source/cmdqueue/cmdqueue_hw_base.inl
View File

@@ -35,7 +35,7 @@ void CommandQueueHw<gfxCoreFamily>::programStateBaseAddress(uint64_t gsba, bool
using STATE_BASE_ADDRESS = typename GfxFamily::STATE_BASE_ADDRESS;
NEO::PipeControlArgs pcArgs;
pcArgs.dcFlushEnable = true;
pcArgs.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
pcArgs.textureCacheInvalidationEnable = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(commandStream, pcArgs);

3
level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl
View File

@@ -27,7 +27,8 @@ void CommandQueueHw<gfxCoreFamily>::programStateBaseAddress(uint64_t gsba, bool
if (NEO::ApiSpecificConfig::getBindlessConfiguration()) {
NEO::Device *neoDevice = device->getNEODevice();
auto globalHeapsBase = neoDevice->getBindlessHeapsHelper()->getGlobalHeapsBase();
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(commandStream, args);
auto pSbaCmd = static_cast<STATE_BASE_ADDRESS *>(commandStream.getSpace(sizeof(STATE_BASE_ADDRESS)));
STATE_BASE_ADDRESS sbaCmd;

3
level_zero/core/source/gen11/cmdlist_gen11.inl
View File

@@ -13,7 +13,8 @@ template <GFXCORE_FAMILY gfxCoreFamily>
void CommandListCoreFamily<gfxCoreFamily>::applyMemoryRangesBarrier(uint32_t numRanges,
const size_t *pRangeSizes,
const void **pRanges) {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(),
args);
}

3
level_zero/core/source/gen12lp/definitions/cache_flush_gen12lp.inl
View File

@@ -23,7 +23,8 @@ void CommandListCoreFamily<gfxCoreFamily>::applyMemoryRangesBarrier(uint32_t num
auto &hwInfo = commandContainer.getDevice()->getHardwareInfo();
bool supportL3Control = hwInfo.capabilityTable.supportCacheFlushAfterWalker;
if (!supportL3Control) {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(),
args);
} else {

3
level_zero/core/source/gen9/cmdlist_gen9.inl
View File

@@ -23,7 +23,8 @@ template <GFXCORE_FAMILY gfxCoreFamily>
void CommandListCoreFamily<gfxCoreFamily>::applyMemoryRangesBarrier(uint32_t numRanges,
const size_t *pRangeSizes,
const void **pRanges) {
NEO::PipeControlArgs args(true);
NEO::PipeControlArgs args;
args.dcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::isDcFlushAllowed(true);
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(),
args);
}

2
level_zero/core/source/xe_hpc_core/pvc/cmdlist_pvc.cpp
View File

@@ -20,7 +20,7 @@ void CommandListCoreFamily<IGFX_XE_HPC_CORE>::applyMemoryRangesBarrier(uint32_t
increaseCommandStreamSpace(NEO::MemorySynchronizationCommands<GfxFamily>::getSizeForSinglePipeControl());
NEO::PipeControlArgs args = {};
NEO::PipeControlArgs args;
args.hdcPipelineFlush = true;
args.unTypedDataPortCacheFlush = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);