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feature: improve post sync system memory fence programming

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Related-To: NEO-8210

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
This commit is contained in:
Dunajski, Bartosz
2024-01-08 18:01:13 +00:00
committed by Compute-Runtime-Automation
parent 46d860b2bf
commit 6eb152b24b
2 changed files with 7 additions and 3 deletions
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6
shared/source/command_container/command_encoder.h
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2020-2023 Intel Corporation
* Copyright (C) 2020-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -74,6 +74,10 @@ struct EncodeDispatchKernelArgs {
bool dcFlushEnable = false;
bool isHeaplessModeEnabled = false;
bool interruptEvent = false;
bool requiresSystemMemoryFence() const {
return (isHostScopeSignalEvent && isKernelUsingSystemAllocation);
}
};
enum class MiPredicateType : uint32_t {

4
shared/source/command_container/command_encoder_xehp_and_later.inl
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2020-2023 Intel Corporation
* Copyright (C) 2020-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -382,7 +382,7 @@ void EncodeDispatchKernel<Family>::encode(CommandContainer &container, EncodeDis
EncodeWalkerArgs walkerArgs{
args.isCooperative ? KernelExecutionType::concurrent : KernelExecutionType::defaultType,
args.isHostScopeSignalEvent && args.isKernelUsingSystemAllocation,
args.requiresSystemMemoryFence(),
kernelDescriptor,
args.requiredDispatchWalkOrder,
args.additionalSizeParam,