Move CSR to shared [1/n]

Related-To: NEO-4344

Change-Id: I356b46bdfac7c943b95ee6dc41d3416bd880f9cb
Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com>

opencl/source/command_stream/CMakeLists.txt

@@ -22,7 +22,6 @@ set(RUNTIME_SRCS_COMMAND_STREAM
   ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_simulated_common_hw.h
   ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_simulated_common_hw_base.inl
   ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_simulated_common_hw_bdw_plus.inl
-  ${CMAKE_CURRENT_SOURCE_DIR}/device_command_stream.h
   ${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}/per_dss_backed_buffer.cpp
   ${CMAKE_CURRENT_SOURCE_DIR}/tbx_command_stream_receiver.cpp
   ${CMAKE_CURRENT_SOURCE_DIR}/tbx_command_stream_receiver.h

opencl/source/command_stream/device_command_stream.h

@@ -1,25 +0,0 @@
-/*
- * Copyright (C) 2017-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#pragma once
-#include "shared/source/command_stream/command_stream_receiver_hw.h"
-
-namespace NEO {
-
-template <typename GfxFamily>
-class DeviceCommandStreamReceiver : public CommandStreamReceiverHw<GfxFamily> {
-    typedef CommandStreamReceiverHw<GfxFamily> BaseClass;
-
-  protected:
-    DeviceCommandStreamReceiver(ExecutionEnvironment &executionEnvironment, uint32_t rootDeviceIndex)
-        : BaseClass(executionEnvironment, rootDeviceIndex) {
-    }
-
-  public:
-    static CommandStreamReceiver *create(bool withAubDump, ExecutionEnvironment &executionEnvironment, uint32_t rootDeviceIndex);
-};
-} // namespace NEO

opencl/source/dll/create_command_stream.cpp

@@ -5,12 +5,12 @@
  *
  */
 
+#include "shared/source/command_stream/device_command_stream.h"
 #include "shared/source/helpers/hw_info.h"
 
 #include "opencl/source/command_stream/aub_command_stream_receiver.h"
 #include "opencl/source/command_stream/command_stream_receiver_with_aub_dump.h"
 #include "opencl/source/command_stream/create_command_stream_impl.h"
-#include "opencl/source/command_stream/device_command_stream.h"
 #include "opencl/source/command_stream/tbx_command_stream_receiver.h"
 
 namespace NEO {

opencl/source/enable_gens.cmake

@@ -22,7 +22,6 @@ set(RUNTIME_SRCS_GENX_CPP_BASE
   aub_mem_dump
   buffer
   command_queue
-  command_stream_receiver_hw
   command_stream_receiver_simulated_common_hw
   experimental_command_buffer
   gpgpu_walker

opencl/source/gen11/command_stream_receiver_hw_gen11.cpp

@@ -1,179 +0,0 @@
-/*
- * Copyright (C) 2018-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#include "shared/source/command_stream/command_stream_receiver_hw_bdw_plus.inl"
-#include "shared/source/debug_settings/debug_settings_manager.h"
-#include "shared/source/helpers/blit_commands_helper_bdw_plus.inl"
-
-#include "opencl/source/command_stream/device_command_stream.h"
-#include "opencl/source/gen11/reg_configs.h"
-
-namespace NEO {
-typedef ICLFamily Family;
-static auto gfxCore = IGFX_GEN11_CORE;
-
-template <>
-size_t CommandStreamReceiverHw<Family>::getCmdSizeForComputeMode() {
-    if (csrSizeRequestFlags.coherencyRequestChanged) {
-        return sizeof(typename Family::MI_LOAD_REGISTER_IMM);
-    }
-    return 0;
-}
-
-template <>
-void CommandStreamReceiverHw<Family>::programComputeMode(LinearStream &stream, DispatchFlags &dispatchFlags) {
-    if (csrSizeRequestFlags.coherencyRequestChanged) {
-        LriHelper<Family>::program(&stream, gen11HdcModeRegister::address,
-                                   DwordBuilder::build(gen11HdcModeRegister::forceNonCoherentEnableBit, true, !dispatchFlags.requiresCoherency));
-        this->lastSentCoherencyRequest = static_cast<int8_t>(dispatchFlags.requiresCoherency);
-    }
-}
-
-template <>
-void CommandStreamReceiverHw<Family>::programMediaSampler(LinearStream &stream, DispatchFlags &dispatchFlags) {
-    using PWR_CLK_STATE_REGISTER = Family::PWR_CLK_STATE_REGISTER;
-
-    if (peekHwInfo().platform.eProductFamily == IGFX_ICELAKE_LP) {
-        if (dispatchFlags.pipelineSelectArgs.mediaSamplerRequired) {
-            if (!lastVmeSubslicesConfig) {
-                auto pc = addPipeControlCmd(stream);
-                pc->setDcFlushEnable(true);
-                pc->setRenderTargetCacheFlushEnable(true);
-                pc->setInstructionCacheInvalidateEnable(true);
-                pc->setTextureCacheInvalidationEnable(true);
-                pc->setPipeControlFlushEnable(true);
-                pc->setVfCacheInvalidationEnable(true);
-                pc->setConstantCacheInvalidationEnable(true);
-                pc->setStateCacheInvalidationEnable(true);
-
-                uint32_t numSubslices = peekHwInfo().gtSystemInfo.SubSliceCount;
-                uint32_t numSubslicesWithVme = numSubslices / 2; // 1 VME unit per DSS
-                uint32_t numSlicesForPowerGating = 1;            // power gating supported only if #Slices = 1
-
-                PWR_CLK_STATE_REGISTER reg = Family::cmdInitPwrClkStateRegister;
-                reg.TheStructure.Common.EUmin = peekHwInfo().gtSystemInfo.MaxEuPerSubSlice;
-                reg.TheStructure.Common.EUmax = peekHwInfo().gtSystemInfo.MaxEuPerSubSlice;
-                reg.TheStructure.Common.SSCountEn = 1; // Enable SScount
-                reg.TheStructure.Common.SScount = numSubslicesWithVme;
-                reg.TheStructure.Common.EnableSliceCountRequest = 1; // Enable SliceCountRequest
-                reg.TheStructure.Common.SliceCountRequest = numSlicesForPowerGating;
-                LriHelper<Family>::program(&stream, PWR_CLK_STATE_REGISTER::REG_ADDRESS, reg.TheStructure.RawData[0]);
-
-                addPipeControlCmd(stream);
-
-                lastVmeSubslicesConfig = true;
-            }
-        } else {
-            if (lastVmeSubslicesConfig) {
-                auto pc = addPipeControlCmd(stream);
-                pc->setDcFlushEnable(true);
-                pc->setRenderTargetCacheFlushEnable(true);
-                pc->setInstructionCacheInvalidateEnable(true);
-                pc->setTextureCacheInvalidationEnable(true);
-                pc->setPipeControlFlushEnable(true);
-                pc->setVfCacheInvalidationEnable(true);
-                pc->setConstantCacheInvalidationEnable(true);
-                pc->setStateCacheInvalidationEnable(true);
-                pc->setGenericMediaStateClear(true);
-
-                addPipeControlCmd(stream);
-
-                // In Gen11-LP, software programs this register as if GT consists of
-                // 2 slices with 4 subslices in each slice. Hardware maps this to the
-                // LP 1 slice/8-subslice physical layout
-                uint32_t numSubslices = peekHwInfo().gtSystemInfo.SubSliceCount;
-                uint32_t numSubslicesMapped = numSubslices / 2;
-                uint32_t numSlicesMapped = peekHwInfo().gtSystemInfo.SliceCount * 2;
-
-                PWR_CLK_STATE_REGISTER reg = Family::cmdInitPwrClkStateRegister;
-                reg.TheStructure.Common.EUmin = peekHwInfo().gtSystemInfo.MaxEuPerSubSlice;
-                reg.TheStructure.Common.EUmax = peekHwInfo().gtSystemInfo.MaxEuPerSubSlice;
-                reg.TheStructure.Common.SSCountEn = 1; // Enable SScount
-                reg.TheStructure.Common.SScount = numSubslicesMapped;
-                reg.TheStructure.Common.EnableSliceCountRequest = 1; // Enable SliceCountRequest
-                reg.TheStructure.Common.SliceCountRequest = numSlicesMapped;
-
-                LriHelper<Family>::program(&stream, PWR_CLK_STATE_REGISTER::REG_ADDRESS, reg.TheStructure.RawData[0]);
-
-                addPipeControlCmd(stream);
-            }
-        }
-    }
-}
-
-template <>
-bool CommandStreamReceiverHw<Family>::detectInitProgrammingFlagsRequired(const DispatchFlags &dispatchFlags) const {
-    bool flag = DebugManager.flags.ForceCsrReprogramming.get();
-    if (peekHwInfo().platform.eProductFamily == IGFX_ICELAKE_LP) {
-        if (!dispatchFlags.pipelineSelectArgs.mediaSamplerRequired) {
-            if (lastVmeSubslicesConfig) {
-                flag = true;
-            }
-        }
-    }
-    return flag;
-}
-
-template <>
-size_t CommandStreamReceiverHw<Family>::getCmdSizeForMediaSampler(bool mediaSamplerRequired) const {
-    typedef typename Family::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
-    typedef typename Family::PIPE_CONTROL PIPE_CONTROL;
-
-    if (peekHwInfo().platform.eProductFamily == IGFX_ICELAKE_LP) {
-        if (mediaSamplerRequired) {
-            if (!lastVmeSubslicesConfig) {
-                return sizeof(MI_LOAD_REGISTER_IMM) + 2 * sizeof(PIPE_CONTROL);
-            }
-        } else {
-            if (lastVmeSubslicesConfig) {
-                return sizeof(MI_LOAD_REGISTER_IMM) + 3 * sizeof(PIPE_CONTROL);
-            }
-        }
-    }
-    return 0;
-}
-
-template <>
-void populateFactoryTable<CommandStreamReceiverHw<Family>>() {
-    extern CommandStreamReceiverCreateFunc commandStreamReceiverFactory[IGFX_MAX_CORE];
-    commandStreamReceiverFactory[gfxCore] = DeviceCommandStreamReceiver<Family>::create;
-}
-
-template class CommandStreamReceiverHw<Family>;
-template struct BlitCommandsHelper<Family>;
-
-const Family::GPGPU_WALKER Family::cmdInitGpgpuWalker = Family::GPGPU_WALKER::sInit();
-const Family::INTERFACE_DESCRIPTOR_DATA Family::cmdInitInterfaceDescriptorData = Family::INTERFACE_DESCRIPTOR_DATA::sInit();
-const Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD Family::cmdInitMediaInterfaceDescriptorLoad = Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD::sInit();
-const Family::MEDIA_STATE_FLUSH Family::cmdInitMediaStateFlush = Family::MEDIA_STATE_FLUSH::sInit();
-const Family::MI_BATCH_BUFFER_START Family::cmdInitBatchBufferStart = Family::MI_BATCH_BUFFER_START::sInit();
-const Family::MI_BATCH_BUFFER_END Family::cmdInitBatchBufferEnd = Family::MI_BATCH_BUFFER_END::sInit();
-const Family::PIPE_CONTROL Family::cmdInitPipeControl = Family::PIPE_CONTROL::sInit();
-const Family::MI_SEMAPHORE_WAIT Family::cmdInitMiSemaphoreWait = Family::MI_SEMAPHORE_WAIT::sInit();
-const Family::RENDER_SURFACE_STATE Family::cmdInitRenderSurfaceState = Family::RENDER_SURFACE_STATE::sInit();
-const Family::PWR_CLK_STATE_REGISTER Family::cmdInitPwrClkStateRegister = Family::PWR_CLK_STATE_REGISTER::sInit();
-const Family::MI_LOAD_REGISTER_IMM Family::cmdInitLoadRegisterImm = Family::MI_LOAD_REGISTER_IMM::sInit();
-const Family::MI_LOAD_REGISTER_REG Family::cmdInitLoadRegisterReg = Family::MI_LOAD_REGISTER_REG::sInit();
-const Family::MI_LOAD_REGISTER_MEM Family::cmdInitLoadRegisterMem = Family::MI_LOAD_REGISTER_MEM::sInit();
-const Family::MI_STORE_DATA_IMM Family::cmdInitStoreDataImm = Family::MI_STORE_DATA_IMM::sInit();
-const Family::MI_STORE_REGISTER_MEM Family::cmdInitStoreRegisterMem = Family::MI_STORE_REGISTER_MEM::sInit();
-const Family::MI_NOOP Family::cmdInitNoop = Family::MI_NOOP::sInit();
-const Family::MI_REPORT_PERF_COUNT Family::cmdInitReportPerfCount = Family::MI_REPORT_PERF_COUNT::sInit();
-const Family::MI_ATOMIC Family::cmdInitAtomic = Family::MI_ATOMIC::sInit();
-const Family::PIPELINE_SELECT Family::cmdInitPipelineSelect = Family::PIPELINE_SELECT::sInit();
-const Family::MI_ARB_CHECK Family::cmdInitArbCheck = Family::MI_ARB_CHECK::sInit();
-const Family::MEDIA_VFE_STATE Family::cmdInitMediaVfeState = Family::MEDIA_VFE_STATE::sInit();
-const Family::STATE_BASE_ADDRESS Family::cmdInitStateBaseAddress = Family::STATE_BASE_ADDRESS::sInit();
-const Family::MEDIA_SURFACE_STATE Family::cmdInitMediaSurfaceState = Family::MEDIA_SURFACE_STATE::sInit();
-const Family::SAMPLER_STATE Family::cmdInitSamplerState = Family::SAMPLER_STATE::sInit();
-const Family::GPGPU_CSR_BASE_ADDRESS Family::cmdInitGpgpuCsrBaseAddress = Family::GPGPU_CSR_BASE_ADDRESS::sInit();
-const Family::STATE_SIP Family::cmdInitStateSip = Family::STATE_SIP::sInit();
-const Family::BINDING_TABLE_STATE Family::cmdInitBindingTableState = Family::BINDING_TABLE_STATE::sInit();
-const Family::MI_USER_INTERRUPT Family::cmdInitUserInterrupt = Family::MI_USER_INTERRUPT::sInit();
-const Family::XY_SRC_COPY_BLT Family::cmdInitXyCopyBlt = Family::XY_SRC_COPY_BLT::sInit();
-const Family::MI_FLUSH_DW Family::cmdInitMiFlushDw = Family::MI_FLUSH_DW::sInit();
-} // namespace NEO

opencl/source/gen11/reg_configs.h

@@ -1,49 +0,0 @@
-/*
- * Copyright (C) 2018-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#pragma once
-#include "shared/source/helpers/preamble.h"
-
-namespace NEO {
-
-struct ICLFamily;
-
-template <>
-struct L3CNTLREGConfig<IGFX_ICELAKE_LP> {
-    static const uint32_t valueForSLM = 0xA0000720u;
-    static const uint32_t valueForNoSLM = 0xA0000720u;
-};
-
-template <>
-struct L3CNTLRegisterOffset<ICLFamily> {
-    static const uint32_t registerOffset = 0x7034;
-};
-
-template <>
-struct DebugModeRegisterOffset<ICLFamily> {
-    enum {
-        registerOffset = 0x20d8,
-        debugEnabledValue = (1 << 5) | (1 << 21)
-    };
-};
-
-namespace gen11HdcModeRegister {
-const uint32_t address = 0xE5F4;
-const uint32_t forceNonCoherentEnableBit = 4;
-} // namespace gen11HdcModeRegister
-
-namespace gen11PowerClockStateRegister {
-const uint32_t address = 0x20C8;
-const uint32_t minEuCountShift = 0;
-const uint32_t maxEuCountShift = 4;
-const uint32_t subSliceCountShift = 8;
-const uint32_t sliceCountShift = 12;
-const uint32_t vmeSliceCount = 1;
-const uint32_t enabledValue = 0x80040800u;
-const uint32_t disabledValue = 0x80040800u;
-} // namespace gen11PowerClockStateRegister
-} // namespace NEO

opencl/source/gen12lp/command_stream_receiver_hw_gen12lp.cpp

@@ -1,91 +0,0 @@
-/*
- * Copyright (C) 2019-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#include "shared/source/gen12lp/hw_cmds.h"
-
-using Family = NEO::TGLLPFamily;
-
-#include "shared/source/command_stream/command_stream_receiver_hw_bdw_plus.inl"
-#include "shared/source/command_stream/command_stream_receiver_hw_tgllp_plus.inl"
-#include "shared/source/helpers/blit_commands_helper_bdw_plus.inl"
-
-#include "opencl/source/command_stream/device_command_stream.h"
-#include "opencl/source/gen12lp/helpers_gen12lp.h"
-
-namespace NEO {
-static auto gfxCore = IGFX_GEN12LP_CORE;
-
-template <>
-void CommandStreamReceiverHw<Family>::programL3(LinearStream &csr, DispatchFlags &dispatchFlags, uint32_t &newL3Config) {
-}
-
-template <>
-size_t CommandStreamReceiverHw<Family>::getCmdSizeForL3Config() const {
-    return 0;
-}
-
-template <>
-size_t CommandStreamReceiverHw<Family>::getCmdSizeForComputeMode() {
-    if (!csrSizeRequestFlags.hasSharedHandles) {
-        for (const auto &allocation : this->getResidencyAllocations()) {
-            if (allocation->peekSharedHandle()) {
-                csrSizeRequestFlags.hasSharedHandles = true;
-                break;
-            }
-        }
-    }
-
-    size_t size = 0;
-    if (csrSizeRequestFlags.coherencyRequestChanged || csrSizeRequestFlags.hasSharedHandles || csrSizeRequestFlags.numGrfRequiredChanged) {
-        size += sizeof(typename Family::STATE_COMPUTE_MODE);
-        if (csrSizeRequestFlags.hasSharedHandles) {
-            size += sizeof(typename Family::PIPE_CONTROL);
-        }
-    }
-    return size;
-}
-
-template <>
-void populateFactoryTable<CommandStreamReceiverHw<Family>>() {
-    extern CommandStreamReceiverCreateFunc commandStreamReceiverFactory[IGFX_MAX_CORE];
-    commandStreamReceiverFactory[gfxCore] = DeviceCommandStreamReceiver<Family>::create;
-}
-
-template class CommandStreamReceiverHw<Family>;
-template struct BlitCommandsHelper<Family>;
-
-const Family::GPGPU_WALKER Family::cmdInitGpgpuWalker = Family::GPGPU_WALKER::sInit();
-const Family::INTERFACE_DESCRIPTOR_DATA Family::cmdInitInterfaceDescriptorData = Family::INTERFACE_DESCRIPTOR_DATA::sInit();
-const Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD Family::cmdInitMediaInterfaceDescriptorLoad = Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD::sInit();
-const Family::MEDIA_STATE_FLUSH Family::cmdInitMediaStateFlush = Family::MEDIA_STATE_FLUSH::sInit();
-const Family::MI_BATCH_BUFFER_START Family::cmdInitBatchBufferStart = Family::MI_BATCH_BUFFER_START::sInit();
-const Family::MI_BATCH_BUFFER_END Family::cmdInitBatchBufferEnd = Family::MI_BATCH_BUFFER_END::sInit();
-const Family::PIPE_CONTROL Family::cmdInitPipeControl = Family::PIPE_CONTROL::sInit();
-const Family::STATE_COMPUTE_MODE Family::cmdInitStateComputeMode = Family::STATE_COMPUTE_MODE::sInit();
-const Family::MI_SEMAPHORE_WAIT Family::cmdInitMiSemaphoreWait = Family::MI_SEMAPHORE_WAIT::sInit();
-const Family::RENDER_SURFACE_STATE Family::cmdInitRenderSurfaceState = Family::RENDER_SURFACE_STATE::sInit();
-const Family::MI_LOAD_REGISTER_IMM Family::cmdInitLoadRegisterImm = Family::MI_LOAD_REGISTER_IMM::sInit();
-const Family::MI_LOAD_REGISTER_REG Family::cmdInitLoadRegisterReg = Family::MI_LOAD_REGISTER_REG::sInit();
-const Family::MI_LOAD_REGISTER_MEM Family::cmdInitLoadRegisterMem = Family::MI_LOAD_REGISTER_MEM::sInit();
-const Family::MI_STORE_DATA_IMM Family::cmdInitStoreDataImm = Family::MI_STORE_DATA_IMM::sInit();
-const Family::MI_STORE_REGISTER_MEM Family::cmdInitStoreRegisterMem = Family::MI_STORE_REGISTER_MEM::sInit();
-const Family::MI_NOOP Family::cmdInitNoop = Family::MI_NOOP::sInit();
-const Family::MI_REPORT_PERF_COUNT Family::cmdInitReportPerfCount = Family::MI_REPORT_PERF_COUNT::sInit();
-const Family::MI_ATOMIC Family::cmdInitAtomic = Family::MI_ATOMIC::sInit();
-const Family::PIPELINE_SELECT Family::cmdInitPipelineSelect = Family::PIPELINE_SELECT::sInit();
-const Family::MI_ARB_CHECK Family::cmdInitArbCheck = Family::MI_ARB_CHECK::sInit();
-const Family::MEDIA_VFE_STATE Family::cmdInitMediaVfeState = Family::MEDIA_VFE_STATE::sInit();
-const Family::STATE_BASE_ADDRESS Family::cmdInitStateBaseAddress = Family::STATE_BASE_ADDRESS::sInit();
-const Family::MEDIA_SURFACE_STATE Family::cmdInitMediaSurfaceState = Family::MEDIA_SURFACE_STATE::sInit();
-const Family::SAMPLER_STATE Family::cmdInitSamplerState = Family::SAMPLER_STATE::sInit();
-const Family::GPGPU_CSR_BASE_ADDRESS Family::cmdInitGpgpuCsrBaseAddress = Family::GPGPU_CSR_BASE_ADDRESS::sInit();
-const Family::STATE_SIP Family::cmdInitStateSip = Family::STATE_SIP::sInit();
-const Family::BINDING_TABLE_STATE Family::cmdInitBindingTableState = Family::BINDING_TABLE_STATE::sInit();
-const Family::MI_USER_INTERRUPT Family::cmdInitUserInterrupt = Family::MI_USER_INTERRUPT::sInit();
-const Family::XY_SRC_COPY_BLT Family::cmdInitXyCopyBlt = Family::XY_SRC_COPY_BLT::sInit();
-const Family::MI_FLUSH_DW Family::cmdInitMiFlushDw = Family::MI_FLUSH_DW::sInit();
-} // namespace NEO

opencl/source/gen12lp/reg_configs.h

@@ -1,25 +0,0 @@
-/*
- * Copyright (C) 2019-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#pragma once
-#include "shared/source/helpers/preamble.h"
-
-namespace NEO {
-
-struct TGLLPFamily;
-template <>
-struct L3CNTLREGConfig<IGFX_TIGERLAKE_LP> {
-    static const uint32_t valueForSLM = 0xD0000020u;
-    static const uint32_t valueForNoSLM = 0xD0000020u;
-};
-
-template <>
-struct L3CNTLRegisterOffset<TGLLPFamily> {
-    static const uint32_t registerOffset = 0xB134;
-    static const uint32_t registerOffsetCCS = 0xB234;
-};
-} // namespace NEO

opencl/source/gen8/command_stream_receiver_hw_gen8.cpp

@@ -1,70 +0,0 @@
-/*
- * Copyright (C) 2018-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#include "shared/source/command_stream/command_stream_receiver_hw_bdw_plus.inl"
-#include "shared/source/gen8/hw_cmds.h"
-#include "shared/source/helpers/blit_commands_helper_bdw_plus.inl"
-
-#include "opencl/source/command_stream/device_command_stream.h"
-
-namespace NEO {
-typedef BDWFamily Family;
-static auto gfxCore = IGFX_GEN8_CORE;
-
-template <>
-size_t CommandStreamReceiverHw<Family>::getCmdSizeForComputeMode() {
-    return 0;
-}
-
-template <>
-void CommandStreamReceiverHw<Family>::programComputeMode(LinearStream &stream, DispatchFlags &dispatchFlags) {
-}
-
-template <>
-void populateFactoryTable<CommandStreamReceiverHw<Family>>() {
-    extern CommandStreamReceiverCreateFunc commandStreamReceiverFactory[2 * IGFX_MAX_CORE];
-    commandStreamReceiverFactory[gfxCore] = DeviceCommandStreamReceiver<Family>::create;
-}
-
-template <>
-void CommandStreamReceiverHw<Family>::addClearSLMWorkAround(Family::PIPE_CONTROL *pCmd) {
-    pCmd->setProtectedMemoryDisable(1);
-}
-
-template class CommandStreamReceiverHw<Family>;
-template struct BlitCommandsHelper<Family>;
-
-const Family::GPGPU_WALKER Family::cmdInitGpgpuWalker = Family::GPGPU_WALKER::sInit();
-const Family::INTERFACE_DESCRIPTOR_DATA Family::cmdInitInterfaceDescriptorData = Family::INTERFACE_DESCRIPTOR_DATA::sInit();
-const Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD Family::cmdInitMediaInterfaceDescriptorLoad = Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD::sInit();
-const Family::MEDIA_STATE_FLUSH Family::cmdInitMediaStateFlush = Family::MEDIA_STATE_FLUSH::sInit();
-const Family::MI_BATCH_BUFFER_START Family::cmdInitBatchBufferStart = Family::MI_BATCH_BUFFER_START::sInit();
-const Family::MI_BATCH_BUFFER_END Family::cmdInitBatchBufferEnd = Family::MI_BATCH_BUFFER_END::sInit();
-const Family::PIPE_CONTROL Family::cmdInitPipeControl = Family::PIPE_CONTROL::sInit();
-const Family::MI_SEMAPHORE_WAIT Family::cmdInitMiSemaphoreWait = Family::MI_SEMAPHORE_WAIT::sInit();
-const Family::RENDER_SURFACE_STATE Family::cmdInitRenderSurfaceState = Family::RENDER_SURFACE_STATE::sInit();
-const Family::MI_LOAD_REGISTER_IMM Family::cmdInitLoadRegisterImm = Family::MI_LOAD_REGISTER_IMM::sInit();
-const Family::MI_LOAD_REGISTER_REG Family::cmdInitLoadRegisterReg = Family::MI_LOAD_REGISTER_REG::sInit();
-const Family::MI_LOAD_REGISTER_MEM Family::cmdInitLoadRegisterMem = Family::MI_LOAD_REGISTER_MEM::sInit();
-const Family::MI_STORE_DATA_IMM Family::cmdInitStoreDataImm = Family::MI_STORE_DATA_IMM::sInit();
-const Family::MI_STORE_REGISTER_MEM Family::cmdInitStoreRegisterMem = Family::MI_STORE_REGISTER_MEM::sInit();
-const Family::MI_NOOP Family::cmdInitNoop = Family::MI_NOOP::sInit();
-const Family::MI_REPORT_PERF_COUNT Family::cmdInitReportPerfCount = Family::MI_REPORT_PERF_COUNT::sInit();
-const Family::MI_ATOMIC Family::cmdInitAtomic = Family::MI_ATOMIC::sInit();
-const Family::PIPELINE_SELECT Family::cmdInitPipelineSelect = Family::PIPELINE_SELECT::sInit();
-const Family::MI_ARB_CHECK Family::cmdInitArbCheck = Family::MI_ARB_CHECK::sInit();
-const Family::MEDIA_VFE_STATE Family::cmdInitMediaVfeState = Family::MEDIA_VFE_STATE::sInit();
-const Family::STATE_BASE_ADDRESS Family::cmdInitStateBaseAddress = Family::STATE_BASE_ADDRESS::sInit();
-const Family::MEDIA_SURFACE_STATE Family::cmdInitMediaSurfaceState = Family::MEDIA_SURFACE_STATE::sInit();
-const Family::SAMPLER_STATE Family::cmdInitSamplerState = Family::SAMPLER_STATE::sInit();
-const Family::GPGPU_CSR_BASE_ADDRESS Family::cmdInitGpgpuCsrBaseAddress = Family::GPGPU_CSR_BASE_ADDRESS::sInit();
-const Family::STATE_SIP Family::cmdInitStateSip = Family::STATE_SIP::sInit();
-const Family::BINDING_TABLE_STATE Family::cmdInitBindingTableState = Family::BINDING_TABLE_STATE::sInit();
-const Family::MI_USER_INTERRUPT Family::cmdInitUserInterrupt = Family::MI_USER_INTERRUPT::sInit();
-const Family::XY_SRC_COPY_BLT Family::cmdInitXyCopyBlt = Family::XY_SRC_COPY_BLT::sInit();
-const Family::MI_FLUSH_DW Family::cmdInitMiFlushDw = Family::MI_FLUSH_DW::sInit();
-} // namespace NEO

opencl/source/gen8/reg_configs.h

@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2017-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#pragma once
-#include "shared/source/helpers/preamble.h"
-
-namespace NEO {
-
-struct BDWFamily;
-template <>
-struct L3CNTLREGConfig<IGFX_BROADWELL> {
-    static const uint32_t valueForSLM = 0x60000321u;
-    static const uint32_t valueForNoSLM = 0x80000340u;
-};
-
-template <>
-struct L3CNTLRegisterOffset<BDWFamily> {
-    static const uint32_t registerOffset = 0x7034;
-};
-} // namespace NEO

opencl/source/gen9/command_stream_receiver_hw_gen9.cpp

@@ -1,65 +0,0 @@
-/*
- * Copyright (C) 2018-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#include "shared/source/command_stream/command_stream_receiver_hw_bdw_plus.inl"
-#include "shared/source/gen9/hw_cmds.h"
-#include "shared/source/helpers/blit_commands_helper_bdw_plus.inl"
-
-#include "opencl/source/command_stream/device_command_stream.h"
-
-namespace NEO {
-typedef SKLFamily Family;
-static auto gfxCore = IGFX_GEN9_CORE;
-
-template <>
-size_t CommandStreamReceiverHw<Family>::getCmdSizeForComputeMode() {
-    return 0;
-}
-
-template <>
-void CommandStreamReceiverHw<Family>::programComputeMode(LinearStream &stream, DispatchFlags &dispatchFlags) {
-}
-
-template <>
-void populateFactoryTable<CommandStreamReceiverHw<Family>>() {
-    extern CommandStreamReceiverCreateFunc commandStreamReceiverFactory[IGFX_MAX_CORE];
-    commandStreamReceiverFactory[gfxCore] = DeviceCommandStreamReceiver<Family>::create;
-}
-
-template class CommandStreamReceiverHw<Family>;
-template struct BlitCommandsHelper<Family>;
-
-const Family::GPGPU_WALKER Family::cmdInitGpgpuWalker = Family::GPGPU_WALKER::sInit();
-const Family::INTERFACE_DESCRIPTOR_DATA Family::cmdInitInterfaceDescriptorData = Family::INTERFACE_DESCRIPTOR_DATA::sInit();
-const Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD Family::cmdInitMediaInterfaceDescriptorLoad = Family::MEDIA_INTERFACE_DESCRIPTOR_LOAD::sInit();
-const Family::MEDIA_STATE_FLUSH Family::cmdInitMediaStateFlush = Family::MEDIA_STATE_FLUSH::sInit();
-const Family::MI_BATCH_BUFFER_START Family::cmdInitBatchBufferStart = Family::MI_BATCH_BUFFER_START::sInit();
-const Family::MI_BATCH_BUFFER_END Family::cmdInitBatchBufferEnd = Family::MI_BATCH_BUFFER_END::sInit();
-const Family::PIPE_CONTROL Family::cmdInitPipeControl = Family::PIPE_CONTROL::sInit();
-const Family::MI_SEMAPHORE_WAIT Family::cmdInitMiSemaphoreWait = Family::MI_SEMAPHORE_WAIT::sInit();
-const Family::RENDER_SURFACE_STATE Family::cmdInitRenderSurfaceState = Family::RENDER_SURFACE_STATE::sInit();
-const Family::MI_LOAD_REGISTER_IMM Family::cmdInitLoadRegisterImm = Family::MI_LOAD_REGISTER_IMM::sInit();
-const Family::MI_LOAD_REGISTER_REG Family::cmdInitLoadRegisterReg = Family::MI_LOAD_REGISTER_REG::sInit();
-const Family::MI_LOAD_REGISTER_MEM Family::cmdInitLoadRegisterMem = Family::MI_LOAD_REGISTER_MEM::sInit();
-const Family::MI_STORE_DATA_IMM Family::cmdInitStoreDataImm = Family::MI_STORE_DATA_IMM::sInit();
-const Family::MI_STORE_REGISTER_MEM Family::cmdInitStoreRegisterMem = Family::MI_STORE_REGISTER_MEM::sInit();
-const Family::MI_NOOP Family::cmdInitNoop = Family::MI_NOOP::sInit();
-const Family::MI_REPORT_PERF_COUNT Family::cmdInitReportPerfCount = Family::MI_REPORT_PERF_COUNT::sInit();
-const Family::MI_ATOMIC Family::cmdInitAtomic = Family::MI_ATOMIC::sInit();
-const Family::PIPELINE_SELECT Family::cmdInitPipelineSelect = Family::PIPELINE_SELECT::sInit();
-const Family::MI_ARB_CHECK Family::cmdInitArbCheck = Family::MI_ARB_CHECK::sInit();
-const Family::MEDIA_VFE_STATE Family::cmdInitMediaVfeState = Family::MEDIA_VFE_STATE::sInit();
-const Family::STATE_BASE_ADDRESS Family::cmdInitStateBaseAddress = Family::STATE_BASE_ADDRESS::sInit();
-const Family::MEDIA_SURFACE_STATE Family::cmdInitMediaSurfaceState = Family::MEDIA_SURFACE_STATE::sInit();
-const Family::SAMPLER_STATE Family::cmdInitSamplerState = Family::SAMPLER_STATE::sInit();
-const Family::GPGPU_CSR_BASE_ADDRESS Family::cmdInitGpgpuCsrBaseAddress = Family::GPGPU_CSR_BASE_ADDRESS::sInit();
-const Family::STATE_SIP Family::cmdInitStateSip = Family::STATE_SIP::sInit();
-const Family::BINDING_TABLE_STATE Family::cmdInitBindingTableState = Family::BINDING_TABLE_STATE::sInit();
-const Family::MI_USER_INTERRUPT Family::cmdInitUserInterrupt = Family::MI_USER_INTERRUPT::sInit();
-const Family::XY_SRC_COPY_BLT Family::cmdInitXyCopyBlt = Family::XY_SRC_COPY_BLT::sInit();
-const Family::MI_FLUSH_DW Family::cmdInitMiFlushDw = Family::MI_FLUSH_DW::sInit();
-} // namespace NEO

opencl/source/gen9/reg_configs.h

@@ -1,38 +0,0 @@
-/*
- * Copyright (C) 2018-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#pragma once
-#include "shared/source/command_stream/thread_arbitration_policy.h"
-#include "shared/source/helpers/preamble.h"
-
-namespace NEO {
-struct SKLFamily;
-template <>
-struct L3CNTLREGConfig<IGFX_SKYLAKE> {
-    static const uint32_t valueForSLM = 0x60000321u;
-    static const uint32_t valueForNoSLM = 0x80000340u;
-};
-
-template <>
-struct L3CNTLRegisterOffset<SKLFamily> {
-    static const uint32_t registerOffset = 0x7034;
-};
-
-template <>
-struct L3CNTLREGConfig<IGFX_BROXTON> {
-    static const uint32_t valueForSLM = 0x60000321u;
-    static const uint32_t valueForNoSLM = 0x80000340u;
-};
-
-namespace DebugControlReg2 {
-constexpr uint32_t address = 0xE404;
-constexpr uint32_t getRegData(const uint32_t &policy) {
-    return policy == ThreadArbitrationPolicy::RoundRobin ? 0x100 : 0x0;
-};
-} // namespace DebugControlReg2
-
-} // namespace NEO

opencl/source/gen_common/CMakeLists.txt

@@ -8,7 +8,6 @@ set(RUNTIME_SRCS_GEN_COMMON
   ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
   ${CMAKE_CURRENT_SOURCE_DIR}/aub_mapper.h
   ${CMAKE_CURRENT_SOURCE_DIR}/aub_mapper_base.h
-  ${CMAKE_CURRENT_SOURCE_DIR}/reg_configs${BRANCH_DIR_SUFFIX}/reg_configs_common.h
 )
 
 target_sources(${NEO_STATIC_LIB_NAME} PRIVATE ${RUNTIME_SRCS_GEN_COMMON})

opencl/source/gen_common/reg_configs/reg_configs_common.h

@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2017-2020 Intel Corporation
- *
- * SPDX-License-Identifier: MIT
- *
- */
-
-#pragma once
-#ifdef SUPPORT_GEN8
-#include "opencl/source/gen8/reg_configs.h"
-#endif
-#ifdef SUPPORT_GEN9
-#include "opencl/source/gen9/reg_configs.h"
-#endif
-#ifdef SUPPORT_GEN11
-#include "opencl/source/gen11/reg_configs.h"
-#endif
-#ifdef SUPPORT_GEN12LP
-#include "opencl/source/gen12lp/reg_configs.h"
-#endif
-#include <cstdint>
-
-namespace NEO {
-namespace RowChickenReg4 {
-const uint32_t address = 0xE48C;
-const uint32_t regDataForArbitrationPolicy[3] = {
-    0xC0000, // Age Based
-    0xC0004, // Round Robin
-    0xC0008, // Round Robin after dependency
-};
-} // namespace RowChickenReg4
-namespace FfSliceCsChknReg2 {
-constexpr uint32_t address = 0x20E4;
-
-constexpr uint32_t regUpdate = (1 << 5);
-constexpr uint32_t maskShift = 16;
-constexpr uint32_t maskUpdate = regUpdate << maskShift;
-
-constexpr uint32_t regVal = regUpdate | maskUpdate;
-
-} // namespace FfSliceCsChknReg2
-} // namespace NEO

opencl/source/os_interface/linux/CMakeLists.txt

@@ -8,8 +8,8 @@ set(RUNTIME_SRCS_OS_INTERFACE_LINUX
   ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
   ${CMAKE_CURRENT_SOURCE_DIR}/api_linux.cpp
   ${CMAKE_CURRENT_SOURCE_DIR}/d3d_sharing_functions.h
-  ${CMAKE_CURRENT_SOURCE_DIR}/device_command_stream.inl
   ${CMAKE_CURRENT_SOURCE_DIR}/device_caps_init_linux.cpp
+  ${CMAKE_CURRENT_SOURCE_DIR}/device_command_stream.inl
   ${CMAKE_CURRENT_SOURCE_DIR}/driver_info.cpp
   ${CMAKE_CURRENT_SOURCE_DIR}/drm_command_stream.h
   ${CMAKE_CURRENT_SOURCE_DIR}/drm_command_stream.inl

opencl/source/os_interface/linux/device_command_stream.inl

@@ -5,8 +5,9 @@
  *
  */
 
+#include "shared/source/command_stream/device_command_stream.h"
+
 #include "opencl/source/command_stream/command_stream_receiver_with_aub_dump.h"
-#include "opencl/source/command_stream/device_command_stream.h"
 #include "opencl/source/os_interface/linux/drm_command_stream.h"
 
 namespace NEO {

opencl/source/os_interface/linux/drm_command_stream.h

@@ -6,10 +6,9 @@
  */
 
 #pragma once
+#include "shared/source/command_stream/device_command_stream.h"
 #include "shared/source/os_interface/linux/drm_gem_close_worker.h"
 
-#include "opencl/source/command_stream/device_command_stream.h"
-
 #include "drm/i915_drm.h"
 
 #include <vector>

opencl/source/os_interface/windows/CMakeLists.txt

@@ -10,8 +10,8 @@ set(RUNTIME_SRCS_OS_INTERFACE_WINDOWS
   ${CMAKE_CURRENT_SOURCE_DIR}/d3d10_11_sharing_functions.cpp
   ${CMAKE_CURRENT_SOURCE_DIR}/d3d9_sharing_functions.cpp
   ${CMAKE_CURRENT_SOURCE_DIR}/d3d_sharing_functions.h
-  ${CMAKE_CURRENT_SOURCE_DIR}/device_command_stream.inl
   ${CMAKE_CURRENT_SOURCE_DIR}/device_caps_init_win.cpp
+  ${CMAKE_CURRENT_SOURCE_DIR}/device_command_stream.inl
   ${CMAKE_CURRENT_SOURCE_DIR}/driver_info.cpp
   ${CMAKE_CURRENT_SOURCE_DIR}/driver_info.h
   ${CMAKE_CURRENT_SOURCE_DIR}/environment_variables.h

opencl/source/os_interface/windows/device_command_stream.inl

@@ -9,10 +9,10 @@
 // Current order must be preserved due to two versions of igfxfmid.h
 #pragma warning(push)
 #pragma warning(disable : 4005)
+#include "shared/source/command_stream/device_command_stream.h"
 #include "shared/source/helpers/hw_cmds.h"
 
 #include "opencl/source/command_stream/command_stream_receiver_with_aub_dump.h"
-#include "opencl/source/command_stream/device_command_stream.h"
 #include "opencl/source/os_interface/windows/wddm_device_command_stream.h"
 #pragma warning(pop)
 

opencl/source/os_interface/windows/wddm_device_command_stream.h

@@ -6,7 +6,7 @@
  */
 
 #pragma once
-#include "opencl/source/command_stream/device_command_stream.h"
+#include "shared/source/command_stream/device_command_stream.h"
 
 struct COMMAND_BUFFER_HEADER_REC;
 

opencl/test/unit_test/gen11/coherency_tests_gen11.cpp

@@ -6,9 +6,9 @@
  */
 
 #include "shared/source/command_stream/command_stream_receiver_hw.h"
+#include "shared/source/gen11/reg_configs.h"
 #include "shared/source/helpers/hw_helper.h"
 
-#include "opencl/source/gen11/reg_configs.h"
 #include "opencl/test/unit_test/helpers/dispatch_flags_helper.h"
 #include "opencl/test/unit_test/helpers/hw_parse.h"
 #include "opencl/test/unit_test/mocks/mock_device.h"

opencl/test/unit_test/gen11/icllp/test_program_media_sampler_icllp.cpp

@@ -6,10 +6,10 @@
  */
 
 #include "shared/source/command_stream/command_stream_receiver_hw.h"
+#include "shared/source/gen11/reg_configs.h"
 #include "shared/source/helpers/hw_helper.h"
 #include "shared/test/unit_test/helpers/debug_manager_state_restore.h"
 
-#include "opencl/source/gen11/reg_configs.h"
 #include "opencl/test/unit_test/helpers/dispatch_flags_helper.h"
 #include "opencl/test/unit_test/helpers/hw_parse.h"
 #include "opencl/test/unit_test/mocks/mock_device.h"

opencl/test/unit_test/gen9/enqueue_kernel_gen9.cpp

@@ -5,8 +5,9 @@
  *
  */
 
+#include "shared/source/gen9/reg_configs.h"
+
 #include "opencl/source/command_queue/command_queue_hw.h"
-#include "opencl/source/gen9/reg_configs.h"
 #include "opencl/test/unit_test/fixtures/device_fixture.h"
 #include "opencl/test/unit_test/fixtures/memory_management_fixture.h"
 #include "opencl/test/unit_test/helpers/hw_parse.h"

opencl/test/unit_test/os_interface/linux/device_command_stream_tests.cpp

@@ -6,11 +6,11 @@
  */
 
 #include "shared/source/command_stream/command_stream_receiver.h"
+#include "shared/source/command_stream/device_command_stream.h"
 #include "shared/source/command_stream/linear_stream.h"
 #include "shared/source/os_interface/linux/os_interface.h"
 
 #include "opencl/source/command_stream/aub_command_stream_receiver.h"
-#include "opencl/source/command_stream/device_command_stream.h"
 #include "opencl/source/os_interface/linux/device_command_stream.inl"
 #include "opencl/source/os_interface/linux/drm_command_stream.h"
 #include "opencl/test/unit_test/fixtures/device_fixture.h"

opencl/test/unit_test/os_interface/linux/drm_gem_close_worker_tests.cpp

@@ -5,6 +5,7 @@
  *
  */
 
+#include "shared/source/command_stream/device_command_stream.h"
 #include "shared/source/execution_environment/execution_environment.h"
 #include "shared/source/helpers/aligned_memory.h"
 #include "shared/source/os_interface/linux/drm_buffer_object.h"
@@ -13,7 +14,6 @@
 #include "shared/source/os_interface/linux/drm_memory_operations_handler.h"
 #include "shared/source/os_interface/linux/os_interface.h"
 
-#include "opencl/source/command_stream/device_command_stream.h"
 #include "opencl/source/mem_obj/buffer.h"
 #include "opencl/source/os_interface/linux/drm_command_stream.h"
 #include "opencl/test/unit_test/mocks/mock_execution_environment.h"

opencl/test/unit_test/os_interface/linux/drm_memory_manager_tests.cpp

@@ -7,6 +7,7 @@
 
 #include "drm_memory_manager_tests.h"
 
+#include "shared/source/command_stream/device_command_stream.h"
 #include "shared/source/command_stream/linear_stream.h"
 #include "shared/source/command_stream/preemption.h"
 #include "shared/source/gmm_helper/gmm_helper.h"
@@ -26,7 +27,6 @@
 #include "shared/test/unit_test/helpers/debug_manager_state_restore.h"
 #include "shared/test/unit_test/helpers/ult_hw_config.h"
 
-#include "opencl/source/command_stream/device_command_stream.h"
 #include "opencl/source/event/event.h"
 #include "opencl/source/helpers/memory_properties_flags_helpers.h"
 #include "opencl/source/mem_obj/buffer.h"

opencl/test/unit_test/os_interface/windows/device_command_stream_tests.cpp

@@ -6,6 +6,7 @@
  */
 
 #include "shared/source/command_stream/command_stream_receiver.h"
+#include "shared/source/command_stream/device_command_stream.h"
 #include "shared/source/command_stream/linear_stream.h"
 #include "shared/source/command_stream/preemption.h"
 #include "shared/source/helpers/flush_stamp.h"
@@ -23,7 +24,6 @@
 
 #include "opencl/source/command_stream/aub_command_stream_receiver.h"
 #include "opencl/source/command_stream/command_stream_receiver_with_aub_dump.h"
-#include "opencl/source/command_stream/device_command_stream.h"
 #include "opencl/source/helpers/built_ins_helper.h"
 #include "opencl/source/mem_obj/buffer.h"
 #include "opencl/source/os_interface/windows/wddm_device_command_stream.h"