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Source Level Debugger - add MI_LOAD_REG debug cmds
- add 2 MI_LOAD_REGISTER_IMM cmds in preamble when debugger is active Change-Id: I4dd46a3c01fc95feadf8a12728ce801efe506e05
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sys_ocldev
parent
079f94cd2d
commit
87f0dcda36
@@ -50,8 +50,10 @@ struct PreambleHelper {
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static void programVFEState(LinearStream *pCommandStream, const HardwareInfo &hwInfo, int scratchSize, uint64_t scratchAddress);
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static void programPreamble(LinearStream *pCommandStream, Device &device, uint32_t l3Config,
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uint32_t requiredThreadArbitrationPolicy, GraphicsAllocation *preemptionCsr);
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static void programKernelDebugging(LinearStream *pCommandStream);
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static uint32_t getL3Config(const HardwareInfo &hwInfo, bool useSLM);
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static size_t getAdditionalCommandsSize(const Device &device);
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static size_t getKernelDebuggingCommandsSize(bool debuggingActive);
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static void programGenSpecificPreambleWorkArounds(LinearStream *pCommandStream, const HardwareInfo &hwInfo);
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static uint32_t getUrbEntryAllocationSize();
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};
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@@ -78,4 +80,14 @@ struct L3CNTLRegisterOffset {
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static const uint32_t registerOffset;
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};
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namespace DebugModeRegisterOffset {
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static constexpr uint32_t registerOffset = 0x20ec;
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static constexpr uint32_t debugEnabledValue = (1 << 6) | (1 << 22);
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}; // namespace DebugModeRegisterOffset
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namespace TdDebugControlRegisterOffset {
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static constexpr uint32_t registerOffset = 0xe400;
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static constexpr uint32_t debugEnabledValue = (1 << 4) | (1 << 7);
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}; // namespace TdDebugControlRegisterOffset
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} // namespace OCLRT
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