mirror of
https://github.com/intel/compute-runtime.git
synced 2026-01-05 09:09:04 +08:00
Introduce initial implementation of DirectSubmission relaxed ordering mode.
Initial implementation of task store section Related-To: NEO-7458 Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
This commit is contained in:
committed by
Compute-Runtime-Automation
parent
8927399cce
commit
89b96e5e8f
@@ -23,6 +23,7 @@ struct MockDirectSubmissionHw : public DirectSubmissionHw<GfxFamily, Dispatcher>
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using BaseClass::currentRingBuffer;
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using BaseClass::dcFlushRequired;
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using BaseClass::deallocateResources;
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using BaseClass::deferredTasksListAllocation;
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using BaseClass::diagnostic;
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using BaseClass::DirectSubmissionHw;
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using BaseClass::disableCacheFlush;
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@@ -53,6 +54,8 @@ struct MockDirectSubmissionHw : public DirectSubmissionHw<GfxFamily, Dispatcher>
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using BaseClass::partitionedMode;
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using BaseClass::performDiagnosticMode;
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using BaseClass::postSyncOffset;
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using BaseClass::preinitializedTaskStoreSection;
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using BaseClass::relaxedOrderingInitialized;
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using BaseClass::reserved;
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using BaseClass::ringBuffers;
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using BaseClass::ringCommandStream;
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@@ -84,6 +87,11 @@ struct MockDirectSubmissionHw : public DirectSubmissionHw<GfxFamily, Dispatcher>
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return allocateOsResourcesReturn;
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}
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void preinitializeTaskStoreSection() override {
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preinitializeTaskStoreSectionCalled++;
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BaseClass::preinitializeTaskStoreSection();
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}
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bool makeResourcesResident(DirectSubmissionAllocations &allocations) override {
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makeResourcesResidentVectorSize = static_cast<uint32_t>(allocations.size());
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if (callBaseResident) {
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@@ -139,6 +147,7 @@ struct MockDirectSubmissionHw : public DirectSubmissionHw<GfxFamily, Dispatcher>
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uint32_t submitCount = 0u;
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uint32_t handleResidencyCount = 0u;
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uint32_t disabledDiagnosticCalled = 0u;
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uint32_t preinitializeTaskStoreSectionCalled = 0;
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uint32_t makeResourcesResidentVectorSize = 0u;
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bool allocateOsResourcesReturn = true;
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bool submitReturn = true;
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@@ -486,4 +486,5 @@ AdjustThreadGroupDispatchSize = -1
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ForceNonblockingExecbufferCalls = -1
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UseHighAlignmentForHeapExtended = -1
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ForceAutoGrfCompilationMode = -1
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ForceComputeWalkerPostSyncFlush = -1
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ForceComputeWalkerPostSyncFlush = -1
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DirectSubmissionRelaxedOrdering = -1
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@@ -11,6 +11,7 @@
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#include "shared/source/direct_submission/direct_submission_hw.h"
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#include "shared/source/direct_submission/dispatchers/render_dispatcher.h"
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#include "shared/source/helpers/flush_stamp.h"
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#include "shared/source/helpers/register_offsets.h"
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#include "shared/source/utilities/cpuintrinsics.h"
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#include "shared/test/common/cmd_parse/hw_parse.h"
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#include "shared/test/common/helpers/debug_manager_state_restore.h"
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@@ -901,4 +902,227 @@ HWTEST_F(DirectSubmissionDispatchBufferTest, givenDebugFlagSetWhenStoppingRingbu
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EXPECT_EQ(initialCounterValue + expectedCount, CpuIntrinsicsTests::sfenceCounter);
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}
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}
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struct DirectSubmissionRelaxedOrderingTests : public DirectSubmissionDispatchBufferTest {
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void SetUp() override {
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DebugManager.flags.DirectSubmissionRelaxedOrdering.set(1);
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DirectSubmissionDispatchBufferTest::SetUp();
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}
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DebugManagerStateRestore restore;
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};
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HWTEST_F(DirectSubmissionRelaxedOrderingTests, whenAllocatingResourcesThenCreateDeferredTasksAllocation) {
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using Dispatcher = RenderDispatcher<FamilyType>;
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auto mockMemoryOperations = new MockMemoryOperations();
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mockMemoryOperations->captureGfxAllocationsForMakeResident = true;
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pDevice->getRootDeviceEnvironmentRef().memoryOperationsInterface.reset(mockMemoryOperations);
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MockDirectSubmissionHw<FamilyType, Dispatcher> directSubmission(*pDevice->getDefaultEngine().commandStreamReceiver);
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directSubmission.callBaseResident = true;
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directSubmission.initialize(false, false);
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EXPECT_EQ(AllocationType::DEFERRED_TASKS_LIST, directSubmission.deferredTasksListAllocation->getAllocationType());
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EXPECT_NE(nullptr, directSubmission.deferredTasksListAllocation);
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EXPECT_EQ(directSubmission.deferredTasksListAllocation, mockMemoryOperations->gfxAllocationsForMakeResident.back());
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}
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HWTEST_F(DirectSubmissionRelaxedOrderingTests, whenInitializingThenPreinitializeTaskStoreSection) {
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using Dispatcher = RenderDispatcher<FamilyType>;
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{
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MockDirectSubmissionHw<FamilyType, Dispatcher> directSubmission(*pDevice->getDefaultEngine().commandStreamReceiver);
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directSubmission.initialize(false, false);
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EXPECT_EQ(0u, directSubmission.preinitializeTaskStoreSectionCalled);
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EXPECT_FALSE(directSubmission.relaxedOrderingInitialized);
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EXPECT_EQ(nullptr, directSubmission.preinitializedTaskStoreSection.get());
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}
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{
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MockDirectSubmissionHw<FamilyType, Dispatcher> directSubmission(*pDevice->getDefaultEngine().commandStreamReceiver);
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directSubmission.initialize(true, false);
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EXPECT_EQ(1u, directSubmission.preinitializeTaskStoreSectionCalled);
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EXPECT_TRUE(directSubmission.relaxedOrderingInitialized);
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EXPECT_NE(nullptr, directSubmission.preinitializedTaskStoreSection.get());
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directSubmission.startRingBuffer();
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EXPECT_EQ(1u, directSubmission.preinitializeTaskStoreSectionCalled);
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}
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{
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MockDirectSubmissionHw<FamilyType, Dispatcher> directSubmission(*pDevice->getDefaultEngine().commandStreamReceiver);
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directSubmission.initialize(false, false);
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EXPECT_EQ(0u, directSubmission.preinitializeTaskStoreSectionCalled);
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directSubmission.startRingBuffer();
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EXPECT_EQ(1u, directSubmission.preinitializeTaskStoreSectionCalled);
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EXPECT_TRUE(directSubmission.relaxedOrderingInitialized);
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EXPECT_NE(nullptr, directSubmission.preinitializedTaskStoreSection.get());
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directSubmission.startRingBuffer();
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EXPECT_EQ(1u, directSubmission.preinitializeTaskStoreSectionCalled);
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}
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}
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HWTEST_F(DirectSubmissionRelaxedOrderingTests, whenDispatchingWorkThenDispatchTaskStoreSection) {
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using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
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using MI_MATH_ALU_INST_INLINE = typename FamilyType::MI_MATH_ALU_INST_INLINE;
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using MI_MATH = typename FamilyType::MI_MATH;
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using Dispatcher = RenderDispatcher<FamilyType>;
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MockDirectSubmissionHw<FamilyType, Dispatcher> directSubmission(*pDevice->getDefaultEngine().commandStreamReceiver);
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directSubmission.initialize(true, false);
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auto offset = directSubmission.ringCommandStream.getUsed() + directSubmission.getSizeStartSection();
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FlushStampTracker flushStamp(true);
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directSubmission.dispatchCommandBuffer(batchBuffer, flushStamp);
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auto taskStoreSection = ptrOffset(directSubmission.ringCommandStream.getCpuBase(), offset);
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if constexpr (FamilyType::isUsingMiSetPredicate) {
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using MI_SET_PREDICATE = typename FamilyType::MI_SET_PREDICATE;
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using PREDICATE_ENABLE = typename MI_SET_PREDICATE::PREDICATE_ENABLE;
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auto miSetPredicate = reinterpret_cast<MI_SET_PREDICATE *>(taskStoreSection);
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EXPECT_EQ(PREDICATE_ENABLE::PREDICATE_ENABLE_PREDICATE_DISABLE, miSetPredicate->getPredicateEnable());
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taskStoreSection = ptrOffset(taskStoreSection, sizeof(MI_SET_PREDICATE));
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}
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uint64_t deferredTasksVa = directSubmission.deferredTasksListAllocation->getGpuAddress();
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auto lriCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(taskStoreSection);
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EXPECT_EQ(CS_GPR_R6, lriCmd->getRegisterOffset());
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EXPECT_EQ(static_cast<uint32_t>(deferredTasksVa & 0xFFFF'FFFFULL), lriCmd->getDataDword());
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lriCmd++;
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EXPECT_EQ(CS_GPR_R6 + 4, lriCmd->getRegisterOffset());
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EXPECT_EQ(static_cast<uint32_t>(deferredTasksVa >> 32), lriCmd->getDataDword());
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lriCmd++;
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EXPECT_EQ(CS_GPR_R7, lriCmd->getRegisterOffset());
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EXPECT_EQ(0u, lriCmd->getDataDword());
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lriCmd++;
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EXPECT_EQ(CS_GPR_R7 + 4, lriCmd->getRegisterOffset());
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EXPECT_EQ(0u, lriCmd->getDataDword());
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lriCmd++;
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EXPECT_EQ(CS_GPR_R8, lriCmd->getRegisterOffset());
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EXPECT_EQ(8u, lriCmd->getDataDword());
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lriCmd++;
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EXPECT_EQ(CS_GPR_R8 + 4, lriCmd->getRegisterOffset());
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EXPECT_EQ(0u, lriCmd->getDataDword());
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auto miMathCmd = reinterpret_cast<MI_MATH *>(++lriCmd);
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EXPECT_EQ(8u, miMathCmd->DW0.BitField.DwordLength);
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auto miAluCmd = reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(++miMathCmd);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCA), miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_1), miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCB), miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_8), miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_SHL), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_STORE), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_8), miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_ACCU), miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCA), miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_8), miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCB), miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_6), miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_ADD), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_STOREIND), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_ACCU), miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_7), miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_FENCE_WR), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand2);
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// increment
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lriCmd = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(++miAluCmd);
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EXPECT_EQ(lriCmd->getRegisterOffset(), CS_GPR_R7);
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EXPECT_EQ(lriCmd->getDataDword(), 1u);
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lriCmd++;
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EXPECT_EQ(CS_GPR_R7 + 4, lriCmd->getRegisterOffset());
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EXPECT_EQ(0u, lriCmd->getDataDword());
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miMathCmd = reinterpret_cast<MI_MATH *>(++lriCmd);
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EXPECT_EQ(3u, miMathCmd->DW0.BitField.DwordLength);
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miAluCmd = reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(++miMathCmd);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCA), miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_1), miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_LOAD), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_SRCB), miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_7), miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_ADD), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(0u, miAluCmd->DW0.BitField.Operand2);
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miAluCmd++;
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::OPCODE_STORE), miAluCmd->DW0.BitField.ALUOpcode);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_1), miAluCmd->DW0.BitField.Operand1);
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EXPECT_EQ(static_cast<uint32_t>(AluRegisters::R_ACCU), miAluCmd->DW0.BitField.Operand2);
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}
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HWTEST_F(DirectSubmissionRelaxedOrderingTests, givenNotEnoughSpaceForTaskStoreSectionWhenDispatchingThenSwitchRingBuffers) {
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using Dispatcher = RenderDispatcher<FamilyType>;
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MockDirectSubmissionHw<FamilyType, Dispatcher> directSubmission(*pDevice->getDefaultEngine().commandStreamReceiver);
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directSubmission.initialize(true, false);
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directSubmission.ringCommandStream.getUsed();
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auto sizeToConsume = directSubmission.ringCommandStream.getAvailableSpace() -
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(directSubmission.getSizeDispatch() + directSubmission.getSizeEnd() + directSubmission.getSizeSwitchRingBufferSection());
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directSubmission.ringCommandStream.getSpace(sizeToConsume);
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auto oldAllocation = directSubmission.ringCommandStream.getGraphicsAllocation();
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FlushStampTracker flushStamp(true);
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directSubmission.dispatchCommandBuffer(batchBuffer, flushStamp);
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EXPECT_NE(oldAllocation, directSubmission.ringCommandStream.getGraphicsAllocation());
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}
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@@ -104,7 +104,8 @@ AllocationTypeTagTestCase allocationTypeTagValues[static_cast<int>(AllocationTyp
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{AllocationType::DEBUG_MODULE_AREA, "DBMDLARE"},
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{AllocationType::UNIFIED_SHARED_MEMORY, "USHRDMEM"},
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{AllocationType::GPU_TIMESTAMP_DEVICE_BUFFER, "GPUTSDBF"},
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{AllocationType::SW_TAG_BUFFER, "SWTAGBF"}};
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{AllocationType::SW_TAG_BUFFER, "SWTAGBF"},
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{AllocationType::DEFERRED_TASKS_LIST, "TSKLIST"}};
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class AllocationTypeTagString : public ::testing::TestWithParam<AllocationTypeTagTestCase> {};
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TEST_P(AllocationTypeTagString, givenGraphicsAllocationTypeWhenCopyTagToStorageInfoThenCorrectTagIsReturned) {
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@@ -582,6 +582,14 @@ TEST(MemoryManagerTest, givenPreemptionTypeWhenGetAllocationDataIsCalledThen48Bi
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EXPECT_TRUE(allocData.flags.resource48Bit);
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}
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TEST(MemoryManagerTest, givenDeferredTasksListTypeWhenGetAllocationDataIsCalledThen48BitResourceIsTrue) {
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AllocationData allocData;
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MockMemoryManager mockMemoryManager;
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AllocationProperties properties{mockRootDeviceIndex, 1, AllocationType::DEFERRED_TASKS_LIST, mockDeviceBitfield};
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mockMemoryManager.getAllocationData(allocData, properties, nullptr, mockMemoryManager.createStorageInfoFromProperties(properties));
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EXPECT_TRUE(allocData.flags.resource48Bit);
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}
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TEST(MemoryManagerTest, givenSharedContextImageTypeWhenGetAllocationDataIsCalledThenSystemMemoryIsRequested) {
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AllocationData allocData;
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MockMemoryManager mockMemoryManager;
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@@ -1094,6 +1102,7 @@ static const AllocationType allocationHaveToBeForcedTo48Bit[] = {
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AllocationType::TIMESTAMP_PACKET_TAG_BUFFER,
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AllocationType::RING_BUFFER,
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AllocationType::SEMAPHORE_BUFFER,
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AllocationType::DEFERRED_TASKS_LIST,
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};
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static const AllocationType allocationHaveNotToBeForcedTo48Bit[] = {
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@@ -212,6 +212,23 @@ TEST_F(MultiDeviceStorageInfoTest, givenSingleTileCsrWhenCreatingStorageInfoForP
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EXPECT_EQ(singleTileMask, storageInfo.pageTablesVisibility);
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}
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TEST_F(MultiDeviceStorageInfoTest, givenMultiTileCsrWhenCreatingStorageInfoForDeferredTasksListAllocationThenAllMemoryBankAreOnAndPageTableClonningIsNotRequired) {
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AllocationProperties properties{mockRootDeviceIndex, false, 0u, AllocationType::DEFERRED_TASKS_LIST, true, false, singleTileMask};
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auto storageInfo = memoryManager->createStorageInfoFromProperties(properties);
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EXPECT_FALSE(storageInfo.cloningOfPageTables);
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EXPECT_TRUE(storageInfo.tileInstanced);
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EXPECT_EQ(allTilesMask, storageInfo.memoryBanks);
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EXPECT_EQ(allTilesMask, storageInfo.pageTablesVisibility);
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}
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TEST_F(MultiDeviceStorageInfoTest, givenSingleTileCsrWhenCreatingStorageInfoForDeferredTasksListAllocationThenSingleMemoryBankIsOnAndPageTableClonningIsRequired) {
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AllocationProperties properties{mockRootDeviceIndex, false, 0u, AllocationType::DEFERRED_TASKS_LIST, false, false, singleTileMask};
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auto storageInfo = memoryManager->createStorageInfoFromProperties(properties);
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EXPECT_TRUE(storageInfo.cloningOfPageTables);
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EXPECT_EQ(singleTileMask, storageInfo.memoryBanks);
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EXPECT_EQ(singleTileMask, storageInfo.pageTablesVisibility);
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}
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TEST_F(MultiDeviceStorageInfoTest, whenCreatingStorageInfoForWorkPartitionSurfaceThenAllMemoryBankAreOnAndPageTableClonningIsNotRequired) {
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AllocationProperties properties{mockRootDeviceIndex, false, 0u, AllocationType::WORK_PARTITION_SURFACE, true, false, singleTileMask};
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auto storageInfo = memoryManager->createStorageInfoFromProperties(properties);
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