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Coherency patch cleanup

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Change-Id: I03be418f7e85e599162494e3570a40b470709292
This commit is contained in:
Dunajski, Bartosz
2018-03-28 19:55:17 +02:00
committed by sys_ocldev
parent 7039ababb9
commit 8d7e175b12
11 changed files with 8 additions and 164 deletions
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7
runtime/os_interface/linux/drm_buffer_object.cpp
View File

@@ -156,9 +156,6 @@ int BufferObject::exec(uint32_t used, size_t startOffset, unsigned int flags, bo
execbuf.batch_len = alignUp(used, 8);
execbuf.flags = flags;
if (drm->peekCoherencyDisablePatchActive() && !requiresCoherency) {
execbuf.flags |= I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
}
if (lowPriority) {
execbuf.rsvd1 = this->drm->lowPriorityContextId & I915_EXEC_CONTEXT_ID_MASK;
}
@@ -193,10 +190,6 @@ int BufferObject::pin(BufferObject *boToPin[], size_t numberOfBos) {
execbuf.buffer_count = boIndex + 1;
execbuf.batch_len = alignUp(static_cast<uint32_t>(sizeof(uint32_t)), 8);
if (drm->peekCoherencyDisablePatchActive()) {
execbuf.flags = execbuf.flags | I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
}
int err = 0;
int ret = this->drm->ioctl(DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
if (ret != 0) {

6
runtime/os_interface/linux/drm_neo.cpp
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@@ -115,12 +115,6 @@ int Drm::getMaxGpuFrequency(int &maxGpuFrequency) {
return 0;
}
void Drm::obtainCoherencyDisablePatchActive() {
int value = 0;
auto ret = getParamIoctl(I915_PRIVATE_PARAM_HAS_EXEC_FORCE_NON_COHERENT, &value);
coherencyDisablePatchActive = (ret == 0) && (value != 0);
}
std::string Drm::getSysFsPciPath(int deviceID) {
std::string nullPath;
std::string sysFsPciDirectory = Os::sysFsPciPath;

7
runtime/os_interface/linux/drm_neo.h
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@@ -33,10 +33,6 @@
struct GT_SYSTEM_INFO;
namespace OCLRT {
#define I915_PRIVATE_PARAM_HAS_EXEC_FORCE_NON_COHERENT (-1)
#define I915_PRIVATE_EXEC_FORCE_NON_COHERENT (1 << 31)
#define I915_CONTEXT_PRIVATE_PARAM_BOOST 0x80000000
class DeviceFactory;
@@ -74,8 +70,6 @@ class Drm {
bool is48BitAddressRangeSupported();
MOCKABLE_VIRTUAL bool hasPreemption();
bool setLowPriority();
bool peekCoherencyDisablePatchActive() { return coherencyDisablePatchActive; }
virtual void obtainCoherencyDisablePatchActive();
int getFileDescriptor() const { return fd; }
bool contextCreate();
void contextDestroy();
@@ -89,7 +83,6 @@ class Drm {
int deviceId;
int revisionId;
GTTYPE eGtType;
bool coherencyDisablePatchActive = false;
Drm(int fd) : lowPriorityContextId(0), fd(fd), deviceId(0), revisionId(0), eGtType(GTTYPE_UNDEFINED) {}
virtual ~Drm();

4
runtime/os_interface/linux/drm_null_device.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Intel Corporation
* Copyright (c) 2017 - 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -54,8 +54,6 @@ class DrmNullDevice : public Drm {
}
}
void obtainCoherencyDisablePatchActive() override { coherencyDisablePatchActive = true; }
protected:
DrmNullDevice(int fd) : Drm(fd), gpuTimestamp(0){};

5
runtime/os_interface/linux/hw_info_config.cpp
View File

@@ -131,7 +131,6 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
}
pSysInfo->SubSliceCount = static_cast<uint32_t>(subSliceCount);
drm->obtainCoherencyDisablePatchActive();
pSkuTable->ftrSVM = drm->is48BitAddressRangeSupported();
int maxGpuFreq = 0;
@@ -164,10 +163,8 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
outHwInfo->capabilityTable.maxRenderFrequency = maxGpuFreq;
outHwInfo->capabilityTable.ftrSvm = pSkuTable->ftrSVM;
bool platformCoherency = false;
HwHelper &hwHelper = HwHelper::get(pPlatform->eRenderCoreFamily);
hwHelper.setCapabilityCoherencyFlag(const_cast<const HardwareInfo *>(outHwInfo), platformCoherency);
outHwInfo->capabilityTable.ftrSupportsCoherency = (platformCoherency && drm->peekCoherencyDisablePatchActive());
outHwInfo->capabilityTable.ftrSupportsCoherency = false;
outHwInfo->capabilityTable.defaultEngineType = DebugManager.flags.NodeOrdinal.get() == -1
? outHwInfo->capabilityTable.defaultEngineType