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Coherency patch cleanup

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Change-Id: I03be418f7e85e599162494e3570a40b470709292
This commit is contained in:
Dunajski, Bartosz
2018-03-28 19:55:17 +02:00
committed by sys_ocldev
parent 7039ababb9
commit 8d7e175b12
11 changed files with 8 additions and 164 deletions
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7
runtime/os_interface/linux/drm_buffer_object.cpp
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@@ -156,9 +156,6 @@ int BufferObject::exec(uint32_t used, size_t startOffset, unsigned int flags, bo
execbuf.batch_len = alignUp(used, 8); execbuf.batch_len = alignUp(used, 8);
execbuf.flags = flags; execbuf.flags = flags;
if (drm->peekCoherencyDisablePatchActive() && !requiresCoherency) {
execbuf.flags |= I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
}
if (lowPriority) { if (lowPriority) {
execbuf.rsvd1 = this->drm->lowPriorityContextId & I915_EXEC_CONTEXT_ID_MASK; execbuf.rsvd1 = this->drm->lowPriorityContextId & I915_EXEC_CONTEXT_ID_MASK;
} }
@@ -193,10 +190,6 @@ int BufferObject::pin(BufferObject *boToPin[], size_t numberOfBos) {
execbuf.buffer_count = boIndex + 1; execbuf.buffer_count = boIndex + 1;
execbuf.batch_len = alignUp(static_cast<uint32_t>(sizeof(uint32_t)), 8); execbuf.batch_len = alignUp(static_cast<uint32_t>(sizeof(uint32_t)), 8);
if (drm->peekCoherencyDisablePatchActive()) {
execbuf.flags = execbuf.flags | I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
}
int err = 0; int err = 0;
int ret = this->drm->ioctl(DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); int ret = this->drm->ioctl(DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
if (ret != 0) { if (ret != 0) {

6
runtime/os_interface/linux/drm_neo.cpp
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@@ -115,12 +115,6 @@ int Drm::getMaxGpuFrequency(int &maxGpuFrequency) {
return 0; return 0;
} }
void Drm::obtainCoherencyDisablePatchActive() {
int value = 0;
auto ret = getParamIoctl(I915_PRIVATE_PARAM_HAS_EXEC_FORCE_NON_COHERENT, &value);
coherencyDisablePatchActive = (ret == 0) && (value != 0);
}
std::string Drm::getSysFsPciPath(int deviceID) { std::string Drm::getSysFsPciPath(int deviceID) {
std::string nullPath; std::string nullPath;
std::string sysFsPciDirectory = Os::sysFsPciPath; std::string sysFsPciDirectory = Os::sysFsPciPath;

7
runtime/os_interface/linux/drm_neo.h
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@@ -33,10 +33,6 @@
struct GT_SYSTEM_INFO; struct GT_SYSTEM_INFO;
namespace OCLRT { namespace OCLRT {
#define I915_PRIVATE_PARAM_HAS_EXEC_FORCE_NON_COHERENT (-1)
#define I915_PRIVATE_EXEC_FORCE_NON_COHERENT (1 << 31)
#define I915_CONTEXT_PRIVATE_PARAM_BOOST 0x80000000 #define I915_CONTEXT_PRIVATE_PARAM_BOOST 0x80000000
class DeviceFactory; class DeviceFactory;
@@ -74,8 +70,6 @@ class Drm {
bool is48BitAddressRangeSupported(); bool is48BitAddressRangeSupported();
MOCKABLE_VIRTUAL bool hasPreemption(); MOCKABLE_VIRTUAL bool hasPreemption();
bool setLowPriority(); bool setLowPriority();
bool peekCoherencyDisablePatchActive() { return coherencyDisablePatchActive; }
virtual void obtainCoherencyDisablePatchActive();
int getFileDescriptor() const { return fd; } int getFileDescriptor() const { return fd; }
bool contextCreate(); bool contextCreate();
void contextDestroy(); void contextDestroy();
@@ -89,7 +83,6 @@ class Drm {
int deviceId; int deviceId;
int revisionId; int revisionId;
GTTYPE eGtType; GTTYPE eGtType;
bool coherencyDisablePatchActive = false;
Drm(int fd) : lowPriorityContextId(0), fd(fd), deviceId(0), revisionId(0), eGtType(GTTYPE_UNDEFINED) {} Drm(int fd) : lowPriorityContextId(0), fd(fd), deviceId(0), revisionId(0), eGtType(GTTYPE_UNDEFINED) {}
virtual ~Drm(); virtual ~Drm();

4
runtime/os_interface/linux/drm_null_device.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2017, Intel Corporation * Copyright (c) 2017 - 2018, Intel Corporation
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -54,8 +54,6 @@ class DrmNullDevice : public Drm {
} }
} }
void obtainCoherencyDisablePatchActive() override { coherencyDisablePatchActive = true; }
protected: protected:
DrmNullDevice(int fd) : Drm(fd), gpuTimestamp(0){}; DrmNullDevice(int fd) : Drm(fd), gpuTimestamp(0){};

5
runtime/os_interface/linux/hw_info_config.cpp
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@@ -131,7 +131,6 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
} }
pSysInfo->SubSliceCount = static_cast<uint32_t>(subSliceCount); pSysInfo->SubSliceCount = static_cast<uint32_t>(subSliceCount);
drm->obtainCoherencyDisablePatchActive();
pSkuTable->ftrSVM = drm->is48BitAddressRangeSupported(); pSkuTable->ftrSVM = drm->is48BitAddressRangeSupported();
int maxGpuFreq = 0; int maxGpuFreq = 0;
@@ -164,10 +163,8 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
outHwInfo->capabilityTable.maxRenderFrequency = maxGpuFreq; outHwInfo->capabilityTable.maxRenderFrequency = maxGpuFreq;
outHwInfo->capabilityTable.ftrSvm = pSkuTable->ftrSVM; outHwInfo->capabilityTable.ftrSvm = pSkuTable->ftrSVM;
bool platformCoherency = false;
HwHelper &hwHelper = HwHelper::get(pPlatform->eRenderCoreFamily); HwHelper &hwHelper = HwHelper::get(pPlatform->eRenderCoreFamily);
hwHelper.setCapabilityCoherencyFlag(const_cast<const HardwareInfo *>(outHwInfo), platformCoherency); outHwInfo->capabilityTable.ftrSupportsCoherency = false;
outHwInfo->capabilityTable.ftrSupportsCoherency = (platformCoherency && drm->peekCoherencyDisablePatchActive());
outHwInfo->capabilityTable.defaultEngineType = DebugManager.flags.NodeOrdinal.get() == -1 outHwInfo->capabilityTable.defaultEngineType = DebugManager.flags.NodeOrdinal.get() == -1
? outHwInfo->capabilityTable.defaultEngineType ? outHwInfo->capabilityTable.defaultEngineType

9
unit_tests/linux/drm_null_device_tests.cpp
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2017, Intel Corporation * Copyright (c) 2017 - 2018, Intel Corporation
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -76,13 +76,6 @@ TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENcallGetDeviceIdTHENreturnProper
EXPECT_EQ(0x1916, deviceId); EXPECT_EQ(0x1916, deviceId);
} }
TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENpeekAndObtainCoherencyDisablePatchActiveTHENreturnNullDeviceValues) {
EXPECT_EQ(drmNullDevice->peekCoherencyDisablePatchActive(), false);
drmNullDevice->obtainCoherencyDisablePatchActive();
EXPECT_EQ(drmNullDevice->peekCoherencyDisablePatchActive(), true);
}
TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENcallIoctlTHENalwaysSuccess) { TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENcallIoctlTHENalwaysSuccess) {
EXPECT_EQ(drmNullDevice->ioctl(0, nullptr), 0); EXPECT_EQ(drmNullDevice->ioctl(0, nullptr), 0);
} }

1
unit_tests/os_interface/linux/device_command_stream_fixture.h
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@@ -80,7 +80,6 @@ class DrmMockCustom : public Drm {
IoctlResExt(int32_t no, int32_t res) : no(no), res(res) {} IoctlResExt(int32_t no, int32_t res) : no(no), res(res) {}
}; };
void overideCoherencyPatchActive(bool newCoherencyPatchActiveValue) { coherencyDisablePatchActive = newCoherencyPatchActiveValue; }
class Ioctls { class Ioctls {
public: public:

66
unit_tests/os_interface/linux/drm_buffer_object_tests.cpp
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@@ -86,30 +86,6 @@ TEST_F(DrmBufferObjectTest, exec) {
EXPECT_EQ(0u, mock->execBuffer.flags); EXPECT_EQ(0u, mock->execBuffer.flags);
} }
TEST_F(DrmBufferObjectTest, givenDrmWithCoherencyPatchActiveWhenExecIsCalledThenFlagsContainNonCoherentFlag) {
mock->ioctl_expected.total = 1;
mock->ioctl_res = 0;
mock->overideCoherencyPatchActive(true);
auto ret = bo->exec(0, 0, 0);
EXPECT_EQ(mock->ioctl_res, ret);
uint64_t expectedFlag = I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
uint64_t currentFlag = mock->execBuffer.flags;
EXPECT_EQ(expectedFlag, currentFlag);
}
TEST_F(DrmBufferObjectTest, givenDrmWithCoherencyPatchActiveWhenExecIsCalledWithCoherencyRequestThenFlagsDontContainNonCoherentFlag) {
mock->ioctl_expected.total = 1;
mock->ioctl_res = 0;
mock->overideCoherencyPatchActive(true);
auto ret = bo->exec(0, 0, 0, true);
EXPECT_EQ(mock->ioctl_res, ret);
uint64_t expectedFlag = 0;
uint64_t currentFlag = mock->execBuffer.flags;
EXPECT_EQ(expectedFlag, currentFlag);
}
TEST_F(DrmBufferObjectTest, exec_ioctlFailed) { TEST_F(DrmBufferObjectTest, exec_ioctlFailed) {
mock->ioctl_expected.total = 1; mock->ioctl_expected.total = 1;
mock->ioctl_res = -1; mock->ioctl_res = -1;
@@ -152,48 +128,6 @@ TEST_F(DrmBufferObjectTest, testExecObjectFlags) {
EXPECT_FALSE(execObject.flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS); EXPECT_FALSE(execObject.flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS);
} }
TEST_F(DrmBufferObjectTest, onPinBBhasOnlyBbEndAndForceNonCoherent) {
std::unique_ptr<uint32_t[]> buff(new uint32_t[1024]);
mock->ioctl_expected.total = 1;
mock->ioctl_res = 0;
mock->overideCoherencyPatchActive(true);
std::unique_ptr<BufferObject> boToPin(new TestedBufferObject(this->mock));
ASSERT_NE(nullptr, boToPin.get());
bo->setAddress(buff.get());
BufferObject *boArray[1] = {boToPin.get()};
auto ret = bo->pin(boArray, 1);
EXPECT_EQ(mock->ioctl_res, ret);
uint32_t bb_end = 0x05000000;
EXPECT_EQ(buff[0], bb_end);
EXPECT_GT(mock->execBuffer.batch_len, 0u);
uint32_t flag = I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
EXPECT_TRUE((mock->execBuffer.flags & flag) == flag);
bo->setAddress(nullptr);
}
TEST_F(DrmBufferObjectTest, onPinBBhasOnlyBbEndAndNoForceNonCoherent) {
std::unique_ptr<uint32_t[]> buff(new uint32_t[1024]);
mock->ioctl_expected.total = 1;
mock->ioctl_res = 0;
mock->overideCoherencyPatchActive(false);
std::unique_ptr<BufferObject> boToPin(new TestedBufferObject(this->mock));
ASSERT_NE(nullptr, boToPin.get());
bo->setAddress(buff.get());
BufferObject *boArray[1] = {boToPin.get()};
auto ret = bo->pin(boArray, 1);
EXPECT_EQ(mock->ioctl_res, ret);
uint32_t bb_end = 0x05000000;
EXPECT_EQ(buff[0], bb_end);
EXPECT_GT(mock->execBuffer.batch_len, 0u);
uint32_t flag = I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
EXPECT_TRUE((mock->execBuffer.flags & flag) == 0);
bo->setAddress(nullptr);
}
TEST_F(DrmBufferObjectTest, onPinIoctlFailed) { TEST_F(DrmBufferObjectTest, onPinIoctlFailed) {
std::unique_ptr<uint32_t[]> buff(new uint32_t[1024]); std::unique_ptr<uint32_t[]> buff(new uint32_t[1024]);

9
unit_tests/os_interface/linux/drm_mock.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2017, Intel Corporation * Copyright (c) 2017 - 2018, Intel Corporation
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -119,10 +119,6 @@ class Drm2 : public Drm {
return this->StoredRetVal; return this->StoredRetVal;
} }
#endif #endif
if (gp->param == I915_PRIVATE_PARAM_HAS_EXEC_FORCE_NON_COHERENT) {
*((int *)(gp->value)) = this->StoredDisableCoherencyPatchActive;
return this->StoredRetVal;
}
if (gp->param == I915_PARAM_HAS_ALIASING_PPGTT) { if (gp->param == I915_PARAM_HAS_ALIASING_PPGTT) {
*((int *)(gp->value)) = this->StoredPPGTT; *((int *)(gp->value)) = this->StoredPPGTT;
return this->StoredRetVal; return this->StoredRetVal;
@@ -184,8 +180,6 @@ class Drm2 : public Drm {
return 0; return 0;
} }
void overideCoherencyPatchActive(bool newCoherencyPatchActiveValue) { coherencyDisablePatchActive = newCoherencyPatchActiveValue; }
void setSysFsDefaultGpuPath(const char *path) { void setSysFsDefaultGpuPath(const char *path) {
sysFsDefaultGpuPathToRestore = sysFsDefaultGpuPath; sysFsDefaultGpuPathToRestore = sysFsDefaultGpuPath;
sysFsDefaultGpuPath = path; sysFsDefaultGpuPath = path;
@@ -244,7 +238,6 @@ class Drm2 : public Drm {
int StoredRetValForDeviceRevID = 0; int StoredRetValForDeviceRevID = 0;
int StoredRetValForPooledEU = 0; int StoredRetValForPooledEU = 0;
int StoredRetValForMinEUinPool = 0; int StoredRetValForMinEUinPool = 0;
int StoredDisableCoherencyPatchActive = 1;
int StoredPPGTT = 3; int StoredPPGTT = 3;
int StoredPreemptionSupport = 1; int StoredPreemptionSupport = 1;
int StoredMockPreemptionSupport = 0; int StoredMockPreemptionSupport = 0;

40
unit_tests/os_interface/linux/drm_tests.cpp
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@@ -131,46 +131,6 @@ TEST(DrmTest, GetRevisionID) {
delete pDrm; delete pDrm;
} }
TEST(DrmTest, GivenMockDrmWhenAskedForCoherencyStatusThenProperBitIsSet) {
Drm2 *pDrm = new Drm2;
EXPECT_NE(nullptr, pDrm);
EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
pDrm->obtainCoherencyDisablePatchActive();
EXPECT_TRUE(pDrm->peekCoherencyDisablePatchActive());
delete pDrm;
}
TEST(DrmTest, GivenMockDrmWhenAskedForCoherencyStatusThatPassThenDisabledIsReturned) {
Drm2 *pDrm = new Drm2;
pDrm->StoredDisableCoherencyPatchActive = 0;
EXPECT_NE(nullptr, pDrm);
EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
pDrm->obtainCoherencyDisablePatchActive();
EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
pDrm->StoredDisableCoherencyPatchActive = 1;
delete pDrm;
}
TEST(DrmTest, GivenMockDrmWhenAskedForCoherencyStatusThatFailsThenFalseIsReturned) {
Drm2 *pDrm = new Drm2;
pDrm->StoredRetVal = -1;
EXPECT_NE(nullptr, pDrm);
EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
pDrm->obtainCoherencyDisablePatchActive();
EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
pDrm->StoredRetVal = 0;
delete pDrm;
}
TEST(DrmTest, GivenMockDrmWhenAskedFor48BitAddressCorrectValueReturned) { TEST(DrmTest, GivenMockDrmWhenAskedFor48BitAddressCorrectValueReturned) {
Drm2 *pDrm = new Drm2; Drm2 *pDrm = new Drm2;
pDrm->StoredPPGTT = 3; pDrm->StoredPPGTT = 3;

18
unit_tests/os_interface/linux/hw_info_config_tests.cpp
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@@ -184,25 +184,15 @@ TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigEdramDetection) {
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrEDram); EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrEDram);
} }
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigCoherencyEnabled) { TEST_F(HwInfoConfigTestLinuxDummy, givenEnabledPlatformCoherencyWhenConfiguringHwInfoThenIgnoreAndSetAsDisabled) {
drm->StoredDeviceID = 21; drm->StoredDeviceID = 21;
drm->StoredDisableCoherencyPatchActive = 1;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
EXPECT_TRUE(outHwInfo.capabilityTable.ftrSupportsCoherency);
}
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigCoherencyDisabledByPlatform) {
drm->StoredDeviceID = 20;
drm->StoredDisableCoherencyPatchActive = 1;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface); int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret); EXPECT_EQ(0, ret);
EXPECT_FALSE(outHwInfo.capabilityTable.ftrSupportsCoherency); EXPECT_FALSE(outHwInfo.capabilityTable.ftrSupportsCoherency);
} }
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigCoherencyDisabledByDrm) { TEST_F(HwInfoConfigTestLinuxDummy, givenDisabledPlatformCoherencyWhenConfiguringHwInfoThenSetValidCapability) {
drm->StoredDeviceID = 21; drm->StoredDeviceID = 20;
drm->StoredDisableCoherencyPatchActive = 0;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface); int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret); EXPECT_EQ(0, ret);
EXPECT_FALSE(outHwInfo.capabilityTable.ftrSupportsCoherency); EXPECT_FALSE(outHwInfo.capabilityTable.ftrSupportsCoherency);
@@ -358,4 +348,4 @@ TEST_F(HwInfoConfigTestLinuxDummy, givenPointerToHwInfoWhenConfigureHwInfoCalled
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface); int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret); EXPECT_EQ(0, ret);
EXPECT_EQ(outHwInfo.pSysInfo->CsrSizeInMb * MemoryConstants::megaByte, outHwInfo.capabilityTable.requiredPreemptionSurfaceSize); EXPECT_EQ(outHwInfo.pSysInfo->CsrSizeInMb * MemoryConstants::megaByte, outHwInfo.capabilityTable.requiredPreemptionSurfaceSize);
} }