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Support ray tracing memory allocation extension in L0.

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Related-To: NEO-5579

Signed-off-by: Jim Snow <jim.m.snow@intel.com>
This commit is contained in:
Jim Snow
2022-07-27 06:51:10 +00:00
committed by Compute-Runtime-Automation
parent 8a6cf4fd4e
commit 8e9242dc92
3 changed files with 67 additions and 1 deletions
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12
level_zero/core/source/context/context_imp.cpp
View File

@@ -177,6 +177,10 @@ ze_result_t ContextImp::allocDeviceMem(ze_device_handle_t hDevice,
unifiedMemoryProperties.allocationFlags.flags.locallyUncachedResource = 1;
}
if (lookupTable.rayTracingMemory == true) {
unifiedMemoryProperties.allocationFlags.flags.resource48Bit = 1;
}
void *usmPtr =
this->driverHandle->svmAllocsManager->createUnifiedMemoryAllocation(size, unifiedMemoryProperties);
if (usmPtr == nullptr) {
@@ -204,6 +208,8 @@ ze_result_t ContextImp::allocSharedMem(ze_device_handle_t hDevice,
auto neoDevice = device->getNEODevice();
bool relaxedSizeAllowed = NEO::DebugManager.flags.AllowUnrestrictedSize.get();
bool rayTracingAllocation = false;
if (deviceDesc->pNext) {
const ze_base_desc_t *extendedDesc = reinterpret_cast<const ze_base_desc_t *>(deviceDesc->pNext);
if (extendedDesc->stype == ZE_STRUCTURE_TYPE_RELAXED_ALLOCATION_LIMITS_EXP_DESC) {
@@ -213,6 +219,8 @@ ze_result_t ContextImp::allocSharedMem(ze_device_handle_t hDevice,
return ZE_RESULT_ERROR_INVALID_ARGUMENT;
}
relaxedSizeAllowed = true;
} else if (extendedDesc->stype == ZE_STRUCTURE_TYPE_RAYTRACING_MEM_ALLOC_EXT_DESC) {
rayTracingAllocation = true;
}
}
@@ -265,6 +273,10 @@ ze_result_t ContextImp::allocSharedMem(ze_device_handle_t hDevice,
unifiedMemoryProperties.allocationFlags.allocFlags.usmInitialPlacementCpu = 1;
}
if (rayTracingAllocation) {
unifiedMemoryProperties.allocationFlags.flags.resource48Bit = 1;
}
void *usmPtr = nullptr;
if (hostDesc->flags & ZEX_HOST_MEM_ALLOC_FLAG_USE_HOST_PTR) {
unifiedMemoryProperties.allocationFlags.hostptr = reinterpret_cast<uintptr_t>(*ptr);

5
level_zero/core/source/helpers/properties_parser.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -71,6 +71,7 @@ struct StructuresLookupTable {
bool relaxedSizeAllowed;
bool compressedHint;
bool uncompressedHint;
bool rayTracingMemory;
};
inline ze_result_t prepareL0StructuresLookupTable(StructuresLookupTable &lookupTable, const void *desc) {
@@ -132,6 +133,8 @@ inline ze_result_t prepareL0StructuresLookupTable(StructuresLookupTable &lookupT
} else {
return ZE_RESULT_ERROR_UNSUPPORTED_ENUMERATION;
}
} else if (extendedDesc->stype == ZE_STRUCTURE_TYPE_RAYTRACING_MEM_ALLOC_EXT_DESC) {
lookupTable.rayTracingMemory = true;
} else {
return ZE_RESULT_ERROR_UNSUPPORTED_ENUMERATION;
}