Initial DG2 support

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>

level_zero/core/source/xe_hpg_core/CMakeLists.txt

@@ -0,0 +1,21 @@
+#
+# Copyright (C) 2021 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_XE_HPG_CORE)
+  set(HW_SOURCES_XE_HPG_CORE
+      ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+      ${CMAKE_CURRENT_SOURCE_DIR}/debugger_xe_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/image_xe_hpg_core.inl
+      ${CMAKE_CURRENT_SOURCE_DIR}/sampler_xe_hpg_core.inl
+      ${CMAKE_CURRENT_SOURCE_DIR}/enable_family_full_l0_xe_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/l0_hw_helper_xe_hpg_core.cpp
+  )
+
+  add_subdirectories()
+
+  target_sources(${L0_STATIC_LIB_NAME} PRIVATE ${HW_SOURCES_XE_HPG_CORE})
+  set_property(GLOBAL PROPERTY L0_HW_SOURCES_XE_HPG_CORE ${HW_SOURCES_XE_HPG_CORE})
+endif()

level_zero/core/source/xe_hpg_core/debugger_xe_hpg_core.cpp

@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/core/source/debugger/debugger_l0.inl"
+
+namespace NEO {
+struct XE_HPG_COREFamily;
+using GfxFamily = XE_HPG_COREFamily;
+
+} // namespace NEO
+
+namespace L0 {
+template class DebuggerL0Hw<NEO::GfxFamily>;
+DebuggerL0PopulateFactory<IGFX_XE_HPG_CORE, NEO::GfxFamily> debuggerXeHpgCore;
+} // namespace L0

level_zero/core/source/xe_hpg_core/dg2/CMakeLists.txt

@@ -0,0 +1,19 @@
+#
+# Copyright (C) 2021 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_DG2)
+  set(HW_SOURCES_XE_HPG_CORE
+      ${HW_SOURCES_XE_HPG_CORE}
+      ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+      ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_dg2.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_dg2.h
+      ${CMAKE_CURRENT_SOURCE_DIR}/cmdqueue_dg2.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/kernel_dg2.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/image_dg2.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/sampler_dg2.cpp
+      PARENT_SCOPE
+  )
+endif()

level_zero/core/source/xe_hpg_core/dg2/cmdlist_dg2.cpp

@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "cmdlist_dg2.h"
+
+#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
+#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
+#include "level_zero/core/source/cmdlist/cmdlist_hw_xehp_and_later.inl"
+
+#include "cmdlist_extended.inl"
+
+namespace L0 {
+
+template struct CommandListCoreFamily<IGFX_XE_HPG_CORE>;
+
+static CommandListPopulateFactory<IGFX_DG2, CommandListProductFamily<IGFX_DG2>>
+    populateDG2;
+
+static CommandListImmediatePopulateFactory<IGFX_DG2, CommandListImmediateProductFamily<IGFX_DG2>>
+    populateDG2Immediate;
+
+} // namespace L0

level_zero/core/source/xe_hpg_core/dg2/cmdlist_dg2.h

@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
+#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.h"
+
+namespace L0 {
+template <>
+struct CommandListImmediateProductFamily<IGFX_DG2> : public CommandListCoreFamilyImmediate<IGFX_XE_HPG_CORE> {
+    using CommandListCoreFamilyImmediate::CommandListCoreFamilyImmediate;
+};
+template <>
+struct CommandListProductFamily<IGFX_DG2> : public CommandListCoreFamily<IGFX_XE_HPG_CORE> {
+    using CommandListCoreFamily::CommandListCoreFamily;
+    void clearComputeModePropertiesIfNeeded(bool requiresCoherency, uint32_t numGrfRequired, uint32_t threadArbitrationPolicy) override {
+        finalStreamState.stateComputeMode = {};
+        finalStreamState.stateComputeMode.setProperties(requiresCoherency, numGrfRequired, threadArbitrationPolicy);
+    }
+};
+
+} // namespace L0

level_zero/core/source/xe_hpg_core/dg2/cmdqueue_dg2.cpp

@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe_hpg_core/hw_cmds.h"
+#include "shared/source/xe_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/cmdqueue/cmdqueue_hw.inl"
+#include "level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl"
+
+#include "cmdqueue_extended.inl"
+
+namespace L0 {
+template struct CommandQueueHw<IGFX_XE_HPG_CORE>;
+static CommandQueuePopulateFactory<IGFX_DG2, CommandQueueHw<IGFX_XE_HPG_CORE>>
+    populateDG2;
+
+} // namespace L0

level_zero/core/source/xe_hpg_core/dg2/image_dg2.cpp

@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/core/source/xe_hpg_core/image_xe_hpg_core.inl"
+
+namespace L0 {
+
+template <>
+struct ImageProductFamily<IGFX_DG2> : public ImageCoreFamily<IGFX_XE_HPG_CORE> {
+    using ImageCoreFamily::ImageCoreFamily;
+
+    ze_result_t initialize(Device *device, const ze_image_desc_t *desc) override {
+        return ImageCoreFamily<IGFX_XE_HPG_CORE>::initialize(device, desc);
+    };
+};
+
+static ImagePopulateFactory<IGFX_DG2, ImageProductFamily<IGFX_DG2>> populateDG2;
+
+} // namespace L0

level_zero/core/source/xe_hpg_core/dg2/kernel_dg2.cpp

@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/core/source/kernel/kernel_hw.h"
+
+namespace L0 {
+
+static KernelPopulateFactory<IGFX_DG2, KernelHw<IGFX_XE_HPG_CORE>> populateDG2;
+
+} // namespace L0

level_zero/core/source/xe_hpg_core/dg2/sampler_dg2.cpp

@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/debug_settings/debug_settings_manager.h"
+
+#include "level_zero/core/source/xe_hpg_core/sampler_xe_hpg_core.inl"
+
+namespace L0 {
+template struct SamplerCoreFamily<IGFX_XE_HPG_CORE>;
+template <>
+struct SamplerProductFamily<IGFX_DG2> : public SamplerCoreFamily<IGFX_XE_HPG_CORE> {
+    using SamplerCoreFamily::SamplerCoreFamily;
+    void appendSamplerStateParams(SAMPLER_STATE *state) override {
+        if (NEO::DebugManager.flags.ForceSamplerLowFilteringPrecision.get()) {
+            state->setLowQualityFilter(SAMPLER_STATE::LOW_QUALITY_FILTER_ENABLE);
+        }
+    }
+    ze_result_t initialize(Device *device, const ze_sampler_desc_t *desc) override {
+        return SamplerCoreFamily<IGFX_XE_HPG_CORE>::initialize(device, desc);
+    };
+};
+
+static SamplerPopulateFactory<IGFX_DG2, SamplerProductFamily<IGFX_DG2>> populateDG2;
+
+} // namespace L0

level_zero/core/source/xe_hpg_core/enable_family_full_l0_xe_hpg_core.cpp

@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/command_stream/aub_command_stream_receiver_hw.h"
+#include "shared/source/command_stream/command_stream_receiver_hw.h"
+#include "shared/source/command_stream/tbx_command_stream_receiver_hw.h"
+#include "shared/source/helpers/populate_factory.h"
+
+#include "level_zero/core/source/helpers/l0_populate_factory.h"
+#include "level_zero/core/source/hw_helpers/l0_hw_helper.h"
+
+namespace NEO {
+
+typedef XE_HPG_COREFamily Family;
+
+struct EnableL0XeHpgCore {
+    EnableL0XeHpgCore() {
+        populateFactoryTable<AUBCommandStreamReceiverHw<Family>>();
+        populateFactoryTable<TbxCommandStreamReceiverHw<Family>>();
+        populateFactoryTable<CommandStreamReceiverHw<Family>>();
+        L0::populateFactoryTable<L0::L0HwHelperHw<Family>>();
+    }
+};
+
+static EnableL0XeHpgCore enable;
+} // namespace NEO

level_zero/core/source/xe_hpg_core/image_xe_hpg_core.inl

@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe_hpg_core/hw_cmds.h"
+#include "shared/source/xe_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/image/image_hw.inl"

level_zero/core/source/xe_hpg_core/l0_hw_helper_xe_hpg_core.cpp

@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/core/source/helpers/l0_populate_factory.h"
+#include "level_zero/core/source/hw_helpers/l0_hw_helper_base.inl"
+#include "level_zero/core/source/hw_helpers/l0_hw_helper_skl_and_later.inl"
+
+#include "hw_cmds.h"
+
+namespace L0 {
+
+using Family = NEO::XE_HPG_COREFamily;
+static auto gfxCore = IGFX_XE_HPG_CORE;
+
+template <>
+void populateFactoryTable<L0HwHelperHw<Family>>() {
+    extern L0HwHelper *l0HwHelperFactory[IGFX_MAX_CORE];
+    l0HwHelperFactory[gfxCore] = &L0HwHelperHw<Family>::get();
+}
+
+template <>
+bool L0HwHelperHw<Family>::isResumeWARequired() {
+    return true;
+}
+
+// clang-format off
+#include "level_zero/core/source/hw_helpers/l0_hw_helper_tgllp_plus.inl"
+// clang-format on
+
+template class L0HwHelperHw<Family>;
+
+} // namespace L0

level_zero/core/source/xe_hpg_core/sampler_xe_hpg_core.inl

@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2021 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe_hpg_core/hw_cmds.h"
+#include "shared/source/xe_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/sampler/sampler_hw.inl"