Don't reduce LWS if SIMD32 is being used

Don't divide max kernel work group size by 2
if it's using SIMD 32

Resolves: NEO-6429

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
This commit is contained in:
Szymon Morek
2022-01-05 16:05:53 +00:00
committed by Compute-Runtime-Automation
parent 8729521769
commit 967d8a56fe
2 changed files with 16 additions and 5 deletions

View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2021 Intel Corporation
* Copyright (C) 2018-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -2780,12 +2780,14 @@ bool Kernel::areMultipleSubDevicesInContext() const {
void Kernel::reconfigureKernel() {
auto &kernelDescriptor = kernelInfo.kernelDescriptor;
if (kernelDescriptor.kernelAttributes.numGrfRequired == GrfConfig::LargeGrfNumber) {
if (kernelDescriptor.kernelAttributes.numGrfRequired == GrfConfig::LargeGrfNumber &&
kernelDescriptor.kernelAttributes.simdSize != 32) {
maxKernelWorkGroupSize >>= 1;
}
this->containsStatelessWrites = kernelDescriptor.kernelAttributes.flags.usesStatelessWrites;
this->specialPipelineSelectMode = kernelDescriptor.kernelAttributes.flags.usesSpecialPipelineSelectMode;
}
bool Kernel::requiresCacheFlushCommand(const CommandQueue &commandQueue) const {
if (false == HwHelper::cacheFlushAfterWalkerSupported(commandQueue.getDevice().getHardwareInfo())) {
return false;