mirror of
https://github.com/intel/compute-runtime.git
synced 2026-01-03 23:03:02 +08:00
Revert "feature: Improving information transfer about the copy engine"
This reverts commit 17ffdff4f1.
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
This commit is contained in:
committed by
Compute-Runtime-Automation
parent
c2be925419
commit
9b652f4a34
@@ -680,45 +680,6 @@ HWTEST2_F(CommandEncoderTests, whenUsingDefaultFilteringAndAppendSamplerStatePar
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EXPECT_EQ(SAMPLER_STATE::LOW_QUALITY_FILTER_DISABLE, state.getLowQualityFilter());
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}
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HWTEST2_F(CommandEncoderTests, givenMiStoreRegisterMemwhenRemapAndIsBcsThenRegisterOffsetsBcs0Base, IsAtLeastGen12lp) {
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using MI_STORE_REGISTER_MEM = typename FamilyType::MI_STORE_REGISTER_MEM;
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uint64_t baseAddr = 0x10;
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uint32_t offset = 0x20;
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constexpr size_t bufferSize = 256;
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uint8_t buffer[bufferSize];
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LinearStream cmdStream(buffer, bufferSize);
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auto buf = cmdStream.getSpaceForCmd<MI_STORE_REGISTER_MEM>();
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bool remap = true;
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bool isBcs = true;
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EncodeStoreMMIO<FamilyType>::encode(buf, offset, baseAddr, true, remap, isBcs);
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auto storeRegMem = genCmdCast<MI_STORE_REGISTER_MEM *>(buffer);
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ASSERT_NE(nullptr, storeRegMem);
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EXPECT_EQ(storeRegMem->getRegisterAddress(), RegisterOffsets::bcs0Base + offset);
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remap = true;
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isBcs = false;
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EncodeStoreMMIO<FamilyType>::encode(buf, offset, baseAddr, true, remap, isBcs);
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storeRegMem = genCmdCast<MI_STORE_REGISTER_MEM *>(buffer);
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ASSERT_NE(nullptr, storeRegMem);
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EXPECT_EQ(storeRegMem->getRegisterAddress(), offset);
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remap = false;
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isBcs = true;
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EncodeStoreMMIO<FamilyType>::encode(buf, offset, baseAddr, true, remap, isBcs);
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storeRegMem = genCmdCast<MI_STORE_REGISTER_MEM *>(buffer);
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ASSERT_NE(nullptr, storeRegMem);
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EXPECT_EQ(storeRegMem->getRegisterAddress(), offset);
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remap = false;
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isBcs = false;
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EncodeStoreMMIO<FamilyType>::encode(buf, offset, baseAddr, true, remap, isBcs);
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storeRegMem = genCmdCast<MI_STORE_REGISTER_MEM *>(buffer);
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ASSERT_NE(nullptr, storeRegMem);
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EXPECT_EQ(storeRegMem->getRegisterAddress(), offset);
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}
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HWTEST2_F(CommandEncoderTests, whenForcingLowQualityFilteringAndAppendSamplerStateParamsThenEnableLowQualityFilter, IsAtLeastGen12lp) {
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DebugManagerStateRestore dbgRestore;
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@@ -750,7 +750,7 @@ HWTEST_F(DirectSubmissionTest, givenDirectSubmissionAvailableWhenProgrammingEndi
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uint8_t buffer[128];
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mockCsr->commandStream.replaceBuffer(&buffer[0], 128u);
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mockCsr->commandStream.replaceGraphicsAllocation(&mockAllocation);
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mockCsr->programEndingCmd(mockCsr->commandStream, &location, ret, false, false);
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mockCsr->programEndingCmd(mockCsr->commandStream, &location, ret, false);
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EXPECT_EQ(sizeof(MI_BATCH_BUFFER_START), mockCsr->commandStream.getUsed());
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DispatchFlags dispatchFlags = DispatchFlagsHelper::createDefaultDispatchFlags();
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@@ -794,7 +794,7 @@ HWTEST_F(DirectSubmissionTest, givenDebugFlagSetWhenProgrammingEndingCommandThen
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auto currectBbStartCmd = reinterpret_cast<MI_BATCH_BUFFER_START *>(cmdStream.getSpace(0));
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uint64_t expectedGpuVa = cmdStream.getGraphicsAllocation()->getGpuAddress() + cmdStream.getUsed();
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mockCsr->programEndingCmd(cmdStream, &location, ret, false, false);
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mockCsr->programEndingCmd(cmdStream, &location, ret, false);
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EncodeNoop<FamilyType>::alignToCacheLine(cmdStream);
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if (value == 0) {
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@@ -2163,15 +2163,15 @@ HWTEST2_F(DirectSubmissionRelaxedOrderingTests, givenBcsRelaxedOrderingEnabledWh
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auto endingPtr = commandStream.getSpace(0);
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ultCsr->programEndingCmd(commandStream, &endingPtr, true, true, true);
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ultCsr->programEndingCmd(commandStream, &endingPtr, true, true);
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auto lrrCmd = reinterpret_cast<MI_LOAD_REGISTER_REG *>(commandStream.getCpuBase());
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EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR3);
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EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0);
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EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR3);
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EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0);
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lrrCmd++;
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EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR3 + 4);
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EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0 + 4);
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EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR3 + 4);
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EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0 + 4);
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auto bbStartCmd = reinterpret_cast<MI_BATCH_BUFFER_START *>(++lrrCmd);
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EXPECT_EQ(1u, bbStartCmd->getIndirectAddressEnable());
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@@ -2196,7 +2196,7 @@ HWTEST2_F(DirectSubmissionRelaxedOrderingTests, givenBcsRelaxedOrderingDisabledW
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auto endingPtr = commandStream.getSpace(0);
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ultCsr->programEndingCmd(commandStream, &endingPtr, true, false, true);
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ultCsr->programEndingCmd(commandStream, &endingPtr, true, false);
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auto bbStartCmd = genCmdCast<MI_BATCH_BUFFER_START *>(commandStream.getCpuBase());
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ASSERT_NE(nullptr, bbStartCmd);
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@@ -2219,15 +2219,15 @@ HWTEST2_F(DirectSubmissionRelaxedOrderingTests, whenProgrammingEndingCmdsThenSet
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auto endingPtr = commandStream.getSpace(0);
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ultCsr->programEndingCmd(commandStream, &endingPtr, true, true, true);
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ultCsr->programEndingCmd(commandStream, &endingPtr, true, true);
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auto lrrCmd = reinterpret_cast<MI_LOAD_REGISTER_REG *>(commandStream.getCpuBase());
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EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR3);
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EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0);
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EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR3);
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EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0);
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lrrCmd++;
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EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR3 + 4);
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EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0 + 4);
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EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR3 + 4);
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EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0 + 4);
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auto bbStartCmd = reinterpret_cast<MI_BATCH_BUFFER_START *>(++lrrCmd);
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EXPECT_EQ(1u, bbStartCmd->getIndirectAddressEnable());
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@@ -2248,7 +2248,7 @@ HWTEST2_F(DirectSubmissionRelaxedOrderingTests, givenBbWithoutRelaxedOrderingDep
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auto endingPtr = commandStream.getSpace(0);
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ultCsr->programEndingCmd(commandStream, &endingPtr, true, false, false);
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ultCsr->programEndingCmd(commandStream, &endingPtr, true, false);
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auto bbStartCmd = genCmdCast<MI_BATCH_BUFFER_START *>(commandStream.getCpuBase());
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ASSERT_NE(nullptr, bbStartCmd);
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@@ -119,8 +119,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHPAndLaterHardwareCommandsTest, givenWorkloadPart
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offset,
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gpuAddress,
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true,
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nullptr,
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false);
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nullptr);
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auto storeRegMem = genCmdCast<MI_STORE_REGISTER_MEM *>(buffer);
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ASSERT_NE(nullptr, storeRegMem);
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@@ -132,8 +131,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHPAndLaterHardwareCommandsTest, givenWorkloadPart
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offset,
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gpuAddress,
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true,
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&outCmdBuffer,
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false);
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&outCmdBuffer);
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storeRegMem = genCmdCast<MI_STORE_REGISTER_MEM *>(ptrOffset(buffer, beforeEncode));
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ASSERT_NE(nullptr, storeRegMem);
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@@ -47,7 +47,7 @@ HWTEST_F(CommandSetMMIOTest, WhenProgrammingThenLoadRegisterImmIsUsed) {
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}
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HWTEST_F(CommandSetMMIOTest, WhenProgrammingThenLoadRegisterMemIsUsed) {
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), 0x2000, 0xDEADBEEFCAF0, false);
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), 0x2000, 0xDEADBEEFCAF0);
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GenCmdList commands;
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CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer->getCommandStream()->getCpuBase(), 0), cmdContainer->getCommandStream()->getUsed());
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@@ -63,7 +63,7 @@ HWTEST_F(CommandSetMMIOTest, WhenProgrammingThenLoadRegisterMemIsUsed) {
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}
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HWTEST_F(CommandSetMMIOTest, WhenProgrammingThenLoadRegisterRegIsUsed) {
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EncodeSetMMIO<FamilyType>::encodeREG(*cmdContainer.get(), 0x2000, 0x2000, false);
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EncodeSetMMIO<FamilyType>::encodeREG(*cmdContainer.get(), 0x2000, 0x2000);
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GenCmdList commands;
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CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer->getCommandStream()->getCpuBase(), 0), cmdContainer->getCommandStream()->getUsed());
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@@ -99,7 +99,7 @@ HWTEST2_F(CommandSetMMIOTest, givenRegisterWithinRemapRangeWhenEncodingLoadingMM
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for (uint32_t offset = remapApplicableOffsets[2 * i]; offset < remapApplicableOffsets[2 * i + 1]; offset += 32) {
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MI_LOAD_REGISTER_MEM *miLoadReg = reinterpret_cast<MI_LOAD_REGISTER_MEM *>(cmdContainer->getCommandStream()->getSpace(0));
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), offset, 0xDEADBEEFCAF0, false);
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), offset, 0xDEADBEEFCAF0);
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EXPECT_EQ(offset, miLoadReg->getRegisterAddress());
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EXPECT_EQ(0xDEADBEEFCAF0u, miLoadReg->getMemoryAddress());
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@@ -109,7 +109,7 @@ HWTEST2_F(CommandSetMMIOTest, givenRegisterWithinRemapRangeWhenEncodingLoadingMM
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{
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MI_LOAD_REGISTER_MEM *miLoadReg = reinterpret_cast<MI_LOAD_REGISTER_MEM *>(cmdContainer->getCommandStream()->getSpace(0));
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), 0x3000, 0xDEADBEEFCAF0, false);
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), 0x3000, 0xDEADBEEFCAF0);
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EXPECT_EQ(0x3000u, miLoadReg->getRegisterAddress());
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EXPECT_EQ(0xDEADBEEFCAF0u, miLoadReg->getMemoryAddress());
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@@ -117,7 +117,7 @@ HWTEST2_F(CommandSetMMIOTest, givenRegisterWithinRemapRangeWhenEncodingLoadingMM
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}
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{
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MI_LOAD_REGISTER_MEM *miLoadReg = reinterpret_cast<MI_LOAD_REGISTER_MEM *>(cmdContainer->getCommandStream()->getSpace(0));
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), 0x4300, 0xDEADBEEFCAF0, false);
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), 0x4300, 0xDEADBEEFCAF0);
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EXPECT_EQ(0x4300u, miLoadReg->getRegisterAddress());
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EXPECT_EQ(0xDEADBEEFCAF0u, miLoadReg->getMemoryAddress());
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@@ -125,7 +125,7 @@ HWTEST2_F(CommandSetMMIOTest, givenRegisterWithinRemapRangeWhenEncodingLoadingMM
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}
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{
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MI_LOAD_REGISTER_MEM *miLoadReg = reinterpret_cast<MI_LOAD_REGISTER_MEM *>(cmdContainer->getCommandStream()->getSpace(0));
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), 0x5000, 0xDEADBEEFCAF0, false);
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EncodeSetMMIO<FamilyType>::encodeMEM(*cmdContainer.get(), 0x5000, 0xDEADBEEFCAF0);
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EXPECT_EQ(0x5000u, miLoadReg->getRegisterAddress());
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EXPECT_EQ(0xDEADBEEFCAF0u, miLoadReg->getMemoryAddress());
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@@ -143,7 +143,7 @@ HWTEST2_F(CommandSetMMIOTest, givenRegisterWithinRemapRangeWhenEncodingLoadingMM
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for (int i = 0; i < 3; i++) {
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for (uint32_t offset = remapApplicableOffsets[2 * i]; offset < remapApplicableOffsets[2 * i + 1]; offset += 32) {
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MI_LOAD_REGISTER_REG *miLoadReg = reinterpret_cast<MI_LOAD_REGISTER_REG *>(cmdContainer->getCommandStream()->getSpace(0));
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EncodeSetMMIO<FamilyType>::encodeREG(*cmdContainer.get(), offset, offset, false);
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EncodeSetMMIO<FamilyType>::encodeREG(*cmdContainer.get(), offset, offset);
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EXPECT_EQ(offset, miLoadReg->getSourceRegisterAddress());
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EXPECT_EQ(offset, miLoadReg->getDestinationRegisterAddress());
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@@ -154,7 +154,7 @@ HWTEST2_F(CommandSetMMIOTest, givenRegisterWithinRemapRangeWhenEncodingLoadingMM
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{
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MI_LOAD_REGISTER_REG *miLoadReg = reinterpret_cast<MI_LOAD_REGISTER_REG *>(cmdContainer->getCommandStream()->getSpace(0));
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EncodeSetMMIO<FamilyType>::encodeREG(*cmdContainer.get(), 0x1000, 0x2500, false);
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EncodeSetMMIO<FamilyType>::encodeREG(*cmdContainer.get(), 0x1000, 0x2500);
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EXPECT_EQ(0x2500u, miLoadReg->getSourceRegisterAddress());
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EXPECT_EQ(0x1000u, miLoadReg->getDestinationRegisterAddress());
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@@ -163,7 +163,7 @@ HWTEST2_F(CommandSetMMIOTest, givenRegisterWithinRemapRangeWhenEncodingLoadingMM
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}
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{
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MI_LOAD_REGISTER_REG *miLoadReg = reinterpret_cast<MI_LOAD_REGISTER_REG *>(cmdContainer->getCommandStream()->getSpace(0));
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EncodeSetMMIO<FamilyType>::encodeREG(*cmdContainer.get(), 0x2200, 0x4000, false);
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EncodeSetMMIO<FamilyType>::encodeREG(*cmdContainer.get(), 0x2200, 0x4000);
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EXPECT_EQ(0x4000u, miLoadReg->getSourceRegisterAddress());
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EXPECT_EQ(0x2200u, miLoadReg->getDestinationRegisterAddress());
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@@ -1898,7 +1898,7 @@ HWTEST_F(GfxCoreHelperTest, whenEncodeAdditionalTimestampOffsetsThenNothingEncod
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LinearStream stream(streamBuffer, bufferSize);
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uint64_t fstAddress = 0;
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uint64_t sndAddress = 0;
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MemorySynchronizationCommands<FamilyType>::encodeAdditionalTimestampOffsets(stream, fstAddress, sndAddress, false);
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MemorySynchronizationCommands<FamilyType>::encodeAdditionalTimestampOffsets(stream, fstAddress, sndAddress);
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HardwareParse hwParser;
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hwParser.parseCommands<FamilyType>(stream, 0);
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@@ -89,7 +89,7 @@ HWTEST2_F(GfxCoreHelperXe2AndLaterTests, givenAtLeastXe2HpgWhenEncodeAdditionalT
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LinearStream stream(streamBuffer, bufferSize);
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uint64_t fstAddress = 12;
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uint64_t sndAddress = 100;
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MemorySynchronizationCommands<FamilyType>::encodeAdditionalTimestampOffsets(stream, fstAddress, sndAddress, false);
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MemorySynchronizationCommands<FamilyType>::encodeAdditionalTimestampOffsets(stream, fstAddress, sndAddress);
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HardwareParse hwParser;
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hwParser.parseCommands<FamilyType>(stream, 0);
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