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Move some shared tests to shared

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Tests that are not specific to openCL or level zero

Related-To: NEO-5161

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
This commit is contained in:
Dominik Dabek
2021-05-13 13:27:50 +00:00
committed by Compute-Runtime-Automation
parent 074fc1d60f
commit a5d38170ad
70 changed files with 135 additions and 95 deletions
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2
opencl/source/command_stream/aub_command_stream_receiver_hw.h
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@@ -9,11 +9,11 @@
#include "shared/source/aub/aub_center.h"
#include "shared/source/helpers/array_count.h"
#include "shared/source/memory_manager/os_agnostic_memory_manager.h"
#include "shared/source/memory_manager/page_table.h"
#include "shared/source/memory_manager/physical_address_allocator.h"
#include "shared/source/utilities/spinlock.h"
#include "opencl/source/command_stream/aub_command_stream_receiver.h"
#include "opencl/source/memory_manager/page_table.h"
#include "aub_mapper.h"
#include "command_stream_receiver_simulated_hw.h"

2
opencl/source/command_stream/tbx_command_stream_receiver_hw.h
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@@ -8,9 +8,9 @@
#pragma once
#include "shared/source/memory_manager/address_mapper.h"
#include "shared/source/memory_manager/os_agnostic_memory_manager.h"
#include "shared/source/memory_manager/page_table.h"
#include "opencl/source/command_stream/tbx_command_stream_receiver.h"
#include "opencl/source/memory_manager/page_table.h"
#include "aub_mapper.h"
#include "command_stream_receiver_simulated_hw.h"

3
opencl/source/memory_manager/CMakeLists.txt
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@@ -9,9 +9,6 @@ set(RUNTIME_SRCS_MEMORY_MANAGER
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}/compression_selector_ocl.cpp
${CMAKE_CURRENT_SOURCE_DIR}/cpu_page_fault_manager_memory_sync.cpp
${CMAKE_CURRENT_SOURCE_DIR}/mem_obj_surface.h
${CMAKE_CURRENT_SOURCE_DIR}/page_table.cpp
${CMAKE_CURRENT_SOURCE_DIR}/page_table.h
${CMAKE_CURRENT_SOURCE_DIR}/page_table.inl
)
target_sources(${NEO_STATIC_LIB_NAME} PRIVATE ${RUNTIME_SRCS_MEMORY_MANAGER})

70
opencl/source/memory_manager/page_table.cpp
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@@ -1,70 +0,0 @@
/*
* Copyright (C) 2018-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "opencl/source/memory_manager/page_table.h"
#include "shared/source/aub_mem_dump/page_table_entry_bits.h"
#include "opencl/source/memory_manager/page_table.inl"
namespace NEO {
uintptr_t PTE::map(uintptr_t vm, size_t size, uint64_t entryBits, uint32_t memoryBank) {
const size_t shift = 12;
const auto mask = static_cast<uint32_t>(maxNBitValue(bits));
size_t indexStart = (vm >> shift) & mask;
size_t indexEnd = ((vm + size - 1) >> shift) & mask;
uintptr_t res = -1;
bool updateEntryBits = entryBits != PageTableEntry::nonValidBits;
uint64_t newEntryBits = entryBits & MemoryConstants::pageMask;
newEntryBits |= 0x1;
for (size_t index = indexStart; index <= indexEnd; index++) {
if (entries[index] == 0x0) {
uint64_t tmp = allocator->reserve4kPage(memoryBank);
entries[index] = reinterpret_cast<void *>(tmp | newEntryBits);
} else if (updateEntryBits) {
entries[index] = reinterpret_cast<void *>((reinterpret_cast<uintptr_t>(entries[index]) & MemoryConstants::page4kEntryMask) | newEntryBits);
}
res = std::min(reinterpret_cast<uintptr_t>(entries[index]) & MemoryConstants::page4kEntryMask, res);
}
return (res & ~newEntryBits) + (vm & (pageSize - 1));
}
void PTE::pageWalk(uintptr_t vm, size_t size, size_t offset, uint64_t entryBits, PageWalker &pageWalker, uint32_t memoryBank) {
static const uint32_t bits = 9;
const size_t shift = 12;
const auto mask = static_cast<uint32_t>(maxNBitValue(bits));
size_t indexStart = (vm >> shift) & mask;
size_t indexEnd = ((vm + size - 1) >> shift) & mask;
uint64_t res = -1;
uintptr_t rem = vm & (pageSize - 1);
bool updateEntryBits = entryBits != PageTableEntry::nonValidBits;
uint64_t newEntryBits = entryBits & MemoryConstants::pageMask;
newEntryBits |= 0x1;
for (size_t index = indexStart; index <= indexEnd; index++) {
if (entries[index] == 0x0) {
uint64_t tmp = allocator->reserve4kPage(memoryBank);
entries[index] = reinterpret_cast<void *>(tmp | newEntryBits);
} else if (updateEntryBits) {
entries[index] = reinterpret_cast<void *>((reinterpret_cast<uintptr_t>(entries[index]) & MemoryConstants::page4kEntryMask) | newEntryBits);
}
res = reinterpret_cast<uintptr_t>(entries[index]) & MemoryConstants::page4kEntryMask;
size_t lSize = std::min(pageSize - rem, size);
pageWalker((res & ~0x1) + rem, lSize, offset, reinterpret_cast<uintptr_t>(entries[index]) & MemoryConstants::pageMask);
size -= lSize;
offset += lSize;
rem = 0;
}
}
template class PageTable<class PDP, 3, 9>;
template class PageTable<class PDE, 2, 2>;
} // namespace NEO

87
opencl/source/memory_manager/page_table.h
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@@ -1,87 +0,0 @@
/*
* Copyright (C) 2018-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/helpers/basic_math.h"
#include "shared/source/memory_manager/physical_address_allocator.h"
#include <array>
#include <atomic>
#include <cinttypes>
#include <functional>
#include <memory>
#include <vector>
namespace NEO {
class GraphicsAllocation;
typedef std::function<void(uint64_t addr, size_t size, size_t offset, uint64_t entryBits)> PageWalker;
template <class T, uint32_t level, uint32_t bits = 9>
class PageTable {
public:
PageTable(PhysicalAddressAllocator *physicalAddressAllocator) : allocator(physicalAddressAllocator) {
entries.fill(nullptr);
};
virtual ~PageTable() {
for (auto &e : entries)
delete e;
}
virtual uintptr_t map(uintptr_t vm, size_t size, uint64_t entryBits, uint32_t memoryBank);
virtual void pageWalk(uintptr_t vm, size_t size, size_t offset, uint64_t entryBits, PageWalker &pageWalker, uint32_t memoryBank);
static const size_t pageSize = 1 << 12;
static size_t getBits() {
return T::getBits() + bits;
}
protected:
std::array<T *, 1 << bits> entries;
PhysicalAddressAllocator *allocator = nullptr;
};
template <>
inline PageTable<void, 0, 9>::~PageTable() {
}
class PTE : public PageTable<void, 0u> {
public:
PTE(PhysicalAddressAllocator *physicalAddressAllocator) : PageTable<void, 0u>(physicalAddressAllocator) {}
uintptr_t map(uintptr_t vm, size_t size, uint64_t entryBits, uint32_t memoryBank) override;
void pageWalk(uintptr_t vm, size_t size, size_t offset, uint64_t entryBits, PageWalker &pageWalker, uint32_t memoryBank) override;
static const uint32_t level = 0;
static const uint32_t bits = 9;
};
class PDE : public PageTable<class PTE, 1> {
public:
PDE(PhysicalAddressAllocator *physicalAddressAllocator) : PageTable<class PTE, 1>(physicalAddressAllocator) {
}
};
class PDP : public PageTable<class PDE, 2> {
public:
PDP(PhysicalAddressAllocator *physicalAddressAllocator) : PageTable<class PDE, 2>(physicalAddressAllocator) {
}
};
class PML4 : public PageTable<class PDP, 3> {
public:
PML4(PhysicalAddressAllocator *physicalAddressAllocator) : PageTable<class PDP, 3>(physicalAddressAllocator) {
}
};
class PDPE : public PageTable<class PDE, 2, 2> {
public:
PDPE(PhysicalAddressAllocator *physicalAddressAllocator) : PageTable<class PDE, 2, 2>(physicalAddressAllocator) {
}
};
} // namespace NEO

71
opencl/source/memory_manager/page_table.inl
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@@ -1,71 +0,0 @@
/*
* Copyright (C) 2018-2020 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
namespace NEO {
template <>
inline uintptr_t PageTable<void, 0, 9>::map(uintptr_t vm, size_t size, uint64_t entryBits, uint32_t memoryBank) {
return 0;
}
template <>
inline size_t PageTable<void, 0, 9>::getBits() {
return 9;
}
template <>
inline void PageTable<void, 0, 9>::pageWalk(uintptr_t vm, size_t size, size_t offset, uint64_t entryBits, PageWalker &pageWalker, uint32_t memoryBank) {
}
template <class T, uint32_t level, uint32_t bits>
inline uintptr_t PageTable<T, level, bits>::map(uintptr_t vm, size_t size, uint64_t entryBits, uint32_t memoryBank) {
const size_t shift = T::getBits() + 12;
const uintptr_t mask = static_cast<uintptr_t>(maxNBitValue(bits));
size_t indexStart = (vm >> shift) & mask;
size_t indexEnd = ((vm + size - 1) >> shift) & mask;
uintptr_t res = -1;
uintptr_t vmMask = (uintptr_t(-1) >> (sizeof(void *) * 8 - shift - bits));
auto maskedVm = vm & vmMask;
for (size_t index = indexStart; index <= indexEnd; index++) {
uintptr_t vmStart = (uintptr_t(1) << shift) * index;
vmStart = std::max(vmStart, maskedVm);
uintptr_t vmEnd = (uintptr_t(1) << shift) * (index + 1) - 1;
vmEnd = std::min(vmEnd, maskedVm + size - 1);
if (entries[index] == nullptr) {
entries[index] = new T(allocator);
}
res = std::min((entries[index])->map(vmStart, vmEnd - vmStart + 1, entryBits, memoryBank), res);
}
return res;
}
template <class T, uint32_t level, uint32_t bits>
inline void PageTable<T, level, bits>::pageWalk(uintptr_t vm, size_t size, size_t offset, uint64_t entryBits, PageWalker &pageWalker, uint32_t memoryBank) {
const size_t shift = T::getBits() + 12;
const uintptr_t mask = static_cast<uintptr_t>(maxNBitValue(bits));
size_t indexStart = (vm >> shift) & mask;
size_t indexEnd = ((vm + size - 1) >> shift) & mask;
uintptr_t vmMask = (uintptr_t(-1) >> (sizeof(void *) * 8 - shift - bits));
auto maskedVm = vm & vmMask;
for (size_t index = indexStart; index <= indexEnd; index++) {
uintptr_t vmStart = (uintptr_t(1) << shift) * index;
vmStart = std::max(vmStart, maskedVm);
uintptr_t vmEnd = (uintptr_t(1) << shift) * (index + 1) - 1;
vmEnd = std::min(vmEnd, maskedVm + size - 1);
if (entries[index] == nullptr) {
entries[index] = new T(allocator);
}
entries[index]->pageWalk(vmStart, vmEnd - vmStart + 1, offset, entryBits, pageWalker, memoryBank);
offset += (vmEnd - vmStart + 1);
}
}
} // namespace NEO