mirror of
https://github.com/intel/compute-runtime.git
synced 2026-01-11 16:45:25 +08:00
Move TSP creation to HwHelper
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
This commit is contained in:
committed by
Compute-Runtime-Automation
parent
1414247ed4
commit
a6c6290c09
@@ -667,15 +667,6 @@ TEST_F(CommandStreamReceiverTest, whenGettingEventPerfCountAllocatorThenSameTagA
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EXPECT_EQ(allocator2, allocator);
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}
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HWTEST_F(CommandStreamReceiverTest, givenCsrWhenAskingForTimestampPacketAlignmentThenReturnFourCachelines) {
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auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
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EXPECT_EQ(nullptr, csr.timestampPacketAllocator.get());
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constexpr auto expectedAlignment = MemoryConstants::cacheLineSize * 4;
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EXPECT_EQ(expectedAlignment, csr.getTimestampPacketAllocatorAlignment());
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}
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HWTEST_F(CommandStreamReceiverTest, givenUltCommandStreamReceiverWhenAddAubCommentIsCalledThenCallAddAubCommentOnCsr) {
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auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
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csr.addAubComment("message");
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@@ -73,6 +73,14 @@ TEST_F(HwHelperTest, WhenGettingHelperThenValidHelperReturned) {
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EXPECT_NE(nullptr, &helper);
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}
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HWTEST_F(HwHelperTest, givenHwHelperWhenAskingForTimestampPacketAlignmentThenReturnFourCachelines) {
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auto &helper = HwHelper::get(renderCoreFamily);
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constexpr auto expectedAlignment = MemoryConstants::cacheLineSize * 4;
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EXPECT_EQ(expectedAlignment, helper.getTimestampPacketAllocatorAlignment());
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}
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HWTEST_F(HwHelperTest, SetRenderSurfaceStateForBufferIsCalledThenSetL1CachePolicyIsCalled) {
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using RENDER_SURFACE_STATE = typename FamilyType::RENDER_SURFACE_STATE;
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using SURFACE_TYPE = typename RENDER_SURFACE_STATE::SURFACE_TYPE;
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@@ -406,27 +406,17 @@ HWTEST_F(TimestampPacketTests, givenDebugFlagSetWhenCreatingAllocatorThenUseCorr
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}
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HWTEST_F(TimestampPacketTests, givenTagAlignmentWhenCreatingAllocatorThenGpuAddressIsAligned) {
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class MyCsr : public CommandStreamReceiverHw<FamilyType> {
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public:
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using CommandStreamReceiverHw<FamilyType>::CommandStreamReceiverHw;
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size_t getTimestampPacketAllocatorAlignment() const override {
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return alignment;
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}
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auto csr = executionEnvironment->memoryManager->getRegisteredEngines()[0].commandStreamReceiver;
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size_t alignment = 4096;
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};
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OsContext &osContext = *executionEnvironment->memoryManager->getRegisteredEngines()[0].osContext;
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auto &hwHelper = HwHelper::get(device->getHardwareInfo().platform.eRenderCoreFamily);
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MyCsr csr(*executionEnvironment, 0, osContext.getDeviceBitfield());
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csr.setupContext(osContext);
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auto allocator = csr.getTimestampPacketAllocator();
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auto allocator = csr->getTimestampPacketAllocator();
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auto tag1 = allocator->getTag();
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auto tag2 = allocator->getTag();
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EXPECT_TRUE(isAligned(tag1->getGpuAddress(), csr.alignment));
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EXPECT_TRUE(isAligned(tag2->getGpuAddress(), csr.alignment));
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EXPECT_TRUE(isAligned(tag1->getGpuAddress(), hwHelper.getTimestampPacketAllocatorAlignment()));
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EXPECT_TRUE(isAligned(tag2->getGpuAddress(), hwHelper.getTimestampPacketAllocatorAlignment()));
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}
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HWTEST_F(TimestampPacketTests, givenDebugFlagSetWhenCreatingTimestampPacketAllocatorThenDisableReusingAndLimitPoolSize) {
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@@ -37,7 +37,6 @@ class UltCommandStreamReceiver : public CommandStreamReceiverHw<GfxFamily>, publ
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using BaseClass::getCmdSizeForPrologue;
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using BaseClass::getScratchPatchAddress;
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using BaseClass::getScratchSpaceController;
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using BaseClass::getTimestampPacketAllocatorAlignment;
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using BaseClass::indirectHeap;
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using BaseClass::iohState;
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using BaseClass::isBlitterDirectSubmissionEnabled;
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