mirror of
https://github.com/intel/compute-runtime.git
synced 2026-01-08 14:02:58 +08:00
update Sysman PCI APIs to lastest Spec
Change-Id: Ie4daf2eb3596f05f824579eff3fe811ebb2f2032
This commit is contained in:
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sys_ocldev
parent
171c40d58a
commit
a6ea7ab7db
@@ -74,7 +74,7 @@ ze_result_t LinuxPciImp::getMaxLinkSpeed(double &maxLinkSpeed) {
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return ZE_RESULT_SUCCESS;
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}
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ze_result_t LinuxPciImp::getMaxLinkWidth(uint32_t &maxLinkwidth) {
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ze_result_t LinuxPciImp::getMaxLinkWidth(int32_t &maxLinkwidth) {
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ze_result_t result;
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if (isLmemSupported) {
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std::string rootPortPath;
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@@ -85,30 +85,30 @@ ze_result_t LinuxPciImp::getMaxLinkWidth(uint32_t &maxLinkwidth) {
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// the root port is always at a fixed distance as defined in HW
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rootPortPath = changeDirNLevelsUp(realRootPath, 2);
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if (ZE_RESULT_SUCCESS != result) {
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maxLinkwidth = 0;
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maxLinkwidth = -1;
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return result;
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}
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result = pfsAccess->read(rootPortPath + '/' + "max_link_width", maxLinkwidth);
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if (ZE_RESULT_SUCCESS != result) {
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maxLinkwidth = 0;
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maxLinkwidth = -1;
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return result;
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}
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if (maxLinkwidth == static_cast<uint32_t>(unknownPcieLinkWidth)) {
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maxLinkwidth = 0;
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if (maxLinkwidth == static_cast<int32_t>(unknownPcieLinkWidth)) {
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maxLinkwidth = -1;
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}
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} else {
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result = pSysfsAccess->read(maxLinkWidthFile, maxLinkwidth);
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if (ZE_RESULT_SUCCESS != result) {
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return result;
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}
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if (maxLinkwidth == static_cast<uint32_t>(unknownPcieLinkWidth)) {
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maxLinkwidth = 0;
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if (maxLinkwidth == static_cast<int32_t>(unknownPcieLinkWidth)) {
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maxLinkwidth = -1;
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}
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}
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return ZE_RESULT_SUCCESS;
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}
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ze_result_t LinuxPciImp::getLinkGen(uint32_t &linkGen) {
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ze_result_t LinuxPciImp::getLinkGen(int32_t &linkGen) {
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double maxLinkSpeed;
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getMaxLinkSpeed(maxLinkSpeed);
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if (maxLinkSpeed == 2.5) {
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@@ -122,7 +122,7 @@ ze_result_t LinuxPciImp::getLinkGen(uint32_t &linkGen) {
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} else if (maxLinkSpeed == 32) {
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linkGen = 5;
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} else {
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linkGen = 0;
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linkGen = -1;
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}
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return ZE_RESULT_SUCCESS;
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@@ -152,18 +152,20 @@ ze_result_t LinuxPciImp::initializeBarProperties(std::vector<zes_pci_bar_propert
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for (uint32_t i = 0; i <= maxPciBars; i++) {
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uint64_t baseAddr, barSize, barFlags;
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getBarBaseAndSize(ReadBytes[i], baseAddr, barSize, barFlags);
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if (baseAddr) {
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if (baseAddr && !(barFlags & 0x1)) { // we do not update for I/O ports
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zes_pci_bar_properties_t *pBarProp = new zes_pci_bar_properties_t;
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pBarProp->index = i;
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pBarProp->base = baseAddr;
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pBarProp->size = barSize;
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// Bar Flags Desc.
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// Bit-0 - Value 0x0 -> MMIO type BAR
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// Bit-0 - Value 0x1 -> I/O Type BAR
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// Bit-1 - Reserved
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// Bit-2 - Valid only for MMIO type BAR
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// Value 0x1 -> 64bit BAR*/
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pBarProp->type = ZES_PCI_BAR_TYPE_MMIO;
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// Bit-0 - Value 0x1 -> I/O type BAR
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if (i == 0) { // GRaphics MMIO is at BAR0, and is a 64-bit
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pBarProp->type = ZES_PCI_BAR_TYPE_MMIO;
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}
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if (i == 2) {
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pBarProp->type = ZES_PCI_BAR_TYPE_MEM; // device memory is always at BAR2
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}
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if (i == 6) { // the 7th entry of resource file is expected to be ROM BAR
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pBarProp->type = ZES_PCI_BAR_TYPE_ROM;
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}
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@@ -19,8 +19,8 @@ class LinuxPciImp : public OsPci, NEO::NonCopyableOrMovableClass {
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public:
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ze_result_t getPciBdf(std::string &bdf) override;
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ze_result_t getMaxLinkSpeed(double &maxLinkSpeed) override;
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ze_result_t getMaxLinkWidth(uint32_t &maxLinkwidth) override;
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ze_result_t getLinkGen(uint32_t &linkGen) override;
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ze_result_t getMaxLinkWidth(int32_t &maxLinkwidth) override;
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ze_result_t getLinkGen(int32_t &linkGen) override;
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void setLmemSupport(bool val) override;
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ze_result_t initializeBarProperties(std::vector<zes_pci_bar_properties_t *> &pBarProperties) override;
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LinuxPciImp() = default;
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@@ -19,8 +19,8 @@ class OsPci {
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public:
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virtual ze_result_t getPciBdf(std::string &bdf) = 0;
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virtual ze_result_t getMaxLinkSpeed(double &maxLinkSpeed) = 0;
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virtual ze_result_t getMaxLinkWidth(uint32_t &maxLinkWidth) = 0;
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virtual ze_result_t getLinkGen(uint32_t &linkGen) = 0;
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virtual ze_result_t getMaxLinkWidth(int32_t &maxLinkWidth) = 0;
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virtual ze_result_t getLinkGen(int32_t &linkGen) = 0;
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virtual void setLmemSupport(bool val) = 0;
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virtual ze_result_t initializeBarProperties(std::vector<zes_pci_bar_properties_t *> &pBarProperties) = 0;
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static OsPci *create(OsSysman *pOsSysman);
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@@ -23,7 +23,7 @@ namespace L0 {
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// pcieSpeedWithEnc = maxLinkSpeedInGt * (Gigabit to Megabit) * Encoding =
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// maxLinkSpeedInGt * 1000 * Encoding
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//
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uint64_t convertPcieSpeedFromGTsToBs(double maxLinkSpeedInGt) {
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int64_t convertPcieSpeedFromGTsToBs(double maxLinkSpeedInGt) {
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double pcieSpeedWithEnc;
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if ((maxLinkSpeedInGt == 16) || (maxLinkSpeedInGt == 8)) {
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pcieSpeedWithEnc = maxLinkSpeedInGt * 1000 * 128 / 130;
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@@ -39,7 +39,7 @@ uint64_t convertPcieSpeedFromGTsToBs(double maxLinkSpeedInGt) {
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// Now, because 1Mb/s = (1000*1000)/8 bytes/second = 125000 bytes/second
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//
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pcieSpeedWithEnc = pcieSpeedWithEnc * 125000;
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return static_cast<uint64_t>(pcieSpeedWithEnc);
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return static_cast<int64_t>(pcieSpeedWithEnc);
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}
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ze_result_t PciImp::pciStaticProperties(zes_pci_properties_t *pProperties) {
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@@ -80,14 +80,17 @@ void PciImp::init() {
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&pciProperties.address.device, &pciProperties.address.function);
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}
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uint32_t maxLinkWidth = 0, gen = 0;
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uint64_t maxBandWidth = 0;
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int32_t maxLinkWidth = -1, gen = -1;
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int64_t maxBandWidth = -1;
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double maxLinkSpeed = 0;
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pOsPci->getMaxLinkSpeed(maxLinkSpeed);
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pOsPci->getMaxLinkWidth(maxLinkWidth);
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maxBandWidth = maxLinkWidth * convertPcieSpeedFromGTsToBs(maxLinkSpeed);
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pciProperties.maxSpeed.maxBandwidth = maxBandWidth;
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if (maxBandWidth == 0) {
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pciProperties.maxSpeed.maxBandwidth = -1;
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} else {
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pciProperties.maxSpeed.maxBandwidth = maxBandWidth;
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}
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pciProperties.maxSpeed.width = maxLinkWidth;
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pOsPci->getLinkGen(gen);
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pciProperties.maxSpeed.gen = gen;
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@@ -14,8 +14,8 @@ class WddmPciImp : public OsPci {
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public:
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ze_result_t getPciBdf(std::string &bdf) override;
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ze_result_t getMaxLinkSpeed(double &maxLinkSpeed) override;
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ze_result_t getMaxLinkWidth(uint32_t &maxLinkwidth) override;
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ze_result_t getLinkGen(uint32_t &linkGen) override;
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ze_result_t getMaxLinkWidth(int32_t &maxLinkwidth) override;
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ze_result_t getLinkGen(int32_t &linkGen) override;
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void setLmemSupport(bool val) override;
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ze_result_t initializeBarProperties(std::vector<zes_pci_bar_properties_t *> &pBarProperties) override;
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~WddmPciImp() override = default;
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@@ -29,11 +29,11 @@ ze_result_t WddmPciImp::getMaxLinkSpeed(double &maxLinkSpeed) {
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return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE;
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}
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ze_result_t WddmPciImp::getMaxLinkWidth(uint32_t &maxLinkwidth) {
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ze_result_t WddmPciImp::getMaxLinkWidth(int32_t &maxLinkwidth) {
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return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE;
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}
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ze_result_t WddmPciImp::getLinkGen(uint32_t &linkGen) {
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ze_result_t WddmPciImp::getLinkGen(int32_t &linkGen) {
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return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE;
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}
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