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update Sysman PCI APIs to lastest Spec

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Change-Id: Ie4daf2eb3596f05f824579eff3fe811ebb2f2032
This commit is contained in:
Vilvaraj, T J Vivek
2020-07-23 07:04:28 +05:30
committed by sys_ocldev
parent 171c40d58a
commit a6ea7ab7db
14 changed files with 173 additions and 124 deletions
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32
level_zero/tools/source/sysman/pci/linux/os_pci_imp.cpp
View File

@@ -74,7 +74,7 @@ ze_result_t LinuxPciImp::getMaxLinkSpeed(double &maxLinkSpeed) {
return ZE_RESULT_SUCCESS;
}
ze_result_t LinuxPciImp::getMaxLinkWidth(uint32_t &maxLinkwidth) {
ze_result_t LinuxPciImp::getMaxLinkWidth(int32_t &maxLinkwidth) {
ze_result_t result;
if (isLmemSupported) {
std::string rootPortPath;
@@ -85,30 +85,30 @@ ze_result_t LinuxPciImp::getMaxLinkWidth(uint32_t &maxLinkwidth) {
// the root port is always at a fixed distance as defined in HW
rootPortPath = changeDirNLevelsUp(realRootPath, 2);
if (ZE_RESULT_SUCCESS != result) {
maxLinkwidth = 0;
maxLinkwidth = -1;
return result;
}
result = pfsAccess->read(rootPortPath + '/' + "max_link_width", maxLinkwidth);
if (ZE_RESULT_SUCCESS != result) {
maxLinkwidth = 0;
maxLinkwidth = -1;
return result;
}
if (maxLinkwidth == static_cast<uint32_t>(unknownPcieLinkWidth)) {
maxLinkwidth = 0;
if (maxLinkwidth == static_cast<int32_t>(unknownPcieLinkWidth)) {
maxLinkwidth = -1;
}
} else {
result = pSysfsAccess->read(maxLinkWidthFile, maxLinkwidth);
if (ZE_RESULT_SUCCESS != result) {
return result;
}
if (maxLinkwidth == static_cast<uint32_t>(unknownPcieLinkWidth)) {
maxLinkwidth = 0;
if (maxLinkwidth == static_cast<int32_t>(unknownPcieLinkWidth)) {
maxLinkwidth = -1;
}
}
return ZE_RESULT_SUCCESS;
}
ze_result_t LinuxPciImp::getLinkGen(uint32_t &linkGen) {
ze_result_t LinuxPciImp::getLinkGen(int32_t &linkGen) {
double maxLinkSpeed;
getMaxLinkSpeed(maxLinkSpeed);
if (maxLinkSpeed == 2.5) {
@@ -122,7 +122,7 @@ ze_result_t LinuxPciImp::getLinkGen(uint32_t &linkGen) {
} else if (maxLinkSpeed == 32) {
linkGen = 5;
} else {
linkGen = 0;
linkGen = -1;
}
return ZE_RESULT_SUCCESS;
@@ -152,18 +152,20 @@ ze_result_t LinuxPciImp::initializeBarProperties(std::vector<zes_pci_bar_propert
for (uint32_t i = 0; i <= maxPciBars; i++) {
uint64_t baseAddr, barSize, barFlags;
getBarBaseAndSize(ReadBytes[i], baseAddr, barSize, barFlags);
if (baseAddr) {
if (baseAddr && !(barFlags & 0x1)) { // we do not update for I/O ports
zes_pci_bar_properties_t *pBarProp = new zes_pci_bar_properties_t;
pBarProp->index = i;
pBarProp->base = baseAddr;
pBarProp->size = barSize;
// Bar Flags Desc.
// Bit-0 - Value 0x0 -> MMIO type BAR
// Bit-0 - Value 0x1 -> I/O Type BAR
// Bit-1 - Reserved
// Bit-2 - Valid only for MMIO type BAR
// Value 0x1 -> 64bit BAR*/
pBarProp->type = ZES_PCI_BAR_TYPE_MMIO;
// Bit-0 - Value 0x1 -> I/O type BAR
if (i == 0) { // GRaphics MMIO is at BAR0, and is a 64-bit
pBarProp->type = ZES_PCI_BAR_TYPE_MMIO;
}
if (i == 2) {
pBarProp->type = ZES_PCI_BAR_TYPE_MEM; // device memory is always at BAR2
}
if (i == 6) { // the 7th entry of resource file is expected to be ROM BAR
pBarProp->type = ZES_PCI_BAR_TYPE_ROM;
}

4
level_zero/tools/source/sysman/pci/linux/os_pci_imp.h
View File

@@ -19,8 +19,8 @@ class LinuxPciImp : public OsPci, NEO::NonCopyableOrMovableClass {
public:
ze_result_t getPciBdf(std::string &bdf) override;
ze_result_t getMaxLinkSpeed(double &maxLinkSpeed) override;
ze_result_t getMaxLinkWidth(uint32_t &maxLinkwidth) override;
ze_result_t getLinkGen(uint32_t &linkGen) override;
ze_result_t getMaxLinkWidth(int32_t &maxLinkwidth) override;
ze_result_t getLinkGen(int32_t &linkGen) override;
void setLmemSupport(bool val) override;
ze_result_t initializeBarProperties(std::vector<zes_pci_bar_properties_t *> &pBarProperties) override;
LinuxPciImp() = default;