From a7d8a93b4e031fa23d1734cefdc9aec632a4dec1 Mon Sep 17 00:00:00 2001 From: "Naklicki, Mateusz" Date: Thu, 1 Dec 2022 12:50:08 +0000 Subject: [PATCH] feature: Add support for MTL Related-To: NEO-7111 Signed-off-by: Naklicki, Mateusz --- cmake/fill_core_types.cmake | 3 +- cmake/setup_platform_flags.cmake | 22 +- .../source/xe_hpg_core/mtl/CMakeLists.txt | 18 ++ .../source/xe_hpg_core/mtl/cmdlist_mtl.cpp | 17 ++ .../source/xe_hpg_core/mtl/cmdqueue_mtl.cpp | 21 ++ .../core/source/xe_hpg_core/mtl/image_mtl.cpp | 23 +++ .../source/xe_hpg_core/mtl/kernel_mtl.cpp | 16 ++ .../source/xe_hpg_core/mtl/sampler_mtl.cpp | 25 +++ .../unit_tests/xe_hpg_core/mtl/CMakeLists.txt | 12 ++ .../xe_hpg_core/mtl/test_sampler_mtl.cpp | 59 ++++++ manifests/manifest.yml | 2 +- .../unit_test/xe_hpg_core/mtl/CMakeLists.txt | 23 +++ .../xe_hpg_core/mtl/excludes_ocl_mtl.cpp | 12 ++ .../xe_hpg_core/mtl/get_device_info_mtl.cpp | 28 +++ .../xe_hpg_core/mtl/image_tests_mtl.cpp | 13 ++ .../xe_hpg_core/mtl/linux/CMakeLists.txt | 9 + .../xe_hpg_core/mtl/linux/dll/CMakeLists.txt | 11 + .../mtl/linux/dll/device_id_tests_mtl.cpp | 20 ++ .../mtl/test_cl_device_caps_mtl.cpp | 42 ++++ .../xe_hpg_core/mtl/ail_configuration_mtl.cpp | 20 ++ .../aub_mem_dump/definitions/aub_services.h | 1 + .../source/dll/devices/devices_additional.inl | 7 + .../dll/devices/product_config_base.inl | 6 + shared/source/helpers/CMakeLists.txt | 6 + .../compiler_aot_config_mtl_and_later.inl | 16 ++ .../definitions/device_ids_configs_base.h | 3 + .../source/os_interface/linux/CMakeLists.txt | 4 + .../linux/hw_info_config_mtl_and_later.inl | 11 + .../xe_hpg_core/definitions/hw_cmds_mtl.inl | 6 + .../definitions/hw_info_setup_mtl.inl | 16 ++ .../enable_compiler_product_helper_mtl.cpp | 20 ++ .../xe_hpg_core/enable_hw_info_config_mtl.cpp | 15 ++ .../source/xe_hpg_core/enable_xe_hpg_core.cpp | 6 + shared/source/xe_hpg_core/hw_cmds.h | 4 + shared/source/xe_hpg_core/hw_cmds_mtl.h | 46 +++++ shared/source/xe_hpg_core/hw_info.h | 6 +- shared/source/xe_hpg_core/hw_info_mtl.cpp | 190 ++++++++++++++++++ shared/source/xe_hpg_core/hw_info_mtl.h | 23 +++ .../xe_hpg_core/linux/hw_info_config_mtl.cpp | 54 +++++ .../xe_hpg_core/mtl/device_ids_configs_mtl.h | 19 ++ .../mtl/os_agnostic_hw_info_config_mtl.inl | 116 +++++++++++ .../windows/hw_info_config_mtl.cpp | 22 ++ .../includes/test_traits_platforms_common.h | 5 +- .../test_macros/header/common_matchers.h | 2 + .../header/per_product_test_definitions.h | 11 + .../common/xe_hpg_core/mtl/CMakeLists.txt | 13 ++ .../mtl/mock_hw_info_config_mtl.cpp | 15 ++ .../xe_hpg_core/mtl/product_configs_mtl.h | 17 ++ .../common/xe_hpg_core/mtl/test_traits_mtl.h | 14 ++ shared/test/unit_test/helpers/CMakeLists.txt | 1 + .../unit_test/helpers/hw_aot_config_tests.cpp | 67 ++++++ .../linux/hw_info_config_linux_tests.cpp | 6 + .../unit_test/xe_hpg_core/mtl/CMakeLists.txt | 28 +++ .../mtl/compute_mode_tests_mtl.cpp | 177 ++++++++++++++++ .../mtl/excludes_xe_hpg_core_mtl.cpp | 22 ++ .../mtl/hw_aot_config_tests_mtl.cpp | 22 ++ .../xe_hpg_core/mtl/hw_helper_tests_mtl.cpp | 139 +++++++++++++ .../mtl/hw_info_config_tests_mtl.cpp | 174 ++++++++++++++++ .../xe_hpg_core/mtl/hw_info_tests_mtl.cpp | 105 ++++++++++ .../xe_hpg_core/mtl/linux/CMakeLists.txt | 9 + .../mtl/linux/hw_info_config_tests_mtl.cpp | 45 +++++ .../xe_hpg_core/mtl/sampler_tests_mtl.cpp | 38 ++++ .../xe_hpg_core/mtl/test_device_caps_mtl.cpp | 17 ++ .../mtl/test_encode_dispatch_kernel_mtl.cpp | 43 ++++ .../xe_hpg_core/mtl/test_encode_mtl.cpp | 49 +++++ .../mtl/test_image_surface_state_mtl.cpp | 44 ++++ .../xe_hpg_core/mtl/CMakeLists.txt | 9 + .../xe_hpg_core/mtl/enable_mtl_testing.cmake | 10 + third_party/aot_config_headers/platforms.h | 5 + 69 files changed, 2075 insertions(+), 5 deletions(-) create mode 100644 level_zero/core/source/xe_hpg_core/mtl/CMakeLists.txt create mode 100644 level_zero/core/source/xe_hpg_core/mtl/cmdlist_mtl.cpp create mode 100644 level_zero/core/source/xe_hpg_core/mtl/cmdqueue_mtl.cpp create mode 100644 level_zero/core/source/xe_hpg_core/mtl/image_mtl.cpp create mode 100644 level_zero/core/source/xe_hpg_core/mtl/kernel_mtl.cpp create mode 100644 level_zero/core/source/xe_hpg_core/mtl/sampler_mtl.cpp create mode 100644 level_zero/core/test/unit_tests/xe_hpg_core/mtl/CMakeLists.txt create mode 100644 level_zero/core/test/unit_tests/xe_hpg_core/mtl/test_sampler_mtl.cpp create mode 100644 opencl/test/unit_test/xe_hpg_core/mtl/CMakeLists.txt create mode 100644 opencl/test/unit_test/xe_hpg_core/mtl/excludes_ocl_mtl.cpp create mode 100644 opencl/test/unit_test/xe_hpg_core/mtl/get_device_info_mtl.cpp create mode 100644 opencl/test/unit_test/xe_hpg_core/mtl/image_tests_mtl.cpp create mode 100644 opencl/test/unit_test/xe_hpg_core/mtl/linux/CMakeLists.txt create mode 100644 opencl/test/unit_test/xe_hpg_core/mtl/linux/dll/CMakeLists.txt create mode 100644 opencl/test/unit_test/xe_hpg_core/mtl/linux/dll/device_id_tests_mtl.cpp create mode 100644 opencl/test/unit_test/xe_hpg_core/mtl/test_cl_device_caps_mtl.cpp create mode 100644 shared/source/ail/xe_hpg_core/mtl/ail_configuration_mtl.cpp create mode 100644 shared/source/helpers/compiler_aot_config_mtl_and_later.inl create mode 100644 shared/source/os_interface/linux/hw_info_config_mtl_and_later.inl create mode 100644 shared/source/xe_hpg_core/definitions/hw_cmds_mtl.inl create mode 100644 shared/source/xe_hpg_core/definitions/hw_info_setup_mtl.inl create mode 100644 shared/source/xe_hpg_core/enable_compiler_product_helper_mtl.cpp create mode 100644 shared/source/xe_hpg_core/enable_hw_info_config_mtl.cpp create mode 100644 shared/source/xe_hpg_core/hw_cmds_mtl.h create mode 100644 shared/source/xe_hpg_core/hw_info_mtl.cpp create mode 100644 shared/source/xe_hpg_core/hw_info_mtl.h create mode 100644 shared/source/xe_hpg_core/linux/hw_info_config_mtl.cpp create mode 100644 shared/source/xe_hpg_core/mtl/device_ids_configs_mtl.h create mode 100644 shared/source/xe_hpg_core/mtl/os_agnostic_hw_info_config_mtl.inl create mode 100644 shared/source/xe_hpg_core/windows/hw_info_config_mtl.cpp create mode 100644 shared/test/common/xe_hpg_core/mtl/CMakeLists.txt create mode 100644 shared/test/common/xe_hpg_core/mtl/mock_hw_info_config_mtl.cpp create mode 100644 shared/test/common/xe_hpg_core/mtl/product_configs_mtl.h create mode 100644 shared/test/common/xe_hpg_core/mtl/test_traits_mtl.h create mode 100644 shared/test/unit_test/helpers/hw_aot_config_tests.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/CMakeLists.txt create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/compute_mode_tests_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/excludes_xe_hpg_core_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/hw_aot_config_tests_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/hw_helper_tests_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/hw_info_config_tests_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/hw_info_tests_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/linux/CMakeLists.txt create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/linux/hw_info_config_tests_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/sampler_tests_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/test_device_caps_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/test_encode_dispatch_kernel_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/test_encode_mtl.cpp create mode 100644 shared/test/unit_test/xe_hpg_core/mtl/test_image_surface_state_mtl.cpp create mode 100644 target_unit_tests/xe_hpg_core/mtl/CMakeLists.txt create mode 100644 target_unit_tests/xe_hpg_core/mtl/enable_mtl_testing.cmake diff --git a/cmake/fill_core_types.cmake b/cmake/fill_core_types.cmake index 67e6302c1f..a36ad97057 100644 --- a/cmake/fill_core_types.cmake +++ b/cmake/fill_core_types.cmake @@ -1,5 +1,5 @@ # -# Copyright (C) 2020-2021 Intel Corporation +# Copyright (C) 2020-2022 Intel Corporation # # SPDX-License-Identifier: MIT # @@ -13,4 +13,5 @@ list(APPEND ALL_CORE_TYPES "XE_HPG_CORE") list(APPEND ALL_CORE_TYPES "XE_HPC_CORE") list(APPEND XEHP_AND_LATER_CORE_TYPES "XE_HP_CORE" "XE_HPG_CORE" "XE_HPC_CORE") list(APPEND DG2_AND_LATER_CORE_TYPES "XE_HPG_CORE" "XE_HPC_CORE") +list(APPEND MTL_AND_LATER_CORE_TYPES "XE_HPG_CORE" "XE_HPC_CORE") list(APPEND PVC_AND_LATER_CORE_TYPES "XE_HPC_CORE") diff --git a/cmake/setup_platform_flags.cmake b/cmake/setup_platform_flags.cmake index 8c3c4cc373..90e4ba6da0 100644 --- a/cmake/setup_platform_flags.cmake +++ b/cmake/setup_platform_flags.cmake @@ -22,7 +22,7 @@ else() SET_FLAGS_FOR("XE_HP_CORE" "XE_HP_SDV") endif() SET_FLAGS_FOR("GEN12LP" "TGLLP" "RKL" "ADLS" "ADLP" "DG1" "ADLN") -SET_FLAGS_FOR("XE_HPG_CORE" "DG2") +SET_FLAGS_FOR("XE_HPG_CORE" "DG2" "MTL") SET_FLAGS_FOR("XE_HPC_CORE" "PVC") foreach(CORE_TYPE ${XEHP_AND_LATER_CORE_TYPES}) @@ -43,6 +43,15 @@ foreach(CORE_TYPE ${DG2_AND_LATER_CORE_TYPES}) endif() endforeach() +foreach(CORE_TYPE ${MTL_AND_LATER_CORE_TYPES}) + if(TESTS_${CORE_TYPE}) + set(TESTS_MTL_AND_LATER 1) + endif() + if(SUPPORT_${CORE_TYPE}) + set(SUPPORT_MTL_AND_LATER 1) + endif() +endforeach() + foreach(CORE_TYPE ${PVC_AND_LATER_CORE_TYPES}) if(TESTS_${CORE_TYPE}) set(TESTS_PVC_AND_LATER 1) @@ -281,6 +290,17 @@ if(SUPPORT_XE_HPG_CORE) if(TESTS_XE_HPG_CORE) ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "XE_HPG_CORE" "XeHpgCoreFamily") endif() + if(SUPPORT_MTL) + set(MTL_XE_HPG_CORE_REVISIONS 0) + ADD_PRODUCT("SUPPORTED" "MTL" "IGFX_METEORLAKE") + ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED" "XE_HPG_CORE" "MTL") + ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED_IMAGES" "XE_HPG_CORE" "MTL") + ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED_AUX_TRANSLATION" "XE_HPG_CORE" "MTL") + if(TESTS_MTL) + ADD_ITEM_FOR_CORE_TYPE("PLATFORMS" "TESTED" "XE_HPG_CORE" "MTL") + ADD_PRODUCT("TESTED" "MTL" "IGFX_METEORLAKE") + endif() + endif() if(SUPPORT_DG2) set(DG2_XE_HPG_CORE_REVISIONS 0) ADD_PRODUCT("SUPPORTED" "DG2" "IGFX_DG2") diff --git a/level_zero/core/source/xe_hpg_core/mtl/CMakeLists.txt b/level_zero/core/source/xe_hpg_core/mtl/CMakeLists.txt new file mode 100644 index 0000000000..07cb1644d3 --- /dev/null +++ b/level_zero/core/source/xe_hpg_core/mtl/CMakeLists.txt @@ -0,0 +1,18 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(SUPPORT_MTL) + set(HW_SOURCES_XE_HPG_CORE + ${HW_SOURCES_XE_HPG_CORE} + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/cmdqueue_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/kernel_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/image_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/sampler_mtl.cpp + PARENT_SCOPE + ) +endif() diff --git a/level_zero/core/source/xe_hpg_core/mtl/cmdlist_mtl.cpp b/level_zero/core/source/xe_hpg_core/mtl/cmdlist_mtl.cpp new file mode 100644 index 0000000000..d82f03f335 --- /dev/null +++ b/level_zero/core/source/xe_hpg_core/mtl/cmdlist_mtl.cpp @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "level_zero/core/source/xe_hpg_core/cmdlist_xe_hpg_core.h" + +namespace L0 { +static CommandListPopulateFactory> + populateMTL; + +static CommandListImmediatePopulateFactory> + populateMTLImmediate; + +} // namespace L0 diff --git a/level_zero/core/source/xe_hpg_core/mtl/cmdqueue_mtl.cpp b/level_zero/core/source/xe_hpg_core/mtl/cmdqueue_mtl.cpp new file mode 100644 index 0000000000..5a82cc973d --- /dev/null +++ b/level_zero/core/source/xe_hpg_core/mtl/cmdqueue_mtl.cpp @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/xe_hpg_core/hw_cmds_mtl.h" +#include "shared/source/xe_hpg_core/hw_info.h" + +#include "level_zero/core/source/cmdqueue/cmdqueue_hw.inl" +#include "level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl" + +#include "cmdqueue_extended.inl" + +namespace L0 { +template struct CommandQueueHw; +static CommandQueuePopulateFactory> + populateMTL; + +} // namespace L0 diff --git a/level_zero/core/source/xe_hpg_core/mtl/image_mtl.cpp b/level_zero/core/source/xe_hpg_core/mtl/image_mtl.cpp new file mode 100644 index 0000000000..ff0c0f972c --- /dev/null +++ b/level_zero/core/source/xe_hpg_core/mtl/image_mtl.cpp @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "level_zero/core/source/xe_hpg_core/image_xe_hpg_core.inl" + +namespace L0 { + +template <> +struct ImageProductFamily : public ImageCoreFamily { + using ImageCoreFamily::ImageCoreFamily; + + ze_result_t initialize(Device *device, const ze_image_desc_t *desc) override { + return ImageCoreFamily::initialize(device, desc); + }; +}; + +static ImagePopulateFactory> populateMTL; + +} // namespace L0 diff --git a/level_zero/core/source/xe_hpg_core/mtl/kernel_mtl.cpp b/level_zero/core/source/xe_hpg_core/mtl/kernel_mtl.cpp new file mode 100644 index 0000000000..9ffc6e35b6 --- /dev/null +++ b/level_zero/core/source/xe_hpg_core/mtl/kernel_mtl.cpp @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/xe_hpg_core/hw_cmds_xe_hpg_core_base.h" + +#include "level_zero/core/source/kernel/kernel_hw.h" + +namespace L0 { + +static KernelPopulateFactory> populateMTL; + +} // namespace L0 diff --git a/level_zero/core/source/xe_hpg_core/mtl/sampler_mtl.cpp b/level_zero/core/source/xe_hpg_core/mtl/sampler_mtl.cpp new file mode 100644 index 0000000000..8e4e93741f --- /dev/null +++ b/level_zero/core/source/xe_hpg_core/mtl/sampler_mtl.cpp @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "level_zero/core/source/xe_hpg_core/sampler_xe_hpg_core.inl" + +namespace L0 { +template struct SamplerCoreFamily; +template <> +struct SamplerProductFamily : public SamplerCoreFamily { + using SamplerCoreFamily::SamplerCoreFamily; + + using SAMPLER_STATE = typename NEO::XeHpgCoreFamily::SAMPLER_STATE; + + ze_result_t initialize(Device *device, const ze_sampler_desc_t *desc) override { + return SamplerCoreFamily::initialize(device, desc); + }; +}; + +static SamplerPopulateFactory> populateMTL; + +} // namespace L0 diff --git a/level_zero/core/test/unit_tests/xe_hpg_core/mtl/CMakeLists.txt b/level_zero/core/test/unit_tests/xe_hpg_core/mtl/CMakeLists.txt new file mode 100644 index 0000000000..eb18e1a86b --- /dev/null +++ b/level_zero/core/test/unit_tests/xe_hpg_core/mtl/CMakeLists.txt @@ -0,0 +1,12 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_MTL) + target_sources(${TARGET_NAME} PRIVATE + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/test_sampler_mtl.cpp + ) +endif() diff --git a/level_zero/core/test/unit_tests/xe_hpg_core/mtl/test_sampler_mtl.cpp b/level_zero/core/test/unit_tests/xe_hpg_core/mtl/test_sampler_mtl.cpp new file mode 100644 index 0000000000..0fff317aa9 --- /dev/null +++ b/level_zero/core/test/unit_tests/xe_hpg_core/mtl/test_sampler_mtl.cpp @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/utilities/numeric.h" +#include "shared/test/common/test_macros/hw_test.h" + +#include "level_zero/core/source/sampler/sampler_hw.h" +#include "level_zero/core/test/unit_tests/fixtures/device_fixture.h" +#include "level_zero/core/test/unit_tests/mocks/mock_sampler.h" + +namespace L0 { +namespace ult { + +using SamplerCreateTest = Test; + +HWTEST2_F(SamplerCreateTest, givenMtlWhenInitializeSamplerThenLowQualityFilterIsDisabled, IsMTL) { + using SAMPLER_STATE = typename NEO::XeHpgCoreFamily::SAMPLER_STATE; + + ze_sampler_address_mode_t addressMode = ZE_SAMPLER_ADDRESS_MODE_REPEAT; + ze_sampler_filter_mode_t filterMode = ZE_SAMPLER_FILTER_MODE_NEAREST; + ze_bool_t isNormalized = true; + + ze_sampler_desc_t desc = {}; + desc.addressMode = addressMode; + desc.filterMode = filterMode; + desc.isNormalized = isNormalized; + + auto sampler = static_cast *>((*samplerFactory[IGFX_METEORLAKE])()); + sampler->initialize(device, &desc); + + EXPECT_EQ(SAMPLER_STATE::LOW_QUALITY_FILTER_DISABLE, sampler->samplerState.getLowQualityFilter()); + + sampler->destroy(); +} + +HWTEST2_F(SamplerCreateTest, givenMtlAndDebugFlagSetWhenInitializingSamplerThenLowQualityFilterIsEnabled, IsMTL) { + using SAMPLER_STATE = typename NEO::XeHpgCoreFamily::SAMPLER_STATE; + DebugManagerStateRestore dbgRestore; + DebugManager.flags.ForceSamplerLowFilteringPrecision.set(true); + + ze_sampler_desc_t desc = {}; + desc.addressMode = ZE_SAMPLER_ADDRESS_MODE_REPEAT; + desc.filterMode = ZE_SAMPLER_FILTER_MODE_NEAREST; + desc.isNormalized = true; + + auto sampler = static_cast *>((*samplerFactory[IGFX_METEORLAKE])()); + sampler->initialize(device, &desc); + + EXPECT_EQ(SAMPLER_STATE::LOW_QUALITY_FILTER_ENABLE, sampler->samplerState.getLowQualityFilter()); + + sampler->destroy(); +} + +} // namespace ult +} // namespace L0 \ No newline at end of file diff --git a/manifests/manifest.yml b/manifests/manifest.yml index 65365d1698..d10b92e648 100644 --- a/manifests/manifest.yml +++ b/manifests/manifest.yml @@ -38,7 +38,7 @@ components: dest_dir: kernels_bin type: git branch: kernels_bin - revision: 2007-501 + revision: 2007-502 kmdaf: branch: kmdaf dest_dir: kmdaf diff --git a/opencl/test/unit_test/xe_hpg_core/mtl/CMakeLists.txt b/opencl/test/unit_test/xe_hpg_core/mtl/CMakeLists.txt new file mode 100644 index 0000000000..bc090da176 --- /dev/null +++ b/opencl/test/unit_test/xe_hpg_core/mtl/CMakeLists.txt @@ -0,0 +1,23 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_MTL) + set(IGDRCL_SRCS_tests_xe_hpg_core_mtl_excludes + ${CMAKE_CURRENT_SOURCE_DIR}/excludes_ocl_mtl.cpp + ) + set_property(GLOBAL APPEND PROPERTY IGDRCL_SRCS_tests_excludes ${IGDRCL_SRCS_tests_xe_hpg_core_mtl_excludes}) + + set(IGDRCL_SRCS_tests_xe_hpg_core_mtl + ${IGDRCL_SRCS_tests_xe_hpg_core_mtl_excludes} + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/get_device_info_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/image_tests_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/test_cl_device_caps_mtl.cpp + ) + + target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_xe_hpg_core_mtl}) + add_subdirectories() +endif() diff --git a/opencl/test/unit_test/xe_hpg_core/mtl/excludes_ocl_mtl.cpp b/opencl/test/unit_test/xe_hpg_core/mtl/excludes_ocl_mtl.cpp new file mode 100644 index 0000000000..f5d9e8a15c --- /dev/null +++ b/opencl/test/unit_test/xe_hpg_core/mtl/excludes_ocl_mtl.cpp @@ -0,0 +1,12 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/test/common/test_macros/hw_test_base.h" + +HWTEST_EXCLUDE_PRODUCT(CommandStreamReceiverFlushTaskDg2AndLaterTests, givenProgramExtendedPipeControlPriorToNonPipelinedStateCommandEnabledWhenPerDssBackedBufferThenThereIsPipeControlPriorToIt_MatcherIsRTCapable, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramExtendedPipeControlPriorToNonPipelinedStateCommandEnabledAndStateSipWhenItIsRequiredThenThereIsPipeControlPriorToIt, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramExtendedPipeControlPriorToNonPipelinedStateCommandEnabledAndStateBaseAddressWhenItIsRequiredThenThereIsPipeControlPriorToIt, IGFX_METEORLAKE); diff --git a/opencl/test/unit_test/xe_hpg_core/mtl/get_device_info_mtl.cpp b/opencl/test/unit_test/xe_hpg_core/mtl/get_device_info_mtl.cpp new file mode 100644 index 0000000000..aeea9125fe --- /dev/null +++ b/opencl/test/unit_test/xe_hpg_core/mtl/get_device_info_mtl.cpp @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/test/common/test_macros/hw_test.h" + +#include "opencl/test/unit_test/fixtures/device_info_fixture.h" + +using namespace NEO; + +HWTEST_EXCLUDE_PRODUCT(GetDeviceInfoMemCapabilitiesTest, GivenValidParametersWhenGetDeviceInfoIsCalledForXE_HP_COREThenClSuccessIsReturned, IGFX_METEORLAKE); + +MTLTEST_F(GetDeviceInfoMemCapabilitiesTest, GivenValidParametersWhenGetDeviceInfoIsCalledForMTLThenClSuccessIsReturned) { + std::vector params = { + {CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL, CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL}, + {CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL, + (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)}, + {CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL, + (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)}, + {CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL, + (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)}, + {CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL, 0}}; + + check(params); +} diff --git a/opencl/test/unit_test/xe_hpg_core/mtl/image_tests_mtl.cpp b/opencl/test/unit_test/xe_hpg_core/mtl/image_tests_mtl.cpp new file mode 100644 index 0000000000..90a8d99928 --- /dev/null +++ b/opencl/test/unit_test/xe_hpg_core/mtl/image_tests_mtl.cpp @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/test/common/test_macros/hw_test.h" + +using namespace NEO; + +HWTEST_EXCLUDE_PRODUCT(XeHPAndLaterImageTests, givenCompressionWhenAppendingImageFromBufferThenTwoIsSetAsCompressionFormat, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(XeHPAndLaterImageTests, givenImageFromBufferWhenSettingSurfaceStateThenPickCompressionFormatFromDebugVariable, IGFX_METEORLAKE); \ No newline at end of file diff --git a/opencl/test/unit_test/xe_hpg_core/mtl/linux/CMakeLists.txt b/opencl/test/unit_test/xe_hpg_core/mtl/linux/CMakeLists.txt new file mode 100644 index 0000000000..51bd6c064a --- /dev/null +++ b/opencl/test/unit_test/xe_hpg_core/mtl/linux/CMakeLists.txt @@ -0,0 +1,9 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(UNIX) + add_subdirectories() +endif() diff --git a/opencl/test/unit_test/xe_hpg_core/mtl/linux/dll/CMakeLists.txt b/opencl/test/unit_test/xe_hpg_core/mtl/linux/dll/CMakeLists.txt new file mode 100644 index 0000000000..8f36021dc5 --- /dev/null +++ b/opencl/test/unit_test/xe_hpg_core/mtl/linux/dll/CMakeLists.txt @@ -0,0 +1,11 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +set(IGDRCL_SRCS_linux_dll_tests_xe_hpg_core_mtl + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/${BRANCH_DIR_SUFFIX}/device_id_tests_mtl.cpp +) +target_sources(igdrcl_linux_dll_tests PRIVATE ${IGDRCL_SRCS_linux_dll_tests_xe_hpg_core_mtl}) diff --git a/opencl/test/unit_test/xe_hpg_core/mtl/linux/dll/device_id_tests_mtl.cpp b/opencl/test/unit_test/xe_hpg_core/mtl/linux/dll/device_id_tests_mtl.cpp new file mode 100644 index 0000000000..c050f48950 --- /dev/null +++ b/opencl/test/unit_test/xe_hpg_core/mtl/linux/dll/device_id_tests_mtl.cpp @@ -0,0 +1,20 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/test/common/fixtures/linux/device_id_fixture.h" + +using namespace NEO; + +TEST_F(DeviceIdTests, givenMtlSupportedDeviceIdThenDeviceDescriptorTableExists) { + std::array expectedDescriptors = {{{0x7D40, &MtlHwConfig::hwInfo, &MtlHwConfig::setupHardwareInfo}, + {0x7D55, &MtlHwConfig::hwInfo, &MtlHwConfig::setupHardwareInfo}, + {0x7DD5, &MtlHwConfig::hwInfo, &MtlHwConfig::setupHardwareInfo}, + {0x7D45, &MtlHwConfig::hwInfo, &MtlHwConfig::setupHardwareInfo}, + {0x7D60, &MtlHwConfig::hwInfo, &MtlHwConfig::setupHardwareInfo}}}; + + testImpl(expectedDescriptors); +} diff --git a/opencl/test/unit_test/xe_hpg_core/mtl/test_cl_device_caps_mtl.cpp b/opencl/test/unit_test/xe_hpg_core/mtl/test_cl_device_caps_mtl.cpp new file mode 100644 index 0000000000..4dc2690d09 --- /dev/null +++ b/opencl/test/unit_test/xe_hpg_core/mtl/test_cl_device_caps_mtl.cpp @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/xe_hpg_core/hw_cmds_mtl.h" +#include "shared/test/common/helpers/gtest_helpers.h" +#include "shared/test/common/test_macros/header/per_product_test_definitions.h" + +#include "opencl/test/unit_test/fixtures/platform_fixture.h" +#include "opencl/test/unit_test/mocks/mock_cl_device.h" +#include "opencl/test/unit_test/mocks/ult_cl_device_factory.h" + +using namespace NEO; + +using MtlDeviceCapsTest = ::testing::Test; + +MTLTEST_F(MtlDeviceCapsTest, whenCheckingExtensionThenCorrectExtensionsAreReported) { + VariableBackup backupHwInfo(defaultHwInfo.get()); + unsigned int gmdReleases[] = {70, 71, 72, 73}; + defaultHwInfo->ipVersion.architecture = 12; + + for (auto gmdRelease : gmdReleases) { + defaultHwInfo->ipVersion.release = gmdRelease; + UltClDeviceFactory deviceFactory{1, 0}; + auto &extensions = deviceFactory.rootDevices[0]->deviceExtensions; + + EXPECT_EQ(!MTL::isLpg(*defaultHwInfo), hasSubstr(extensions, std::string("cl_intel_bfloat16_conversions"))); + EXPECT_EQ(!MTL::isLpg(*defaultHwInfo), hasSubstr(extensions, std::string("cl_intel_subgroup_matrix_multiply_accumulate"))); + EXPECT_EQ(!MTL::isLpg(*defaultHwInfo), hasSubstr(extensions, std::string("cl_intel_subgroup_split_matrix_multiply_accumulate"))); + } +} + +using MtlPlatformCaps = Test; + +MTLTEST_F(MtlPlatformCaps, givenSkuWhenCheckingExtensionThenFp64IsReported) { + const auto &caps = pPlatform->getPlatformInfo(); + + EXPECT_NE(std::string::npos, caps.extensions.find(std::string("cl_khr_fp64"))); +} diff --git a/shared/source/ail/xe_hpg_core/mtl/ail_configuration_mtl.cpp b/shared/source/ail/xe_hpg_core/mtl/ail_configuration_mtl.cpp new file mode 100644 index 0000000000..2c38d78ad2 --- /dev/null +++ b/shared/source/ail/xe_hpg_core/mtl/ail_configuration_mtl.cpp @@ -0,0 +1,20 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/ail/ail_configuration_base.inl" + +#include +#include + +namespace NEO { +static EnableAIL enableAILMTL; + +std::map> applicationMapMTL = {}; + +template class AILConfigurationHw; + +} // namespace NEO diff --git a/shared/source/aub_mem_dump/definitions/aub_services.h b/shared/source/aub_mem_dump/definitions/aub_services.h index 40041c5b8d..ba476bb4cf 100644 --- a/shared/source/aub_mem_dump/definitions/aub_services.h +++ b/shared/source/aub_mem_dump/definitions/aub_services.h @@ -108,6 +108,7 @@ struct CmdServicesMemTraceVersion { Adln = 34, Dg2 = 36, Pvc = 39, + Mtl = 42 }; }; struct RecordingMethodValues { diff --git a/shared/source/dll/devices/devices_additional.inl b/shared/source/dll/devices/devices_additional.inl index 6e026a0744..3f2beecf00 100644 --- a/shared/source/dll/devices/devices_additional.inl +++ b/shared/source/dll/devices/devices_additional.inl @@ -19,6 +19,13 @@ DEVICE(0x0BDB, PvcHwConfig) #endif #ifdef SUPPORT_XE_HPG_CORE +#ifdef SUPPORT_MTL +DEVICE(0x7D40, MtlHwConfig) +DEVICE(0x7D55, MtlHwConfig) +DEVICE(0x7DD5, MtlHwConfig) +DEVICE(0x7D45, MtlHwConfig) +DEVICE(0x7D60, MtlHwConfig) +#endif #ifdef SUPPORT_DG2 DEVICE(0x4F80, Dg2HwConfig) DEVICE(0x4F81, Dg2HwConfig) diff --git a/shared/source/dll/devices/product_config_base.inl b/shared/source/dll/devices/product_config_base.inl index d4cf96315a..08e82bb880 100644 --- a/shared/source/dll/devices/product_config_base.inl +++ b/shared/source/dll/devices/product_config_base.inl @@ -18,6 +18,12 @@ DEVICE_CONFIG(PVC_XT_C0, PvcHwConfig, pvcXtDeviceIds, XE_FAMILY, XE_HPC_RELEASE) #endif #ifdef SUPPORT_XE_HPG_CORE +#ifdef SUPPORT_MTL +DEVICE_CONFIG(XE_LPG_MD_A0, MtlHwConfig, mtlDeviceIds, XE_FAMILY, XE_LPG_RELEASE) +DEVICE_CONFIG(XE_LPG_MD_B0, MtlHwConfig, mtlDeviceIds, XE_FAMILY, XE_LPG_RELEASE) +DEVICE_CONFIG(XE_LPG_LG_A0, MtlHwConfig, mtlDeviceIds, XE_FAMILY, XE_LPG_RELEASE) +DEVICE_CONFIG(XE_LPG_LG_B0, MtlHwConfig, mtlDeviceIds, XE_FAMILY, XE_LPG_RELEASE) +#endif #ifdef SUPPORT_DG2 DEVICE_CONFIG(DG2_G10_A0, Dg2HwConfig, dg2G10DeviceIds, XE_FAMILY, XE_HPG_RELEASE) DEVICE_CONFIG(DG2_G10_A1, Dg2HwConfig, dg2G10DeviceIds, XE_FAMILY, XE_HPG_RELEASE) diff --git a/shared/source/helpers/CMakeLists.txt b/shared/source/helpers/CMakeLists.txt index 9836f35966..a571dc2e1f 100644 --- a/shared/source/helpers/CMakeLists.txt +++ b/shared/source/helpers/CMakeLists.txt @@ -162,6 +162,12 @@ if(SUPPORT_DG2_AND_LATER) ) endif() +if(SUPPORT_MTL_AND_LATER) + list(APPEND NEO_CORE_HELPERS + ${CMAKE_CURRENT_SOURCE_DIR}/compiler_aot_config_mtl_and_later.inl + ) +endif() + if(SUPPORT_PVC_AND_LATER) list(APPEND NEO_CORE_HELPERS ${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_pvc_and_later.inl diff --git a/shared/source/helpers/compiler_aot_config_mtl_and_later.inl b/shared/source/helpers/compiler_aot_config_mtl_and_later.inl new file mode 100644 index 0000000000..571f2bd572 --- /dev/null +++ b/shared/source/helpers/compiler_aot_config_mtl_and_later.inl @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/compiler_hw_info_config.h" +#include "shared/source/helpers/hw_info.h" + +namespace NEO { +template +void CompilerProductHelperHw::setProductConfigForHwInfo(HardwareInfo &hwInfo, HardwareIpVersion config) const { + hwInfo.ipVersion = config; +} +} // namespace NEO diff --git a/shared/source/helpers/definitions/device_ids_configs_base.h b/shared/source/helpers/definitions/device_ids_configs_base.h index c57d7a271f..d690f29f7f 100644 --- a/shared/source/helpers/definitions/device_ids_configs_base.h +++ b/shared/source/helpers/definitions/device_ids_configs_base.h @@ -11,6 +11,9 @@ #ifdef SUPPORT_DG2 #include "device_ids_configs_dg2.h" #endif +#ifdef SUPPORT_MTL +#include "shared/source/xe_hpg_core/mtl/device_ids_configs_mtl.h" +#endif #endif #if SUPPORT_XE_HPC_CORE diff --git a/shared/source/os_interface/linux/CMakeLists.txt b/shared/source/os_interface/linux/CMakeLists.txt index f124e512b9..72adfd670a 100644 --- a/shared/source/os_interface/linux/CMakeLists.txt +++ b/shared/source/os_interface/linux/CMakeLists.txt @@ -99,6 +99,10 @@ if(SUPPORT_XEHP_AND_LATER) ) endif() +if(SUPPORT_MTL_AND_LATER) + list(APPEND NEO_CORE_OS_INTERFACE_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/hw_info_config_mtl_and_later.inl) +endif() + if(SUPPORT_PVC_AND_LATER) list(APPEND NEO_CORE_OS_INTERFACE_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/hw_info_config_xe_hpc_and_later.inl) endif() diff --git a/shared/source/os_interface/linux/hw_info_config_mtl_and_later.inl b/shared/source/os_interface/linux/hw_info_config_mtl_and_later.inl new file mode 100644 index 0000000000..ce11a62eb2 --- /dev/null +++ b/shared/source/os_interface/linux/hw_info_config_mtl_and_later.inl @@ -0,0 +1,11 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +template <> +bool ProductHelperHw::isPlatformQuerySupported() const { + return true; +} diff --git a/shared/source/xe_hpg_core/definitions/hw_cmds_mtl.inl b/shared/source/xe_hpg_core/definitions/hw_cmds_mtl.inl new file mode 100644 index 0000000000..9b9ddd4799 --- /dev/null +++ b/shared/source/xe_hpg_core/definitions/hw_cmds_mtl.inl @@ -0,0 +1,6 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ diff --git a/shared/source/xe_hpg_core/definitions/hw_info_setup_mtl.inl b/shared/source/xe_hpg_core/definitions/hw_info_setup_mtl.inl new file mode 100644 index 0000000000..64d5bf645c --- /dev/null +++ b/shared/source/xe_hpg_core/definitions/hw_info_setup_mtl.inl @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +const HardwareInfo MTL::hwInfo = MtlHwConfig::hwInfo; +const uint64_t MTL::defaultHardwareInfoConfig = 0; + +void setupMTLHardwareInfoImpl(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig) { + MTL::setupHardwareInfoBase(hwInfo, setupFeatureTableAndWorkaroundTable); + MtlHwConfig::setupHardwareInfo(hwInfo, setupFeatureTableAndWorkaroundTable); +} + +void (*MTL::setupHardwareInfo)(HardwareInfo *, bool, const uint64_t) = setupMTLHardwareInfoImpl; \ No newline at end of file diff --git a/shared/source/xe_hpg_core/enable_compiler_product_helper_mtl.cpp b/shared/source/xe_hpg_core/enable_compiler_product_helper_mtl.cpp new file mode 100644 index 0000000000..cc8b86613d --- /dev/null +++ b/shared/source/xe_hpg_core/enable_compiler_product_helper_mtl.cpp @@ -0,0 +1,20 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/compiler_aot_config_mtl_and_later.inl" +#include "shared/source/helpers/compiler_hw_info_config.h" +#include "shared/source/helpers/compiler_hw_info_config_base.inl" +#include "shared/source/helpers/compiler_hw_info_config_bdw_and_later.inl" +#include "shared/source/helpers/compiler_hw_info_config_before_xe_hpc.inl" + +#include "hw_info_mtl.h" + +namespace NEO { + +static EnableCompilerProductHelper enableCompilerProductHelperMTL; + +} // namespace NEO diff --git a/shared/source/xe_hpg_core/enable_hw_info_config_mtl.cpp b/shared/source/xe_hpg_core/enable_hw_info_config_mtl.cpp new file mode 100644 index 0000000000..7a4fdff36e --- /dev/null +++ b/shared/source/xe_hpg_core/enable_hw_info_config_mtl.cpp @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/os_interface/hw_info_config.h" +#include "shared/source/xe_hpg_core/hw_cmds_mtl.h" + +namespace NEO { + +static EnableProductProductHelper enableMTL; + +} // namespace NEO diff --git a/shared/source/xe_hpg_core/enable_xe_hpg_core.cpp b/shared/source/xe_hpg_core/enable_xe_hpg_core.cpp index 55aa80c0ae..b0a6eab6b7 100644 --- a/shared/source/xe_hpg_core/enable_xe_hpg_core.cpp +++ b/shared/source/xe_hpg_core/enable_xe_hpg_core.cpp @@ -26,4 +26,10 @@ template struct L1CachePolicyHelper; static EnableGfxProductHw enableGfxProductHwDG2; #endif + +#ifdef SUPPORT_MTL +template struct L1CachePolicyHelper; +static EnableGfxProductHw enableGfxProductHwMTL; +#endif + } // namespace NEO diff --git a/shared/source/xe_hpg_core/hw_cmds.h b/shared/source/xe_hpg_core/hw_cmds.h index 6de22719ea..a08058320a 100644 --- a/shared/source/xe_hpg_core/hw_cmds.h +++ b/shared/source/xe_hpg_core/hw_cmds.h @@ -11,3 +11,7 @@ #ifdef SUPPORT_DG2 #include "hw_cmds_dg2.h" #endif + +#ifdef SUPPORT_MTL +#include "hw_cmds_mtl.h" +#endif diff --git a/shared/source/xe_hpg_core/hw_cmds_mtl.h b/shared/source/xe_hpg_core/hw_cmds_mtl.h new file mode 100644 index 0000000000..660a4c0da0 --- /dev/null +++ b/shared/source/xe_hpg_core/hw_cmds_mtl.h @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#pragma once +#include "shared/source/xe_hpg_core/hw_cmds_xe_hpg_core_base.h" +namespace NEO { + +struct MTL : public XeHpgCoreFamily { + static const PLATFORM platform; + static const HardwareInfo hwInfo; + static const uint64_t defaultHardwareInfoConfig; + static FeatureTable featureTable; + static WorkaroundTable workaroundTable; + // Initial non-zero values for unit tests + static const uint32_t threadsPerEu = 8; + static const uint32_t maxEuPerSubslice = 16; + static const uint32_t maxSlicesSupported = 8; + static const uint32_t maxSubslicesSupported = 32; + static const uint32_t maxDualSubslicesSupported = 32; + static const RuntimeCapabilityTable capabilityTable; + static void (*setupHardwareInfo)(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig); + static void setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo); + static void setupHardwareInfoBase(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable); + static void setupHardwareInfoMultiTileBase(HardwareInfo *hwInfo); + + static bool isLpg(const HardwareInfo &hwInfo) { + return ((hwInfo.ipVersion.architecture == 12) && + (hwInfo.ipVersion.release <= 71)); + } +}; + +class MtlHwConfig : public MTL { + public: + static void setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable); + static const HardwareInfo hwInfo; + + private: + static GT_SYSTEM_INFO gtSystemInfo; +}; + +#include "hw_cmds_mtl.inl" +} // namespace NEO diff --git a/shared/source/xe_hpg_core/hw_info.h b/shared/source/xe_hpg_core/hw_info.h index 577ce2c0c5..352f9cb3fa 100644 --- a/shared/source/xe_hpg_core/hw_info.h +++ b/shared/source/xe_hpg_core/hw_info.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -10,3 +10,7 @@ #ifdef SUPPORT_DG2 #include "hw_info_dg2.h" #endif + +#ifdef SUPPORT_MTL +#include "hw_info_mtl.h" +#endif diff --git a/shared/source/xe_hpg_core/hw_info_mtl.cpp b/shared/source/xe_hpg_core/hw_info_mtl.cpp new file mode 100644 index 0000000000..fe23cd26e6 --- /dev/null +++ b/shared/source/xe_hpg_core/hw_info_mtl.cpp @@ -0,0 +1,190 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/aub_mem_dump/definitions/aub_services.h" +#include "shared/source/command_stream/preemption_mode.h" +#include "shared/source/debug_settings/debug_settings_manager.h" +#include "shared/source/helpers/constants.h" +#include "shared/source/xe_hpg_core/hw_cmds_mtl.h" + +#include "aubstream/engine_node.h" + +namespace NEO { + +const char *HwMapper::abbreviation = "mtl"; + +const PLATFORM MTL::platform = { + IGFX_METEORLAKE, + PCH_UNKNOWN, + IGFX_XE_HPG_CORE, + IGFX_XE_HPG_CORE, + PLATFORM_NONE, // default init + 0, // usDeviceID + 0, // usRevId. 0 sets the stepping to A0 + 0, // usDeviceID_PCH + 0, // usRevId_PCH + GTTYPE_UNDEFINED}; + +const RuntimeCapabilityTable MTL::capabilityTable{ + EngineDirectSubmissionInitVec{ + {aub_stream::ENGINE_RCS, {true, true}}, + {aub_stream::ENGINE_CCS, {true, true}}}, // directSubmissionEngines + {0, 0, 0, 0, false, false, false, false}, // kmdNotifyProperties + MemoryConstants::max48BitAddress, // gpuAddressSpace + 0, // sharedSystemMemCapabilities + 83.333, // defaultProfilingTimerResolution + MemoryConstants::pageSize, // requiredPreemptionSurfaceSize + "mtl", // platformType + "", // deviceName + PreemptionMode::ThreadGroup, // defaultPreemptionMode + aub_stream::ENGINE_CCS, // defaultEngineType + 0, // maxRenderFrequency + 30, // clVersionSupport + CmdServicesMemTraceVersion::DeviceValues::Mtl, // aubDeviceId + 0, // extraQuantityThreadsPerEU + 64, // slmSize + sizeof(MTL::GRF), // grfSize + 36u, // timestampValidBits + 32u, // kernelTimestampValidBits + false, // blitterOperationsSupported + true, // ftrSupportsInteger64BitAtomics + true, // ftrSupportsFP64 + true, // ftrSupports64BitMath + true, // ftrSvm + false, // ftrSupportsCoherency + false, // ftrSupportsVmeAvcTextureSampler + false, // ftrSupportsVmeAvcPreemption + false, // ftrRenderCompressedBuffers + false, // ftrRenderCompressedImages + true, // ftr64KBpages + true, // instrumentationEnabled + true, // sourceLevelDebuggerSupported + false, // supportsVme + true, // supportCacheFlushAfterWalker + true, // supportsImages + false, // supportsDeviceEnqueue + false, // supportsPipes + true, // supportsOcl21Features + false, // supportsOnDemandPageFaults + false, // supportsIndependentForwardProgress + false, // hostPtrTrackingEnabled + true, // levelZeroSupported + true, // isIntegratedDevice + true, // supportsMediaBlock + false, // p2pAccessSupported + false, // p2pAtomicAccessSupported + true // fusedEuEnabled +}; + +WorkaroundTable MTL::workaroundTable = {}; +FeatureTable MTL::featureTable = {}; + +void MTL::setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo) { + FeatureTable *featureTable = &hwInfo->featureTable; + WorkaroundTable *workaroundTable = &hwInfo->workaroundTable; + + featureTable->flags.ftrL3IACoherency = true; + featureTable->flags.ftrPPGTT = true; + featureTable->flags.ftrSVM = true; + featureTable->flags.ftrIA32eGfxPTEs = true; + featureTable->flags.ftrStandardMipTailFormat = true; + featureTable->flags.ftrTranslationTable = true; + featureTable->flags.ftrUserModeTranslationTable = true; + featureTable->flags.ftrTileMappedResource = true; + featureTable->flags.ftrFbc = true; + featureTable->flags.ftrAstcHdr2D = true; + featureTable->flags.ftrAstcLdr2D = true; + + featureTable->flags.ftrGpGpuMidBatchPreempt = true; + featureTable->flags.ftrGpGpuThreadGroupLevelPreempt = true; + + featureTable->flags.ftrTileY = false; + featureTable->flags.ftrLinearCCS = true; + featureTable->flags.ftrE2ECompression = false; + featureTable->flags.ftrCCSNode = true; + featureTable->flags.ftrCCSRing = true; + + workaroundTable->flags.wa4kAlignUVOffsetNV12LinearSurface = true; + workaroundTable->flags.waUntypedBufferCompression = true; +}; + +void MTL::setupHardwareInfoBase(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable) { + GT_SYSTEM_INFO *gtSysInfo = &hwInfo->gtSystemInfo; + gtSysInfo->ThreadCount = gtSysInfo->EUCount * MTL::threadsPerEu; + gtSysInfo->TotalVsThreads = 336; + gtSysInfo->TotalHsThreads = 336; + gtSysInfo->TotalDsThreads = 336; + gtSysInfo->TotalGsThreads = 336; + gtSysInfo->TotalPsThreadsWindowerRange = 64; + gtSysInfo->CsrSizeInMb = 8; + gtSysInfo->MaxEuPerSubSlice = MTL::maxEuPerSubslice; + gtSysInfo->MaxSlicesSupported = MTL::maxSlicesSupported; + gtSysInfo->MaxSubSlicesSupported = MTL::maxSubslicesSupported; + gtSysInfo->MaxDualSubSlicesSupported = MTL::maxDualSubslicesSupported; + gtSysInfo->IsL3HashModeEnabled = false; + gtSysInfo->IsDynamicallyPopulated = false; + + gtSysInfo->CCSInfo.IsValid = true; + gtSysInfo->CCSInfo.NumberOfCCSEnabled = 1; + gtSysInfo->CCSInfo.Instances.CCSEnableMask = 0b1; + + if (setupFeatureTableAndWorkaroundTable) { + setupFeatureAndWorkaroundTable(hwInfo); + } +} + +void MTL::setupHardwareInfoMultiTileBase(HardwareInfo *hwInfo) { + GT_SYSTEM_INFO *gtSysInfo = &hwInfo->gtSystemInfo; + gtSysInfo->MultiTileArchInfo.IsValid = false; +} + +const HardwareInfo MtlHwConfig::hwInfo = { + &MTL::platform, + &MTL::featureTable, + &MTL::workaroundTable, + &MtlHwConfig::gtSystemInfo, + MTL::capabilityTable, +}; + +GT_SYSTEM_INFO MtlHwConfig::gtSystemInfo = {0}; +void MtlHwConfig::setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable) { + GT_SYSTEM_INFO *gtSysInfo = &hwInfo->gtSystemInfo; + gtSysInfo->CsrSizeInMb = 8; + gtSysInfo->IsL3HashModeEnabled = false; + gtSysInfo->IsDynamicallyPopulated = false; + + // non-zero values for unit tests + if (gtSysInfo->SliceCount == 0) { + gtSysInfo->SliceCount = 2; + gtSysInfo->SubSliceCount = 8; + gtSysInfo->DualSubSliceCount = gtSysInfo->SubSliceCount; + gtSysInfo->EUCount = 40; + gtSysInfo->MaxEuPerSubSlice = gtSysInfo->EUCount / gtSysInfo->SubSliceCount; + gtSysInfo->MaxSlicesSupported = gtSysInfo->SliceCount; + gtSysInfo->MaxSubSlicesSupported = gtSysInfo->SubSliceCount; + + gtSysInfo->L3CacheSizeInKb = 1; + gtSysInfo->L3BankCount = 1; + + gtSysInfo->CCSInfo.IsValid = true; + gtSysInfo->CCSInfo.NumberOfCCSEnabled = 1; + + hwInfo->featureTable.ftrBcsInfo = 1; + gtSysInfo->IsDynamicallyPopulated = true; + for (uint32_t slice = 0; slice < gtSysInfo->SliceCount; slice++) { + gtSysInfo->SliceInfo[slice].Enabled = true; + } + } + + if (setupFeatureTableAndWorkaroundTable) { + MTL::setupFeatureAndWorkaroundTable(hwInfo); + } +}; + +#include "hw_info_setup_mtl.inl" + +} // namespace NEO diff --git a/shared/source/xe_hpg_core/hw_info_mtl.h b/shared/source/xe_hpg_core/hw_info_mtl.h new file mode 100644 index 0000000000..2a3cc0c0fb --- /dev/null +++ b/shared/source/xe_hpg_core/hw_info_mtl.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#pragma once +#include "shared/source/xe_hpg_core/hw_info_xe_hpg_core.h" + +namespace NEO { + +struct MTL; + +template <> +struct HwMapper { + enum { gfxFamily = IGFX_XE_HPG_CORE }; + + static const char *abbreviation; + typedef GfxFamilyMapper(gfxFamily)>::GfxFamily GfxFamily; + typedef MTL GfxProduct; +}; +} // namespace NEO diff --git a/shared/source/xe_hpg_core/linux/hw_info_config_mtl.cpp b/shared/source/xe_hpg_core/linux/hw_info_config_mtl.cpp new file mode 100644 index 0000000000..d8b7e353a9 --- /dev/null +++ b/shared/source/xe_hpg_core/linux/hw_info_config_mtl.cpp @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/hw_info.h" +#include "shared/source/kernel/kernel_properties.h" +#include "shared/source/os_interface/hw_info_config.h" +#include "shared/source/os_interface/hw_info_config.inl" +#include "shared/source/os_interface/hw_info_config_dg2_and_later.inl" +#include "shared/source/os_interface/hw_info_config_xehp_and_later.inl" +#include "shared/source/xe_hpg_core/hw_cmds_mtl.h" + +#include "platforms.h" + +constexpr static auto gfxProduct = IGFX_METEORLAKE; + +namespace NEO { +#include "shared/source/os_interface/linux/hw_info_config_mtl_and_later.inl" +} // namespace NEO + +#include "shared/source/xe_hpg_core/mtl/os_agnostic_hw_info_config_mtl.inl" +#include "shared/source/xe_hpg_core/os_agnostic_hw_info_config_xe_hpg_core.inl" + +namespace NEO { +template <> +int ProductHelperHw::configureHardwareCustom(HardwareInfo *hwInfo, OSInterface *osIface) const { + enableCompression(hwInfo); + + enableBlitterOperationsSupport(hwInfo); + + auto &kmdNotifyProperties = hwInfo->capabilityTable.kmdNotifyProperties; + kmdNotifyProperties.enableKmdNotify = true; + kmdNotifyProperties.delayKmdNotifyMicroseconds = 150; + kmdNotifyProperties.enableQuickKmdSleepForDirectSubmission = true; + kmdNotifyProperties.delayQuickKmdSleepForDirectSubmissionMicroseconds = 20; + + return 0; +} + +template <> +bool ProductHelperHw::isBlitterForImagesSupported() const { + return true; +} + +template <> +bool ProductHelperHw::isVmBindPatIndexProgrammingSupported() const { + return true; +} + +template class ProductHelperHw; +} // namespace NEO diff --git a/shared/source/xe_hpg_core/mtl/device_ids_configs_mtl.h b/shared/source/xe_hpg_core/mtl/device_ids_configs_mtl.h new file mode 100644 index 0000000000..d963e9ca65 --- /dev/null +++ b/shared/source/xe_hpg_core/mtl/device_ids_configs_mtl.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#pragma once + +#include + +namespace NEO { +inline const std::vector mtlDeviceIds{ + 0x7D40, + 0x7D55, + 0x7DD5, + 0x7D45, + 0x7D60}; +} // namespace NEO \ No newline at end of file diff --git a/shared/source/xe_hpg_core/mtl/os_agnostic_hw_info_config_mtl.inl b/shared/source/xe_hpg_core/mtl/os_agnostic_hw_info_config_mtl.inl new file mode 100644 index 0000000000..f183b025bb --- /dev/null +++ b/shared/source/xe_hpg_core/mtl/os_agnostic_hw_info_config_mtl.inl @@ -0,0 +1,116 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "aubstream/product_family.h" + +namespace NEO { +template <> +void ProductHelperHw::adjustSamplerState(void *sampler, const HardwareInfo &hwInfo) { + using SAMPLER_STATE = typename XeHpgCoreFamily::SAMPLER_STATE; + auto samplerState = reinterpret_cast(sampler); + if (DebugManager.flags.ForceSamplerLowFilteringPrecision.get()) { + samplerState->setLowQualityFilter(SAMPLER_STATE::LOW_QUALITY_FILTER_ENABLE); + } +} + +template <> +uint64_t ProductHelperHw::getHostMemCapabilitiesValue() const { + return (UNIFIED_SHARED_MEMORY_ACCESS | UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS); +} + +template <> +bool ProductHelperHw::isPageTableManagerSupported(const HardwareInfo &hwInfo) const { + return hwInfo.capabilityTable.ftrRenderCompressedBuffers || hwInfo.capabilityTable.ftrRenderCompressedImages; +} + +template <> +uint32_t ProductHelperHw::getHwRevIdFromStepping(uint32_t stepping, const HardwareInfo &hwInfo) const { + switch (stepping) { + case REVISION_A0: + return 0x0; + case REVISION_B: + return 0x1; + } + return CommonConstants::invalidStepping; +} + +template <> +AOT::PRODUCT_CONFIG ProductHelperHw::getProductConfigFromHwInfo(const HardwareInfo &hwInfo) const { + switch (hwInfo.ipVersion.release) { + case 70: + switch (hwInfo.ipVersion.revision) { + case 0: + return AOT::XE_LPG_MD_A0; + case 4: + return AOT::XE_LPG_MD_B0; + default: + return AOT::UNKNOWN_ISA; + } + case 71: + switch (hwInfo.ipVersion.revision) { + case 0: + return AOT::XE_LPG_LG_A0; + case 4: + return AOT::XE_LPG_LG_B0; + default: + return AOT::UNKNOWN_ISA; + } + default: + return AOT::UNKNOWN_ISA; + } +} + +template <> +uint32_t ProductHelperHw::getSteppingFromHwRevId(const HardwareInfo &hwInfo) const { + switch (hwInfo.platform.usRevId) { + case 0x0: + return REVISION_A0; + case 0x1: + return REVISION_B; + } + return CommonConstants::invalidStepping; +} + +template <> +std::pair ProductHelperHw::isPipeControlPriorToNonPipelinedStateCommandsWARequired(const HardwareInfo &hwInfo, bool isRcs) const { + auto isBasicWARequired = GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo, *this); + auto isExtendedWARequired = false; + + return {isBasicWARequired, isExtendedWARequired}; +} + +template <> +bool ProductHelperHw::programAllStateComputeCommandFields() const { + return true; +} + +template <> +bool ProductHelperHw::isBFloat16ConversionSupported(const HardwareInfo &hwInfo) const { + return (MTL::isLpg(hwInfo) == false); +} + +template <> +bool ProductHelperHw::isMatrixMultiplyAccumulateSupported(const HardwareInfo &hwInfo) const { + return (MTL::isLpg(hwInfo) == false); +} + +template <> +bool ProductHelperHw::isAdjustWalkOrderAvailable(const HardwareInfo &hwInfo) const { + return (MTL::isLpg(hwInfo) == false); +} + +template <> +bool ProductHelperHw::isEvictionIfNecessaryFlagSupported() const { + return true; +} + +template <> +std::optional ProductHelperHw::getAubStreamProductFamily() const { + return aub_stream::ProductFamily::Mtl; +}; + +} // namespace NEO diff --git a/shared/source/xe_hpg_core/windows/hw_info_config_mtl.cpp b/shared/source/xe_hpg_core/windows/hw_info_config_mtl.cpp new file mode 100644 index 0000000000..ba5520db2c --- /dev/null +++ b/shared/source/xe_hpg_core/windows/hw_info_config_mtl.cpp @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/kernel/kernel_properties.h" +#include "shared/source/os_interface/hw_info_config.h" +#include "shared/source/os_interface/hw_info_config.inl" +#include "shared/source/os_interface/hw_info_config_dg2_and_later.inl" +#include "shared/source/os_interface/hw_info_config_xehp_and_later.inl" +#include "shared/source/xe_hpg_core/hw_cmds_mtl.h" + +#include "platforms.h" + +constexpr static auto gfxProduct = IGFX_METEORLAKE; + +#include "shared/source/xe_hpg_core/mtl/os_agnostic_hw_info_config_mtl.inl" +#include "shared/source/xe_hpg_core/os_agnostic_hw_info_config_xe_hpg_core.inl" + +template class NEO::ProductHelperHw; diff --git a/shared/test/common/helpers/includes/test_traits_platforms_common.h b/shared/test/common/helpers/includes/test_traits_platforms_common.h index 09a5f26a9d..70d265d7a7 100644 --- a/shared/test/common/helpers/includes/test_traits_platforms_common.h +++ b/shared/test/common/helpers/includes/test_traits_platforms_common.h @@ -1,11 +1,14 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * */ #pragma once +#ifdef TESTS_MTL +#include "shared/test/common/xe_hpg_core/mtl/test_traits_mtl.h" +#endif #ifdef TESTS_DG2 #include "shared/test/common/xe_hpg_core/dg2/test_traits_dg2.h" #endif \ No newline at end of file diff --git a/shared/test/common/test_macros/header/common_matchers.h b/shared/test/common/test_macros/header/common_matchers.h index 3bfd37b448..7a2ba8cd96 100644 --- a/shared/test/common/test_macros/header/common_matchers.h +++ b/shared/test/common/test_macros/header/common_matchers.h @@ -63,12 +63,14 @@ using IsRKL = IsProduct; using IsXEHP = IsProduct; using IsNotXEHP = IsNotWithinProducts; +using IsMTL = IsProduct; using IsDG2 = IsProduct; using IsPVC = IsProduct; using IsAtLeastSkl = IsAtLeastProduct; +using IsAtLeastMtl = IsAtLeastProduct; using IsAtMostDg2 = IsAtMostProduct; using IsNotPVC = IsNotWithinProducts; diff --git a/shared/test/common/test_macros/header/per_product_test_definitions.h b/shared/test/common/test_macros/header/per_product_test_definitions.h index 4cd73dfc43..ef6de24f13 100644 --- a/shared/test/common/test_macros/header/per_product_test_definitions.h +++ b/shared/test/common/test_macros/header/per_product_test_definitions.h @@ -206,6 +206,17 @@ IGFX_XE_HP_SDV) #endif +#ifdef TESTS_MTL +#define MTLTEST_F(test_fixture, test_name) \ + FAMILYTEST_TEST_(test_fixture, test_name, test_fixture, \ + ::testing::internal::GetTypeId(), \ + IGFX_XE_HPG_CORE, IGFX_METEORLAKE) +#define MTLTEST_P(test_suite_name, test_name) \ + FAMILYTEST_TEST_P(test_suite_name, test_name, \ + IGFX_XE_HPG_CORE, \ + IGFX_METEORLAKE) +#endif + #ifdef TESTS_DG2 #define DG2TEST_F(test_fixture, test_name) \ FAMILYTEST_TEST_(test_fixture, test_name, test_fixture, \ diff --git a/shared/test/common/xe_hpg_core/mtl/CMakeLists.txt b/shared/test/common/xe_hpg_core/mtl/CMakeLists.txt new file mode 100644 index 0000000000..c5e9a1bd86 --- /dev/null +++ b/shared/test/common/xe_hpg_core/mtl/CMakeLists.txt @@ -0,0 +1,13 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_MTL) + target_sources(neo_libult_common PRIVATE + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/product_configs_mtl.h + ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_mtl.h + ) +endif() \ No newline at end of file diff --git a/shared/test/common/xe_hpg_core/mtl/mock_hw_info_config_mtl.cpp b/shared/test/common/xe_hpg_core/mtl/mock_hw_info_config_mtl.cpp new file mode 100644 index 0000000000..5ca8bb3642 --- /dev/null +++ b/shared/test/common/xe_hpg_core/mtl/mock_hw_info_config_mtl.cpp @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/test/common/helpers/mock_hw_info_config_hw.h" + +namespace NEO { + +constexpr static auto gfxProduct = IGFX_METEORLAKE; +#include "shared/test/common/helpers/mock_hw_info_config_hw.inl" +template struct MockProductHelperHw; +} // namespace NEO \ No newline at end of file diff --git a/shared/test/common/xe_hpg_core/mtl/product_configs_mtl.h b/shared/test/common/xe_hpg_core/mtl/product_configs_mtl.h new file mode 100644 index 0000000000..3dd074a64c --- /dev/null +++ b/shared/test/common/xe_hpg_core/mtl/product_configs_mtl.h @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#pragma once +#include "platforms.h" + +namespace AOT_MTL { +inline constexpr AOT::PRODUCT_CONFIG productConfigs[] = { + AOT::XE_LPG_MD_A0, + AOT::XE_LPG_MD_B0, + AOT::XE_LPG_LG_A0, + AOT::XE_LPG_LG_B0}; +} \ No newline at end of file diff --git a/shared/test/common/xe_hpg_core/mtl/test_traits_mtl.h b/shared/test/common/xe_hpg_core/mtl/test_traits_mtl.h new file mode 100644 index 0000000000..119786159e --- /dev/null +++ b/shared/test/common/xe_hpg_core/mtl/test_traits_mtl.h @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#pragma once +#include "shared/test/common/helpers/test_traits_platforms.h" + +template <> +struct TestTraitsPlatforms { + static constexpr bool programOnlyChangedFieldsInComputeStateMode = false; +}; diff --git a/shared/test/unit_test/helpers/CMakeLists.txt b/shared/test/unit_test/helpers/CMakeLists.txt index 8449c50ad7..6b381ef665 100644 --- a/shared/test/unit_test/helpers/CMakeLists.txt +++ b/shared/test/unit_test/helpers/CMakeLists.txt @@ -29,6 +29,7 @@ target_sources(neo_shared_tests PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/get_info_tests.cpp ${CMAKE_CURRENT_SOURCE_DIR}/hash_tests.cpp ${CMAKE_CURRENT_SOURCE_DIR}/heap_assigner_shared_tests.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/hw_aot_config_tests.cpp ${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_default_tests.cpp ${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_tests.cpp ${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_tests_dg2_or_below.cpp diff --git a/shared/test/unit_test/helpers/hw_aot_config_tests.cpp b/shared/test/unit_test/helpers/hw_aot_config_tests.cpp new file mode 100644 index 0000000000..1980f682d7 --- /dev/null +++ b/shared/test/unit_test/helpers/hw_aot_config_tests.cpp @@ -0,0 +1,67 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/compiler_hw_info_config.h" +#include "shared/test/unit_test/fixtures/product_config_fixture.h" + +using namespace NEO; + +HWTEST2_P(ProductConfigHwInfoBadArchTests, givenAotConfigWithIncorrectArchWhenGetProductConfigThenUnknownIsaIsReturned, IsAtLeastMtl) { + HardwareIpVersion aotConfig = {0}; + aotConfig.value = productConfig; + hwInfo.ipVersion.architecture = invalidConfig.architecture; + hwInfo.ipVersion.release = aotConfig.release; + hwInfo.ipVersion.revision = aotConfig.revision; + auto ret = productHelper->getProductConfigFromHwInfo(hwInfo); + EXPECT_EQ(ret, AOT::UNKNOWN_ISA); +} + +HWTEST2_P(ProductConfigHwInfoBadRevisionTests, givenAotConfigWithIncorrectRevisionIdWhenGetProductConfigThenUnknownIsaIsReturned, IsAtLeastMtl) { + HardwareIpVersion aotConfig = {0}; + aotConfig.value = productConfig; + hwInfo.ipVersion.architecture = aotConfig.architecture; + hwInfo.ipVersion.release = aotConfig.release; + hwInfo.ipVersion.revision = invalidConfig.revision; + auto ret = productHelper->getProductConfigFromHwInfo(hwInfo); + EXPECT_EQ(ret, AOT::UNKNOWN_ISA); +} + +HWTEST2_P(ProductConfigHwInfoTests, givenAotConfigWhenSetHwInfoGmdIdThenCorrectValueIsSet, IsAtLeastMtl) { + HardwareIpVersion aotConfig = {0}; + aotConfig.value = productConfig; + CompilerProductHelper::get(productFamily)->setProductConfigForHwInfo(hwInfo, aotConfig); + EXPECT_EQ(hwInfo.ipVersion.architecture, aotConfig.architecture); + EXPECT_EQ(hwInfo.ipVersion.release, aotConfig.release); + EXPECT_EQ(hwInfo.ipVersion.revision, aotConfig.revision); +} + +HWTEST2_P(ProductConfigHwInfoTests, givenAotConfigWithIncorrectReleaseWhenGetProductConfigThenUnknownIsaIsReturned, IsAtLeastMtl) { + HardwareIpVersion aotConfig = {0}; + aotConfig.value = productConfig; + hwInfo.ipVersion.architecture = aotConfig.architecture; + hwInfo.ipVersion.release = invalidConfig.release; + hwInfo.ipVersion.revision = aotConfig.revision; + + auto ret = productHelper->getProductConfigFromHwInfo(hwInfo); + EXPECT_EQ(ret, AOT::UNKNOWN_ISA); +} + +HWTEST2_P(ProductConfigHwInfoTests, givenUnknownAotConfigWhenGetProductConfigThenUnknownIsaIsReturned, IsAtLeastMtl) { + hwInfo.ipVersion = {}; + auto ret = productHelper->getProductConfigFromHwInfo(hwInfo); + EXPECT_EQ(ret, AOT::UNKNOWN_ISA); +} + +HWTEST2_P(ProductConfigHwInfoTests, givenAotConfigWhenGetProductConfigThenCorrectValueIsReturned, IsAtLeastMtl) { + HardwareIpVersion aotConfig = {0}; + aotConfig.value = productConfig; + hwInfo.ipVersion.architecture = aotConfig.architecture; + hwInfo.ipVersion.release = aotConfig.release; + hwInfo.ipVersion.revision = aotConfig.revision; + auto ret = productHelper->getProductConfigFromHwInfo(hwInfo); + EXPECT_EQ(ret, productConfig); +} \ No newline at end of file diff --git a/shared/test/unit_test/os_interface/linux/hw_info_config_linux_tests.cpp b/shared/test/unit_test/os_interface/linux/hw_info_config_linux_tests.cpp index f2442c7521..0ea62c52af 100644 --- a/shared/test/unit_test/os_interface/linux/hw_info_config_linux_tests.cpp +++ b/shared/test/unit_test/os_interface/linux/hw_info_config_linux_tests.cpp @@ -349,6 +349,12 @@ TEST_F(MockProductHelperTestLinux, givenFailingGttSizeIoctlWhenInitializingHwInf EXPECT_EQ(pInHwInfo.capabilityTable.gpuAddressSpace, outHwInfo.capabilityTable.gpuAddressSpace); } +HWTEST2_F(MockProductHelperTestLinux, givenPlatformWithPlatformQuerySupportedWhenItIsCalledThenReturnTrue, IsAtLeastMtl) { + HardwareInfo hardwareInfo = *defaultHwInfo; + auto productHelper = ProductHelper::get(hardwareInfo.platform.eProductFamily); + EXPECT_TRUE(productHelper->isPlatformQuerySupported()); +} + using HwConfigLinux = ::testing::Test; HWTEST2_F(HwConfigLinux, GivenDifferentValuesFromTopologyQueryWhenConfiguringHwInfoThenMaxSlicesSupportedSetToAvailableCountInGtSystemInfo, MatchAny) { diff --git a/shared/test/unit_test/xe_hpg_core/mtl/CMakeLists.txt b/shared/test/unit_test/xe_hpg_core/mtl/CMakeLists.txt new file mode 100644 index 0000000000..a92e954169 --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/CMakeLists.txt @@ -0,0 +1,28 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_MTL) + set(NEO_CORE_tests_xe_hpg_core_mtl_excludes ${CMAKE_CURRENT_SOURCE_DIR}/excludes_xe_hpg_core_mtl.cpp) + set_property(GLOBAL APPEND PROPERTY NEO_CORE_tests_excludes ${NEO_CORE_tests_xe_hpg_core_mtl_excludes}) + + target_sources(neo_shared_tests PRIVATE + ${NEO_CORE_tests_xe_hpg_core_mtl_excludes} + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/compute_mode_tests_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/excludes_xe_hpg_core_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/hw_aot_config_tests_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/hw_helper_tests_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/hw_info_config_tests_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/hw_info_tests_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/sampler_tests_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/test_device_caps_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/test_encode_dispatch_kernel_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/test_encode_mtl.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/test_image_surface_state_mtl.cpp + ) + + add_subdirectories() +endif() diff --git a/shared/test/unit_test/xe_hpg_core/mtl/compute_mode_tests_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/compute_mode_tests_mtl.cpp new file mode 100644 index 0000000000..6ab3295e1b --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/compute_mode_tests_mtl.cpp @@ -0,0 +1,177 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/bit_helpers.h" +#include "shared/source/helpers/ptr_math.h" +#include "shared/test/common/helpers/debug_manager_state_restore.h" +#include "shared/test/common/helpers/engine_descriptor_helper.h" +#include "shared/test/common/helpers/unit_test_helper.h" +#include "shared/test/common/mocks/mock_allocation_properties.h" +#include "shared/test/common/mocks/mock_device.h" +#include "shared/test/common/mocks/mock_os_context.h" +#include "shared/test/unit_test/command_stream/compute_mode_tests.h" + +#include "test_traits_common.h" + +using namespace NEO; + +using MtlComputeModeRequirements = ComputeModeRequirements; + +MTLTEST_F(MtlComputeModeRequirements, givenFlushWithoutSharedHandlesWhenPreviouslyUsedThenPcAndSCMAreNotProgrammed) { + setUpImpl(); + using STATE_COMPUTE_MODE = typename FamilyType::STATE_COMPUTE_MODE; + using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL; + + auto graphicAlloc = csr->getMemoryManager()->allocateGraphicsMemoryWithProperties(MockAllocationProperties{csr->getRootDeviceIndex(), MemoryConstants::pageSize}); + IndirectHeap stream(graphicAlloc); + + makeResidentSharedAlloc(); + csr->flushTask(stream, 0, &stream, &stream, &stream, 0, flags, *device); + EXPECT_TRUE(getCsrHw()->getCsrRequestFlags()->hasSharedHandles); + auto startOffset = getCsrHw()->commandStream.getUsed(); + + csr->flushTask(stream, 0, &stream, &stream, &stream, 0, flags, *device); + EXPECT_TRUE(getCsrHw()->getCsrRequestFlags()->hasSharedHandles); + + HardwareParse hwParser; + hwParser.parseCommands(getCsrHw()->commandStream, startOffset); + + EXPECT_EQ(0u, hwParser.cmdList.size()); + + csr->getMemoryManager()->freeGraphicsMemory(graphicAlloc); +} + +MTLTEST_F(MtlComputeModeRequirements, givenComputeModeProgrammingWhenLargeGrfModeChangeIsRequiredThenCorrectCommandsAreAdded) { + setUpImpl(); + using STATE_COMPUTE_MODE = typename FamilyType::STATE_COMPUTE_MODE; + using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL; + + auto cmdsSize = sizeof(STATE_COMPUTE_MODE) + sizeof(PIPE_CONTROL); + char buff[1024]{}; + LinearStream stream(buff, 1024); + + auto expectedScmCmd = FamilyType::cmdInitStateComputeMode; + auto expectedBitsMask = FamilyType::stateComputeModeLargeGrfModeMask; + + expectedScmCmd.setLargeGrfMode(true); + + overrideComputeModeRequest(false, false, false, true, 256u); + getCsrHw()->programComputeMode(stream, flags, *defaultHwInfo); + EXPECT_EQ(cmdsSize, stream.getUsed()); + + auto scmCmd = reinterpret_cast(ptrOffset(stream.getCpuBase(), sizeof(PIPE_CONTROL))); + EXPECT_TRUE(isValueSet(scmCmd->getMaskBits(), expectedBitsMask)); + expectedScmCmd.setMaskBits(scmCmd->getMaskBits()); + EXPECT_TRUE(memcmp(&expectedScmCmd, scmCmd, sizeof(STATE_COMPUTE_MODE)) == 0); + + auto startOffset = stream.getUsed(); + + overrideComputeModeRequest(false, false, false, true, 128u); + getCsrHw()->programComputeMode(stream, flags, *defaultHwInfo); + EXPECT_EQ(cmdsSize * 2, stream.getUsed()); + + expectedScmCmd = FamilyType::cmdInitStateComputeMode; + expectedScmCmd.setLargeGrfMode(false); + scmCmd = reinterpret_cast(ptrOffset(stream.getCpuBase(), sizeof(PIPE_CONTROL) + startOffset)); + EXPECT_TRUE(isValueSet(scmCmd->getMaskBits(), expectedBitsMask)); + expectedScmCmd.setMaskBits(scmCmd->getMaskBits()); + EXPECT_TRUE(memcmp(&expectedScmCmd, scmCmd, sizeof(STATE_COMPUTE_MODE)) == 0); +} + +MTLTEST_F(MtlComputeModeRequirements, GivenSingleCCSEnabledSetupThenCorrectCommandsAreAdded) { + HardwareInfo hwInfo = *defaultHwInfo; + hwInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled = 1; + + setUpImpl(&hwInfo); + MockOsContext ccsOsContext(0, EngineDescriptorHelper::getDefaultDescriptor({aub_stream::ENGINE_CCS, EngineUsage::Regular})); + + getCsrHw()->setupContext(ccsOsContext); + + using STATE_COMPUTE_MODE = typename FamilyType::STATE_COMPUTE_MODE; + using FORCE_NON_COHERENT = typename STATE_COMPUTE_MODE::FORCE_NON_COHERENT; + using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL; + + auto cmdsSize = sizeof(STATE_COMPUTE_MODE) + sizeof(PIPE_CONTROL); + char buff[1024] = {0}; + LinearStream stream(buff, 1024); + + auto expectedScmCmd = FamilyType::cmdInitStateComputeMode; + overrideComputeModeRequest(true, false, false, false); + + auto retSize = getCsrHw()->getCmdSizeForComputeMode(); + EXPECT_EQ(cmdsSize, retSize); + + getCsrHw()->programComputeMode(stream, flags, hwInfo); + EXPECT_EQ(cmdsSize, stream.getUsed()); + + auto startOffset = getCsrHw()->commandStream.getUsed(); + + HardwareParse hwParser; + hwParser.parseCommands(stream, startOffset); + + auto pipeControlIterator = find(hwParser.cmdList.begin(), hwParser.cmdList.end()); + auto pipeControlCmd = genCmdCast(*pipeControlIterator); + + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControlCmd)); + EXPECT_TRUE(pipeControlCmd->getUnTypedDataPortCacheFlush()); + + EXPECT_FALSE(pipeControlCmd->getAmfsFlushEnable()); + EXPECT_FALSE(pipeControlCmd->getInstructionCacheInvalidateEnable()); + EXPECT_FALSE(pipeControlCmd->getTextureCacheInvalidationEnable()); + EXPECT_FALSE(pipeControlCmd->getConstantCacheInvalidationEnable()); + EXPECT_FALSE(pipeControlCmd->getStateCacheInvalidationEnable()); + + auto stateComputeModeCmd = reinterpret_cast(ptrOffset(stream.getCpuBase(), sizeof(PIPE_CONTROL))); + expectedScmCmd.setMaskBits(stateComputeModeCmd->getMaskBits()); + EXPECT_TRUE(memcmp(&expectedScmCmd, stateComputeModeCmd, sizeof(STATE_COMPUTE_MODE)) == 0); +} + +MTLTEST_F(MtlComputeModeRequirements, givenComputeModeProgrammingWhenRequiredGRFNumberIsLowerThan128ThenSmallGRFModeIsProgrammed) { + setUpImpl(); + using STATE_COMPUTE_MODE = typename FamilyType::STATE_COMPUTE_MODE; + using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL; + + auto cmdsSize = sizeof(STATE_COMPUTE_MODE) + sizeof(PIPE_CONTROL); + char buff[1024]{}; + LinearStream stream(buff, 1024); + + auto expectedScmCmd = FamilyType::cmdInitStateComputeMode; + expectedScmCmd.setLargeGrfMode(false); + auto expectedBitsMask = FamilyType::stateComputeModeLargeGrfModeMask; + + overrideComputeModeRequest(false, false, false, true, 127u); + getCsrHw()->programComputeMode(stream, flags, *defaultHwInfo); + EXPECT_EQ(cmdsSize, stream.getUsed()); + + auto scmCmd = reinterpret_cast(ptrOffset(stream.getCpuBase(), sizeof(PIPE_CONTROL))); + EXPECT_TRUE(isValueSet(scmCmd->getMaskBits(), expectedBitsMask)); + expectedScmCmd.setMaskBits(scmCmd->getMaskBits()); + EXPECT_TRUE(memcmp(&expectedScmCmd, scmCmd, sizeof(STATE_COMPUTE_MODE)) == 0); +} + +MTLTEST_F(MtlComputeModeRequirements, givenComputeModeProgrammingWhenRequiredGRFNumberIsGreaterThan128ThenLargeGRFModeIsProgrammed) { + setUpImpl(); + using STATE_COMPUTE_MODE = typename FamilyType::STATE_COMPUTE_MODE; + using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL; + + auto cmdsSize = sizeof(STATE_COMPUTE_MODE) + sizeof(PIPE_CONTROL); + char buff[1024]{}; + LinearStream stream(buff, 1024); + + auto expectedScmCmd = FamilyType::cmdInitStateComputeMode; + expectedScmCmd.setLargeGrfMode(true); + auto expectedBitsMask = FamilyType::stateComputeModeLargeGrfModeMask; + + overrideComputeModeRequest(false, false, false, true, 256u); + getCsrHw()->programComputeMode(stream, flags, *defaultHwInfo); + EXPECT_EQ(cmdsSize, stream.getUsed()); + + auto scmCmd = reinterpret_cast(ptrOffset(stream.getCpuBase(), sizeof(PIPE_CONTROL))); + EXPECT_TRUE(isValueSet(scmCmd->getMaskBits(), expectedBitsMask)); + expectedScmCmd.setMaskBits(scmCmd->getMaskBits()); + EXPECT_TRUE(memcmp(&expectedScmCmd, scmCmd, sizeof(STATE_COMPUTE_MODE)) == 0); +} diff --git a/shared/test/unit_test/xe_hpg_core/mtl/excludes_xe_hpg_core_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/excludes_xe_hpg_core_mtl.cpp new file mode 100644 index 0000000000..c49fde7081 --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/excludes_xe_hpg_core_mtl.cpp @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/test/common/test_macros/hw_test_base.h" + +HWTEST_EXCLUDE_PRODUCT(ProductHelperTest, givenProductHelperWhenAskedIfPipeControlPriorToNonPipelinedStateCommandsWARequiredThenFalseIsReturned, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(CommandEncodeStatesImageTest, giveNumSamplersOneWhenDispatchKernelThensamplerStateWasCopied_SamplerSupportedMatcher, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(CommandEncoderTests, givenRequiredWorkGroupOrderWhenCallAdjustWalkOrderThenWalkerIsNotChanged_IsAtMostXeHpcCore, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ComputeModeRequirements, givenCoherencyWithoutSharedHandlesWhenComputeModeIsProgrammedThenCorrectCommandsAreAdded_ForceNonCoherentSupportedMatcher, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ComputeModeRequirements, givenCoherencyWithSharedHandlesWhenComputeModeIsProgrammedThenCorrectCommandsAreAdded_ForceNonCoherentSupportedMatcher, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ComputeModeRequirements, givenCoherencyRequirementWithoutSharedHandlesWhenFlushTaskCalledThenProgramCmdOnlyIfChanged_ForceNonCoherentSupportedMatcher, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ComputeModeRequirements, givenCoherencyRequirementWithSharedHandlesWhenFlushTaskCalledThenProgramCmdsWhenNeeded_ForceNonCoherentSupportedMatcher, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ComputeModeRequirements, givenFlushWithoutSharedHandlesWhenPreviouslyUsedThenProgramPcAndSCM_ForceNonCoherentSupportedMatcher, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ComputeModeRequirements, givenComputeModeProgrammingWhenLargeGrfModeChangeIsRequiredThenCorrectCommandsAreAdded_ForceNonCoherentSupportedMatcher, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ComputeModeRequirements, givenComputeModeProgrammingWhenRequiredGRFNumberIsLowerThan128ThenSmallGRFModeIsProgrammed_ForceNonCoherentSupportedMatcher, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ComputeModeRequirements, givenComputeModeProgrammingWhenRequiredGRFNumberIsGreaterThan128ThenLargeGRFModeIsProgrammed_ForceNonCoherentSupportedMatcher, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ProductHelperTest, givenProductHelperWhenAskedIfPatIndexProgrammingSupportedThenReturnFalse, IGFX_METEORLAKE); +HWTEST_EXCLUDE_PRODUCT(ProductHelperTest, givenProductHelperWhenIsAdjustWalkOrderAvailableCallThenFalseReturn, IGFX_METEORLAKE); diff --git a/shared/test/unit_test/xe_hpg_core/mtl/hw_aot_config_tests_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/hw_aot_config_tests_mtl.cpp new file mode 100644 index 0000000000..78a00360dc --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/hw_aot_config_tests_mtl.cpp @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/test/common/xe_hpg_core/mtl/product_configs_mtl.h" +#include "shared/test/unit_test/fixtures/product_config_fixture.h" + +namespace NEO { +INSTANTIATE_TEST_CASE_P(ProductConfigHwInfoMtlTests, + ProductConfigHwInfoTests, + ::testing::Combine(::testing::ValuesIn(AOT_MTL::productConfigs), + ::testing::Values(IGFX_METEORLAKE))); + +INSTANTIATE_TEST_CASE_P(ProductConfigHwInfoMtlTests, + ProductConfigHwInfoBadRevisionTests, + ::testing::Combine(::testing::Values(AOT::XE_LPG_MD_A0, AOT::XE_LPG_LG_A0), + ::testing::Values(IGFX_METEORLAKE))); + +} // namespace NEO diff --git a/shared/test/unit_test/xe_hpg_core/mtl/hw_helper_tests_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/hw_helper_tests_mtl.cpp new file mode 100644 index 0000000000..1672c126af --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/hw_helper_tests_mtl.cpp @@ -0,0 +1,139 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/hw_helper.h" +#include "shared/source/os_interface/hw_info_config.h" +#include "shared/test/common/fixtures/device_fixture.h" +#include "shared/test/common/helpers/default_hw_info.h" +#include "shared/test/common/helpers/gtest_helpers.h" +#include "shared/test/common/helpers/hw_helper_tests.h" +#include "shared/test/common/helpers/variable_backup.h" +#include "shared/test/common/mocks/ult_device_factory.h" +#include "shared/test/common/test_macros/hw_test.h" + +using namespace NEO; + +using GfxCoreHelperTestMtl = GfxCoreHelperTest; + +MTLTEST_F(GfxCoreHelperTestMtl, givenVariousMtlReleasesWhenGetExtensionsIsCalledThenMatrixMultiplyAccumulateExtensionsAreCorrectlyReported) { + auto &gfxCoreHelper = GfxCoreHelper::get(defaultHwInfo->platform.eRenderCoreFamily); + auto hwInfo = *defaultHwInfo; + unsigned int gmdReleases[] = {70, 71, 72, 73}; + hwInfo.ipVersion.architecture = 12; + + for (auto gmdRelease : gmdReleases) { + hwInfo.ipVersion.release = gmdRelease; + auto extensions = gfxCoreHelper.getExtensions(hwInfo); + + EXPECT_EQ(!MTL::isLpg(hwInfo), hasSubstr(extensions, std::string("cl_intel_subgroup_matrix_multiply_accumulate"))); + EXPECT_EQ(!MTL::isLpg(hwInfo), hasSubstr(extensions, std::string("cl_intel_subgroup_split_matrix_multiply_accumulate"))); + } +} + +using ProductHelperTestMtl = Test; + +MTLTEST_F(ProductHelperTestMtl, givenMtlWhenCallIsAdjustWalkOrderAvailableThenReturnProperValue) { + VariableBackup backupHwInfo(defaultHwInfo.get()); + const auto &productHelper = *ProductHelper::get(defaultHwInfo->platform.eProductFamily); + unsigned int gmdReleases[] = {70, 71, 72, 73}; + defaultHwInfo->ipVersion.architecture = 12; + + for (auto gmdRelease : gmdReleases) { + defaultHwInfo->ipVersion.release = gmdRelease; + EXPECT_EQ(!MTL::isLpg(*defaultHwInfo), productHelper.isAdjustWalkOrderAvailable(*defaultHwInfo)); + } +} + +MTLTEST_F(GfxCoreHelperTestMtl, givenAllocationThenCheckResourceCompatibilityReturnsTrue) { + auto &helper = GfxCoreHelper::get(renderCoreFamily); + auto allocation = std::make_unique(0, AllocationType::BUFFER, nullptr, 0u, 0, MemoryPool::MemoryNull, 3u, 0llu); + EXPECT_TRUE(helper.checkResourceCompatibility(*allocation)); +} + +MTLTEST_F(GfxCoreHelperTestMtl, givenisCompressionEnabledAndWaAuxTable64KGranularWhenCheckIs1MbAlignmentSupportedThenReturnCorrectValue) { + auto &gfxCoreHelper = getHelper(); + + auto hardwareInfo = *defaultHwInfo; + auto isCompressionEnabled = true; + hardwareInfo.workaroundTable.flags.waAuxTable64KGranular = true; + EXPECT_FALSE(gfxCoreHelper.is1MbAlignmentSupported(hardwareInfo, isCompressionEnabled)); + + isCompressionEnabled = false; + hardwareInfo.workaroundTable.flags.waAuxTable64KGranular = true; + EXPECT_FALSE(gfxCoreHelper.is1MbAlignmentSupported(hardwareInfo, isCompressionEnabled)); + + isCompressionEnabled = false; + hardwareInfo.workaroundTable.flags.waAuxTable64KGranular = false; + EXPECT_FALSE(gfxCoreHelper.is1MbAlignmentSupported(hardwareInfo, isCompressionEnabled)); + + isCompressionEnabled = true; + hardwareInfo.workaroundTable.flags.waAuxTable64KGranular = false; + EXPECT_TRUE(gfxCoreHelper.is1MbAlignmentSupported(hardwareInfo, isCompressionEnabled)); +} + +MTLTEST_F(GfxCoreHelperTestMtl, givenRevisionEnumAndPlatformFamilyTypeThenProperValueForIsWorkaroundRequiredIsReturned) { + uint32_t steppings[] = { + REVISION_A0, + REVISION_B, + CommonConstants::invalidStepping, + }; + + auto hardwareInfo = *defaultHwInfo; + const auto &productHelper = getHelper(); + + for (auto stepping : steppings) { + hardwareInfo.platform.usRevId = productHelper.getHwRevIdFromStepping(stepping, hardwareInfo); + + if (stepping == REVISION_A0) { + EXPECT_TRUE(GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_B, hardwareInfo, productHelper)); + } else { + EXPECT_FALSE(GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_B, hardwareInfo, productHelper)); + } + + EXPECT_FALSE(GfxCoreHelper::isWorkaroundRequired(REVISION_B, REVISION_A0, hardwareInfo, productHelper)); + + EXPECT_FALSE(GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_A1, hardwareInfo, productHelper)); + EXPECT_FALSE(GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_C, hardwareInfo, productHelper)); + EXPECT_FALSE(GfxCoreHelper::isWorkaroundRequired(REVISION_A0, REVISION_D, hardwareInfo, productHelper)); + EXPECT_FALSE(GfxCoreHelper::isWorkaroundRequired(REVISION_D, REVISION_A0, hardwareInfo, productHelper)); + } +} + +MTLTEST_F(ProductHelperTestMtl, givenMultitileConfigWhenConfiguringHwInfoThenEnableBlitter) { + auto &productHelper = getHelper(); + + HardwareInfo hwInfo = *defaultHwInfo; + + for (uint32_t tileCount = 0; tileCount <= 4; tileCount++) { + hwInfo.gtSystemInfo.MultiTileArchInfo.TileCount = tileCount; + productHelper.configureHardwareCustom(&hwInfo, nullptr); + + EXPECT_TRUE(hwInfo.capabilityTable.blitterOperationsSupported); + } +} + +MTLTEST_F(GfxCoreHelperTestMtl, givenMtlWhenSetForceNonCoherentThenNothingChanged) { + using FORCE_NON_COHERENT = typename FamilyType::STATE_COMPUTE_MODE::FORCE_NON_COHERENT; + + auto productHelper = ProductHelper::get(productFamily); + + auto stateComputeMode = FamilyType::cmdInitStateComputeMode; + auto properties = StateComputeModeProperties{}; + + properties.isCoherencyRequired.set(true); + productHelper->setForceNonCoherent(&stateComputeMode, properties); + EXPECT_EQ(FORCE_NON_COHERENT::FORCE_NON_COHERENT_FORCE_DISABLED, stateComputeMode.getForceNonCoherent()); + EXPECT_EQ(0u, stateComputeMode.getMaskBits()); +} + +MTLTEST_F(GfxCoreHelperTestMtl, GivenVariousValuesWhenComputeSlmSizeIsCalledThenCorrectValueIsReturned) { + auto hardwareInfo = *defaultHwInfo; + + for (auto &testInput : computeSlmValuesXeHPAndLaterTestsInput) { + EXPECT_EQ(testInput.expected, GfxCoreHelperHw::get().computeSlmValues(hardwareInfo, testInput.slmSize)); + } +} diff --git a/shared/test/unit_test/xe_hpg_core/mtl/hw_info_config_tests_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/hw_info_config_tests_mtl.cpp new file mode 100644 index 0000000000..444a41dd22 --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/hw_info_config_tests_mtl.cpp @@ -0,0 +1,174 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/command_stream/stream_properties.h" +#include "shared/source/helpers/compiler_hw_info_config.h" +#include "shared/source/os_interface/hw_info_config.h" +#include "shared/source/xe_hpg_core/hw_cmds_mtl.h" +#include "shared/test/common/fixtures/device_fixture.h" +#include "shared/test/common/helpers/default_hw_info.h" +#include "shared/test/common/helpers/gtest_helpers.h" +#include "shared/test/common/test_macros/test.h" +#include "shared/test/unit_test/os_interface/hw_info_config_tests.h" + +#include "aubstream/product_family.h" + +using namespace NEO; + +using MtlProductHelper = ProductHelperTest; + +MTLTEST_F(MtlProductHelper, givenMtlConfigWhenSetupHardwareInfoBaseThenGtSystemInfoIsCorrect) { + HardwareInfo hwInfo = *defaultHwInfo; + GT_SYSTEM_INFO >SystemInfo = hwInfo.gtSystemInfo; + MtlHwConfig::setupHardwareInfoBase(&hwInfo, false); + + EXPECT_EQ(336u, gtSystemInfo.TotalVsThreads); + EXPECT_EQ(336u, gtSystemInfo.TotalHsThreads); + EXPECT_EQ(336u, gtSystemInfo.TotalDsThreads); + EXPECT_EQ(336u, gtSystemInfo.TotalGsThreads); + EXPECT_EQ(64u, gtSystemInfo.TotalPsThreadsWindowerRange); + EXPECT_EQ(8u, gtSystemInfo.CsrSizeInMb); + EXPECT_FALSE(gtSystemInfo.IsL3HashModeEnabled); + EXPECT_FALSE(gtSystemInfo.IsDynamicallyPopulated); +} + +MTLTEST_F(MtlProductHelper, givenMtlConfigWhenSetupHardwareInfoThenGtSystemInfoHasNonZeroValues) { + HardwareInfo hwInfo = *defaultHwInfo; + GT_SYSTEM_INFO >SystemInfo = hwInfo.gtSystemInfo; + MtlHwConfig::setupHardwareInfo(&hwInfo, false); + + EXPECT_GT(gtSystemInfo.SliceCount, 0u); + EXPECT_GT(gtSystemInfo.SubSliceCount, 0u); + EXPECT_GT(gtSystemInfo.DualSubSliceCount, 0u); + EXPECT_GT(gtSystemInfo.EUCount, 0u); + EXPECT_GT(gtSystemInfo.MaxEuPerSubSlice, 0u); + EXPECT_GT(gtSystemInfo.MaxSlicesSupported, 0u); + EXPECT_GT_VAL(gtSystemInfo.L3CacheSizeInKb, 0u); + EXPECT_GT(gtSystemInfo.L3BankCount, 0u); + + EXPECT_TRUE(gtSystemInfo.CCSInfo.IsValid); + EXPECT_GT(gtSystemInfo.CCSInfo.NumberOfCCSEnabled, 0u); +} + +MTLTEST_F(MtlProductHelper, whenGettingAubstreamProductFamilyThenProperEnumValueIsReturned) { + EXPECT_EQ(aub_stream::ProductFamily::Mtl, productHelper->getAubStreamProductFamily()); +} + +MTLTEST_F(MtlProductHelper, givenProductHelperWhenGettingEvictIfNecessaryFlagSupportedThenExpectTrue) { + EXPECT_TRUE(productHelper->isEvictionIfNecessaryFlagSupported()); +} + +MTLTEST_F(MtlProductHelper, givenProductHelperWhenGetCommandsStreamPropertiesSupportThenExpectCorrectValues) { + + EXPECT_FALSE(productHelper->getScmPropertyThreadArbitrationPolicySupport()); + EXPECT_TRUE(productHelper->getScmPropertyCoherencyRequiredSupport()); + EXPECT_TRUE(productHelper->getScmPropertyZPassAsyncComputeThreadLimitSupport()); + EXPECT_TRUE(productHelper->getScmPropertyPixelAsyncComputeThreadLimitSupport()); + EXPECT_TRUE(productHelper->getScmPropertyLargeGrfModeSupport()); + EXPECT_FALSE(productHelper->getScmPropertyDevicePreemptionModeSupport()); + + EXPECT_FALSE(productHelper->getStateBaseAddressPropertyGlobalAtomicsSupport()); + EXPECT_TRUE(productHelper->getStateBaseAddressPropertyStatelessMocsSupport()); + EXPECT_TRUE(productHelper->getStateBaseAddressPropertyBindingTablePoolBaseAddressSupport()); + + EXPECT_TRUE(productHelper->getFrontEndPropertyScratchSizeSupport()); + EXPECT_TRUE(productHelper->getFrontEndPropertyPrivateScratchSizeSupport()); + + EXPECT_TRUE(productHelper->getPreemptionDbgPropertyPreemptionModeSupport()); + EXPECT_TRUE(productHelper->getPreemptionDbgPropertyStateSipSupport()); + EXPECT_FALSE(productHelper->getPreemptionDbgPropertyCsrSurfaceSupport()); + + EXPECT_FALSE(productHelper->getFrontEndPropertyComputeDispatchAllWalkerSupport()); + EXPECT_TRUE(productHelper->getFrontEndPropertyDisableEuFusionSupport()); + EXPECT_TRUE(productHelper->getFrontEndPropertyDisableOverDispatchSupport()); + EXPECT_TRUE(productHelper->getFrontEndPropertySingleSliceDispatchCcsModeSupport()); + + EXPECT_TRUE(productHelper->getPipelineSelectPropertyModeSelectedSupport()); + EXPECT_FALSE(productHelper->getPipelineSelectPropertyMediaSamplerDopClockGateSupport()); + EXPECT_TRUE(productHelper->getPipelineSelectPropertySystolicModeSupport()); +} + +MTLTEST_F(MtlProductHelper, givenProductHelperWhenAdditionalKernelExecInfoSupportCheckedThenCorrectValueIsReturned) { + + auto hwInfo = *defaultHwInfo; + EXPECT_TRUE(productHelper->isDisableOverdispatchAvailable(hwInfo)); + + FrontEndPropertiesSupport fePropertiesSupport{}; + productHelper->fillFrontEndPropertiesSupportStructure(fePropertiesSupport, hwInfo); + EXPECT_TRUE(fePropertiesSupport.disableOverdispatch); + + hwInfo.platform.usRevId = productHelper->getHwRevIdFromStepping(REVISION_B, hwInfo); + EXPECT_TRUE(productHelper->isDisableOverdispatchAvailable(hwInfo)); + + productHelper->fillFrontEndPropertiesSupportStructure(fePropertiesSupport, hwInfo); + EXPECT_TRUE(fePropertiesSupport.disableOverdispatch); +} + +MTLTEST_F(MtlProductHelper, givenCompressionFtrEnabledWhenAskingForPageTableManagerThenReturnCorrectValue) { + auto hwInfo = *defaultHwInfo; + + hwInfo.capabilityTable.ftrRenderCompressedBuffers = false; + hwInfo.capabilityTable.ftrRenderCompressedImages = false; + EXPECT_FALSE(productHelper->isPageTableManagerSupported(hwInfo)); + + hwInfo.capabilityTable.ftrRenderCompressedBuffers = true; + hwInfo.capabilityTable.ftrRenderCompressedImages = false; + EXPECT_TRUE(productHelper->isPageTableManagerSupported(hwInfo)); + + hwInfo.capabilityTable.ftrRenderCompressedBuffers = false; + hwInfo.capabilityTable.ftrRenderCompressedImages = true; + EXPECT_TRUE(productHelper->isPageTableManagerSupported(hwInfo)); + + hwInfo.capabilityTable.ftrRenderCompressedBuffers = true; + hwInfo.capabilityTable.ftrRenderCompressedImages = true; + EXPECT_TRUE(productHelper->isPageTableManagerSupported(hwInfo)); +} + +MTLTEST_F(MtlProductHelper, givenSteppingWhenIsPipeControlPriorToNonPipelinedStateCommandsWARequiredIsCalledOnCcsThenThenAllowOnA0) { + HardwareInfo hwInfo = *defaultHwInfo; + auto isRcs = false; + + { + hwInfo.platform.usRevId = productHelper->getHwRevIdFromStepping(REVISION_A0, hwInfo); + const auto &[isBasicWARequired, isExtendedWARequired] = productHelper->isPipeControlPriorToNonPipelinedStateCommandsWARequired(hwInfo, isRcs); + + EXPECT_FALSE(isExtendedWARequired); + EXPECT_TRUE(isBasicWARequired); + } + + { + hwInfo.platform.usRevId = productHelper->getHwRevIdFromStepping(REVISION_B, hwInfo); + const auto &[isBasicWARequired, isExtendedWARequired] = productHelper->isPipeControlPriorToNonPipelinedStateCommandsWARequired(hwInfo, isRcs); + + EXPECT_FALSE(isExtendedWARequired); + EXPECT_FALSE(isBasicWARequired); + } +} + +MTLTEST_F(MtlProductHelper, givenMtlNotLpgWhenIsBFloat16ConversionSupportedIsCalledThenTrueIsReturned) { + auto hwInfo = *defaultHwInfo.get(); + uint32_t notLpgArchitecture = 10; + + HardwareIpVersion aotConfig = {0}; + aotConfig.architecture = notLpgArchitecture; + CompilerProductHelper::get(hwInfo.platform.eProductFamily)->setProductConfigForHwInfo(hwInfo, aotConfig); + + EXPECT_TRUE(productHelper->isBFloat16ConversionSupported(hwInfo)); +} + +MTLTEST_F(MtlProductHelper, givenMtlLpgWhenIsBFloat16ConversionSupportedIsCalledThenFalseIsReturned) { + auto hwInfo = *defaultHwInfo.get(); + uint32_t lpgArchitecture = 12; + uint32_t lpgRelease = 71; + + HardwareIpVersion aotConfig = {0}; + aotConfig.architecture = lpgArchitecture; + aotConfig.release = lpgRelease; + CompilerProductHelper::get(hwInfo.platform.eProductFamily)->setProductConfigForHwInfo(hwInfo, aotConfig); + + EXPECT_FALSE(productHelper->isBFloat16ConversionSupported(hwInfo)); +} diff --git a/shared/test/unit_test/xe_hpg_core/mtl/hw_info_tests_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/hw_info_tests_mtl.cpp new file mode 100644 index 0000000000..4aa189959c --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/hw_info_tests_mtl.cpp @@ -0,0 +1,105 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/helpers/hw_info.h" +#include "shared/test/common/helpers/debug_manager_state_restore.h" +#include "shared/test/common/helpers/default_hw_info.h" +#include "shared/test/common/helpers/gtest_helpers.h" +#include "shared/test/common/test_macros/hw_test.h" + +using namespace NEO; + +using MtlHwInfoTests = ::testing::Test; + +MTLTEST_F(MtlHwInfoTests, WhenSetupHardwareInfoWithSetupFeatureTableFlagTrueOrFalseIsCalledThenFeatureTableHasCorrectValues) { + HardwareInfo hwInfo = *defaultHwInfo; + FeatureTable &featureTable = hwInfo.featureTable; + WorkaroundTable &workaroundTable = hwInfo.workaroundTable; + + EXPECT_FALSE(featureTable.flags.ftrLocalMemory); + EXPECT_FALSE(featureTable.flags.ftrFlatPhysCCS); + EXPECT_FALSE(featureTable.flags.ftrLinearCCS); + EXPECT_FALSE(featureTable.flags.ftrE2ECompression); + EXPECT_FALSE(featureTable.flags.ftrCCSNode); + EXPECT_FALSE(featureTable.flags.ftrCCSRing); + EXPECT_FALSE(featureTable.flags.ftrMultiTileArch); + EXPECT_FALSE(workaroundTable.flags.wa4kAlignUVOffsetNV12LinearSurface); + EXPECT_FALSE(workaroundTable.flags.waUntypedBufferCompression); + + MtlHwConfig::setupHardwareInfo(&hwInfo, false); + EXPECT_FALSE(featureTable.flags.ftrLocalMemory); + EXPECT_FALSE(featureTable.flags.ftrFlatPhysCCS); + EXPECT_FALSE(featureTable.flags.ftrLinearCCS); + EXPECT_FALSE(featureTable.flags.ftrE2ECompression); + EXPECT_FALSE(featureTable.flags.ftrCCSNode); + EXPECT_FALSE(featureTable.flags.ftrCCSRing); + EXPECT_FALSE(featureTable.flags.ftrMultiTileArch); + EXPECT_FALSE(workaroundTable.flags.wa4kAlignUVOffsetNV12LinearSurface); + EXPECT_FALSE(workaroundTable.flags.waUntypedBufferCompression); + + MtlHwConfig::setupHardwareInfo(&hwInfo, true); + EXPECT_FALSE(featureTable.flags.ftrLocalMemory); + EXPECT_FALSE(featureTable.flags.ftrFlatPhysCCS); + EXPECT_TRUE(featureTable.flags.ftrLinearCCS); + EXPECT_FALSE(featureTable.flags.ftrE2ECompression); + EXPECT_TRUE(featureTable.flags.ftrCCSNode); + EXPECT_TRUE(featureTable.flags.ftrCCSRing); + EXPECT_FALSE(featureTable.flags.ftrMultiTileArch); + EXPECT_TRUE(workaroundTable.flags.wa4kAlignUVOffsetNV12LinearSurface); + EXPECT_TRUE(workaroundTable.flags.waUntypedBufferCompression); +} + +MTLTEST_F(MtlHwInfoTests, WhenSetupHardwareInfoWithSetupFeatureTableFlagTrueOrFalseIsCalledThenFeatureTableHasCorrectValueOfFtrLinearCCS) { + HardwareInfo hwInfo = *defaultHwInfo; + FeatureTable &featureTable = hwInfo.featureTable; + + EXPECT_FALSE(featureTable.flags.ftrLinearCCS); + MtlHwConfig::setupHardwareInfo(&hwInfo, false); + EXPECT_FALSE(featureTable.flags.ftrLinearCCS); + MtlHwConfig::setupHardwareInfo(&hwInfo, true); + EXPECT_TRUE(featureTable.flags.ftrLinearCCS); +} + +MTLTEST_F(MtlHwInfoTests, WhenSetupHardwareInfoThenCorrectValuesOfCCSAndMultiTileInfoAreSet) { + HardwareInfo hwInfo = *defaultHwInfo; + GT_SYSTEM_INFO >SystemInfo = hwInfo.gtSystemInfo; + + MtlHwConfig::setupHardwareInfo(&hwInfo, false); + + EXPECT_FALSE(gtSystemInfo.MultiTileArchInfo.IsValid); + + EXPECT_TRUE(gtSystemInfo.CCSInfo.IsValid); + EXPECT_TRUE(1u == gtSystemInfo.CCSInfo.NumberOfCCSEnabled); + EXPECT_TRUE(0b1u == gtSystemInfo.CCSInfo.Instances.CCSEnableMask); +} + +MTLTEST_F(MtlHwInfoTests, GivenEmptyHwInfoForUnitTestsWhenSetupHardwareInfoIsCalledThenNonZeroValuesAreSet) { + HardwareInfo hwInfoToSet; + GT_SYSTEM_INFO >SystemInfo = hwInfoToSet.gtSystemInfo; + + MtlHwConfig::setupHardwareInfo(&hwInfoToSet, false); + + EXPECT_GT_VAL(gtSystemInfo.SliceCount, 0u); + EXPECT_GT_VAL(gtSystemInfo.SubSliceCount, 0u); + EXPECT_GT_VAL(gtSystemInfo.DualSubSliceCount, 0u); + EXPECT_GT_VAL(gtSystemInfo.EUCount, 0u); + EXPECT_GT_VAL(gtSystemInfo.MaxEuPerSubSlice, 0u); + EXPECT_GT_VAL(gtSystemInfo.MaxSlicesSupported, 0u); + EXPECT_GT_VAL(gtSystemInfo.MaxSubSlicesSupported, 0u); + + EXPECT_GT_VAL(gtSystemInfo.L3BankCount, 0u); + + EXPECT_TRUE(gtSystemInfo.CCSInfo.IsValid); + EXPECT_GT_VAL(gtSystemInfo.CCSInfo.NumberOfCCSEnabled, 0u); + + EXPECT_NE_VAL(hwInfoToSet.featureTable.ftrBcsInfo, 0u); + EXPECT_TRUE(gtSystemInfo.IsDynamicallyPopulated); + + for (uint32_t i = 0; i < gtSystemInfo.SliceCount; i++) { + EXPECT_TRUE(gtSystemInfo.SliceInfo[i].Enabled); + } +} diff --git a/shared/test/unit_test/xe_hpg_core/mtl/linux/CMakeLists.txt b/shared/test/unit_test/xe_hpg_core/mtl/linux/CMakeLists.txt new file mode 100644 index 0000000000..ec482c7c80 --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/linux/CMakeLists.txt @@ -0,0 +1,9 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(UNIX) + target_sources(neo_shared_tests PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/hw_info_config_tests_mtl.cpp) +endif() diff --git a/shared/test/unit_test/xe_hpg_core/mtl/linux/hw_info_config_tests_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/linux/hw_info_config_tests_mtl.cpp new file mode 100644 index 0000000000..f3d078ba87 --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/linux/hw_info_config_tests_mtl.cpp @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2021-2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/os_interface/os_interface.h" +#include "shared/test/common/helpers/default_hw_info.h" +#include "shared/test/common/helpers/gtest_helpers.h" +#include "shared/test/common/libult/linux/drm_mock.h" +#include "shared/test/unit_test/os_interface/linux/hw_info_config_linux_tests.h" + +using namespace NEO; + +struct MtlProductHelperLinux : ProductHelperTestLinux { + void SetUp() override { + ProductHelperTestLinux::SetUp(); + + drm = new DrmMock(*executionEnvironment->rootDeviceEnvironments[0]); + osInterface->setDriverModel(std::unique_ptr(drm)); + } +}; + +MTLTEST_F(MtlProductHelperLinux, WhenConfiguringHwInfoThenZeroIsReturned) { + auto ret = productHelper->configureHwInfoDrm(&pInHwInfo, &outHwInfo, getRootDeviceEnvironment()); + EXPECT_EQ(0, ret); +} + +MTLTEST_F(MtlProductHelperLinux, GivenMtlWhenConfigureHardwareCustomThenKmdNotifyIsEnabled) { + OSInterface osIface; + productHelper->configureHardwareCustom(&pInHwInfo, &osIface); + EXPECT_TRUE(pInHwInfo.capabilityTable.kmdNotifyProperties.enableKmdNotify); + EXPECT_EQ(150ll, pInHwInfo.capabilityTable.kmdNotifyProperties.delayKmdNotifyMicroseconds); + EXPECT_TRUE(pInHwInfo.capabilityTable.kmdNotifyProperties.enableQuickKmdSleepForDirectSubmission); + EXPECT_EQ(20ll, pInHwInfo.capabilityTable.kmdNotifyProperties.delayQuickKmdSleepForDirectSubmissionMicroseconds); +} + +MTLTEST_F(MtlProductHelperLinux, givenMtlWhenIsBlitterForImagesSupportedIsCalledThenTrueIsReturned) { + EXPECT_TRUE(productHelper->isBlitterForImagesSupported()); +} + +MTLTEST_F(MtlProductHelperLinux, givenMtlWhenisVmBindPatIndexProgrammingSupportedIsCalledThenTrueIsReturned) { + EXPECT_TRUE(productHelper->isVmBindPatIndexProgrammingSupported()); +} diff --git a/shared/test/unit_test/xe_hpg_core/mtl/sampler_tests_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/sampler_tests_mtl.cpp new file mode 100644 index 0000000000..ed8b4292cc --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/sampler_tests_mtl.cpp @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/debug_settings/debug_settings_manager.h" +#include "shared/source/os_interface/hw_info_config.h" +#include "shared/test/common/helpers/debug_manager_state_restore.h" +#include "shared/test/common/helpers/default_hw_info.h" +#include "shared/test/common/test_macros/hw_test.h" + +#include + +using namespace NEO; + +using SamplerTestMtl = ::testing::Test; + +HWTEST2_F(SamplerTestMtl, givenMtlSamplerWhenUsingDefaultFilteringAndAppendSamplerStateParamsThenDisableLowQualityFilter, IsMTL) { + EXPECT_FALSE(DebugManager.flags.ForceSamplerLowFilteringPrecision.get()); + typedef typename FamilyType::SAMPLER_STATE SAMPLER_STATE; + auto state = FamilyType::cmdInitSamplerState; + EXPECT_EQ(SAMPLER_STATE::LOW_QUALITY_FILTER_DISABLE, state.getLowQualityFilter()); + ProductHelper::get(defaultHwInfo->platform.eProductFamily)->adjustSamplerState(&state, *defaultHwInfo); + EXPECT_EQ(SAMPLER_STATE::LOW_QUALITY_FILTER_DISABLE, state.getLowQualityFilter()); +} + +HWTEST2_F(SamplerTestMtl, giveMtlSamplerWhenForcingLowQualityFilteringAndAppendSamplerStateParamsThenEnableLowQualityFilter, IsMTL) { + DebugManagerStateRestore dbgRestore; + DebugManager.flags.ForceSamplerLowFilteringPrecision.set(true); + EXPECT_TRUE(DebugManager.flags.ForceSamplerLowFilteringPrecision.get()); + typedef typename FamilyType::SAMPLER_STATE SAMPLER_STATE; + auto state = FamilyType::cmdInitSamplerState; + EXPECT_EQ(SAMPLER_STATE::LOW_QUALITY_FILTER_DISABLE, state.getLowQualityFilter()); + ProductHelper::get(defaultHwInfo->platform.eProductFamily)->adjustSamplerState(&state, *defaultHwInfo); + EXPECT_EQ(SAMPLER_STATE::LOW_QUALITY_FILTER_ENABLE, state.getLowQualityFilter()); +} diff --git a/shared/test/unit_test/xe_hpg_core/mtl/test_device_caps_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/test_device_caps_mtl.cpp new file mode 100644 index 0000000000..dd9a70ad44 --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/test_device_caps_mtl.cpp @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/test/common/fixtures/device_fixture.h" +#include "shared/test/common/test_macros/hw_test.h" + +using namespace NEO; + +using MtlUsDeviceIdTest = Test; + +MTLTEST_F(MtlUsDeviceIdTest, givenMtlProductWhenCheckFp64SupportThenReturnFalse) { + EXPECT_TRUE(pDevice->getHardwareInfo().capabilityTable.ftrSupportsFP64); +} diff --git a/shared/test/unit_test/xe_hpg_core/mtl/test_encode_dispatch_kernel_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/test_encode_dispatch_kernel_mtl.cpp new file mode 100644 index 0000000000..447cdfac6b --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/test_encode_dispatch_kernel_mtl.cpp @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/gmm_helper/gmm_helper.h" +#include "shared/source/helpers/hw_helper.h" +#include "shared/test/common/cmd_parse/gen_cmd_parse.h" +#include "shared/test/unit_test/fixtures/command_container_fixture.h" +#include "shared/test/unit_test/mocks/mock_dispatch_kernel_encoder_interface.h" + +using namespace NEO; +using CommandEncodeStatesTest = Test; + +HWTEST2_F(CommandEncodeStatesTest, givenEventAddressWhenEncodeAndMtlThenMocsIndex2IsSet, IsMTL) { + using POSTSYNC_DATA = typename FamilyType::POSTSYNC_DATA; + using WALKER_TYPE = typename FamilyType::WALKER_TYPE; + uint32_t dims[] = {2, 1, 1}; + std::unique_ptr dispatchInterface(new MockDispatchKernelEncoder()); + uint64_t eventAddress = MemoryConstants::cacheLineSize * 123; + + bool requiresUncachedMocs = false; + EncodeDispatchKernelArgs dispatchArgs = createDefaultDispatchKernelArgs(pDevice, dispatchInterface.get(), dims, requiresUncachedMocs); + dispatchArgs.eventAddress = eventAddress; + dispatchArgs.isTimestampEvent = true; + dispatchArgs.dcFlushEnable = MemorySynchronizationCommands::getDcFlushEnable(true, pDevice->getHardwareInfo()); + + EncodeDispatchKernel::encode(*cmdContainer.get(), dispatchArgs, nullptr); + + GenCmdList commands; + CmdParse::parseCommandBuffer(commands, ptrOffset(cmdContainer->getCommandStream()->getCpuBase(), 0), cmdContainer->getCommandStream()->getUsed()); + + using WALKER_TYPE = typename FamilyType::WALKER_TYPE; + auto itor = find(commands.begin(), commands.end()); + ASSERT_NE(itor, commands.end()); + auto cmd = genCmdCast(*itor); + + auto gmmHelper = pDevice->getGmmHelper(); + + EXPECT_EQ(gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED), cmd->getPostSync().getMocs()); +} diff --git a/shared/test/unit_test/xe_hpg_core/mtl/test_encode_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/test_encode_mtl.cpp new file mode 100644 index 0000000000..5c7f45de71 --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/test_encode_mtl.cpp @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/command_container/command_encoder.h" +#include "shared/source/command_stream/linear_stream.h" +#include "shared/source/command_stream/stream_properties.h" +#include "shared/source/xe_hpg_core/hw_cmds_mtl.h" +#include "shared/test/common/helpers/default_hw_info.h" +#include "shared/test/common/test_macros/header/per_product_test_definitions.h" +#include "shared/test/common/test_macros/test.h" + +using namespace NEO; + +using CommandEncodeMTLTest = ::testing::Test; + +MTLTEST_F(CommandEncodeMTLTest, whenProgrammingStateComputeModeThenProperFieldsAreSet) { + using STATE_COMPUTE_MODE = typename FamilyType::STATE_COMPUTE_MODE; + using PIXEL_ASYNC_COMPUTE_THREAD_LIMIT = typename STATE_COMPUTE_MODE::PIXEL_ASYNC_COMPUTE_THREAD_LIMIT; + using Z_PASS_ASYNC_COMPUTE_THREAD_LIMIT = typename STATE_COMPUTE_MODE::Z_PASS_ASYNC_COMPUTE_THREAD_LIMIT; + uint8_t buffer[64]{}; + + StateComputeModeProperties properties; + auto pLinearStream = std::make_unique(buffer, sizeof(buffer)); + EncodeComputeMode::programComputeModeCommand(*pLinearStream, properties, *defaultHwInfo, nullptr); + auto pScm = reinterpret_cast(pLinearStream->getCpuBase()); + auto expectedMask = FamilyType::stateComputeModeLargeGrfModeMask; + EXPECT_EQ(expectedMask, pScm->getMaskBits()); + EXPECT_EQ(STATE_COMPUTE_MODE::PIXEL_ASYNC_COMPUTE_THREAD_LIMIT_DISABLED, pScm->getPixelAsyncComputeThreadLimit()); + EXPECT_EQ(STATE_COMPUTE_MODE::Z_PASS_ASYNC_COMPUTE_THREAD_LIMIT_MAX_60, pScm->getZPassAsyncComputeThreadLimit()); + EXPECT_FALSE(pScm->getLargeGrfMode()); + + properties.isCoherencyRequired.value = 1; + properties.zPassAsyncComputeThreadLimit.value = 1; + properties.pixelAsyncComputeThreadLimit.value = 1; + properties.largeGrfMode.value = 1; + pLinearStream = std::make_unique(buffer, sizeof(buffer)); + EncodeComputeMode::programComputeModeCommand(*pLinearStream, properties, *defaultHwInfo, nullptr); + pScm = reinterpret_cast(pLinearStream->getCpuBase()); + expectedMask |= FamilyType::stateComputeModeZPassAsyncComputeThreadLimitMask | + FamilyType::stateComputeModePixelAsyncComputeThreadLimitMask; + EXPECT_EQ(expectedMask, pScm->getMaskBits()); + EXPECT_EQ(STATE_COMPUTE_MODE::PIXEL_ASYNC_COMPUTE_THREAD_LIMIT_MAX_2, pScm->getPixelAsyncComputeThreadLimit()); + EXPECT_EQ(STATE_COMPUTE_MODE::Z_PASS_ASYNC_COMPUTE_THREAD_LIMIT_MAX_64, pScm->getZPassAsyncComputeThreadLimit()); + EXPECT_TRUE(pScm->getLargeGrfMode()); +} diff --git a/shared/test/unit_test/xe_hpg_core/mtl/test_image_surface_state_mtl.cpp b/shared/test/unit_test/xe_hpg_core/mtl/test_image_surface_state_mtl.cpp new file mode 100644 index 0000000000..9599d85091 --- /dev/null +++ b/shared/test/unit_test/xe_hpg_core/mtl/test_image_surface_state_mtl.cpp @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/source/xe_hpg_core/hw_cmds_mtl.h" +#include "shared/test/common/test_macros/header/per_product_test_definitions.h" +#include "shared/test/unit_test/image/image_surface_state_fixture.h" + +using namespace NEO; + +using ImageSurfaceStateTestsMtl = ImageSurfaceStateTests; + +MTLTEST_F(ImageSurfaceStateTestsMtl, givenMtlWhenCallSetFilterModeThenDisallowLowQualityFliteringIsAllwaysFalse) { + auto size = sizeof(typename FamilyType::RENDER_SURFACE_STATE); + auto surfaceState = std::make_unique(size); + auto castSurfaceState = reinterpret_cast(surfaceState.get()); + + setFilterMode(castSurfaceState, &pDevice->getHardwareInfo()); + EXPECT_FALSE(castSurfaceState->getDisallowLowQualityFiltering()); +} + +MTLTEST_F(ImageSurfaceStateTestsMtl, givenMtlWhenCallSetImageSurfaceStateThenDisallowLowQualityFliteringIsAllwaysFalse) { + auto size = sizeof(typename FamilyType::RENDER_SURFACE_STATE); + auto surfaceState = std::make_unique(size); + auto castSurfaceState = reinterpret_cast(surfaceState.get()); + const uint32_t cubeFaceIndex = 2u; + + SurfaceFormatInfo surfaceFormatInfo; + surfaceFormatInfo.GenxSurfaceFormat = GFX3DSTATE_SURFACEFORMAT::GFX3DSTATE_SURFACEFORMAT_A32_FLOAT; + imageInfo.surfaceFormat = &surfaceFormatInfo; + SurfaceOffsets surfaceOffsets; + surfaceOffsets.offset = 0u; + surfaceOffsets.xOffset = 11u; + surfaceOffsets.yOffset = 12u; + surfaceOffsets.yOffsetForUVplane = 13u; + + const uint64_t gpuAddress = 0x000001a78a8a8000; + + setImageSurfaceState(castSurfaceState, imageInfo, mockGmm.get(), *gmmHelper, cubeFaceIndex, gpuAddress, surfaceOffsets, true); + EXPECT_FALSE(castSurfaceState->getDisallowLowQualityFiltering()); +} diff --git a/target_unit_tests/xe_hpg_core/mtl/CMakeLists.txt b/target_unit_tests/xe_hpg_core/mtl/CMakeLists.txt new file mode 100644 index 0000000000..b373254059 --- /dev/null +++ b/target_unit_tests/xe_hpg_core/mtl/CMakeLists.txt @@ -0,0 +1,9 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_MTL) + include(${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}enable_mtl_testing.cmake) +endif() diff --git a/target_unit_tests/xe_hpg_core/mtl/enable_mtl_testing.cmake b/target_unit_tests/xe_hpg_core/mtl/enable_mtl_testing.cmake new file mode 100644 index 0000000000..7be814fdb2 --- /dev/null +++ b/target_unit_tests/xe_hpg_core/mtl/enable_mtl_testing.cmake @@ -0,0 +1,10 @@ +# +# Copyright (C) 2022 Intel Corporation +# +# SPDX-License-Identifier: MIT +# + +if(TESTS_MTL) + set(unit_test_config "mtl/2/4/5/0") # non-zero values for unit tests + include(${NEO_SOURCE_DIR}/cmake/run_ult_target.cmake) +endif() diff --git a/third_party/aot_config_headers/platforms.h b/third_party/aot_config_headers/platforms.h index 9651ba165f..056d615503 100644 --- a/third_party/aot_config_headers/platforms.h +++ b/third_party/aot_config_headers/platforms.h @@ -48,6 +48,10 @@ enum PRODUCT_CONFIG : uint32_t { PVC_XT_B0 = 0x030f0005, PVC_XT_B1 = 0x030f0006, PVC_XT_C0 = 0x030f0007, + XE_LPG_MD_A0 = 0x03118000, + XE_LPG_MD_B0 = 0x03118004, + XE_LPG_LG_A0 = 0x0311c000, + XE_LPG_LG_B0 = 0x0311c004, CONFIG_MAX_PLATFORM, }; @@ -60,6 +64,7 @@ enum RELEASE : uint32_t { XE_HP_RELEASE, XE_HPG_RELEASE, XE_HPC_RELEASE, + XE_LPG_RELEASE, RELEASE_MAX, };