From ab090b515c01b4145fb69ae995dd3af4b764ea7d Mon Sep 17 00:00:00 2001 From: Mateusz Jablonski Date: Mon, 16 Sep 2024 11:52:32 +0000 Subject: [PATCH] refactor: remove not needed code Signed-off-by: Mateusz Jablonski --- opencl/source/command_queue/gpgpu_walker.h | 11 -- .../command_queue/gpgpu_walker_base.inl | 106 ------------------ .../gpgpu_walker_bdw_and_later.inl | 5 - .../hardware_interface_bdw_and_later.inl | 18 --- .../cl_gfx_core_helper_bdw_and_later.inl | 5 - .../product_helper_bdw_and_later.inl | 5 - 6 files changed, 150 deletions(-) diff --git a/opencl/source/command_queue/gpgpu_walker.h b/opencl/source/command_queue/gpgpu_walker.h index d27ee5d2d6..026c222ebe 100644 --- a/opencl/source/command_queue/gpgpu_walker.h +++ b/opencl/source/command_queue/gpgpu_walker.h @@ -28,11 +28,6 @@ class GpgpuWalkerHelper { using DefaultWalkerType = typename GfxFamily::DefaultWalkerType; public: - static void applyWADisableLSQCROPERFforOCL(LinearStream *pCommandStream, - const Kernel &kernel, - bool disablePerfMode); - - static size_t getSizeForWADisableLSQCROPERFforOCL(const Kernel *pKernel); static size_t getSizeForWaDisableRccRhwoOptimization(const Kernel *pKernel); template @@ -78,12 +73,6 @@ class GpgpuWalkerHelper { private: using PIPE_CONTROL = typename GfxFamily::PIPE_CONTROL; - - static void addAluReadModifyWriteRegister( - LinearStream *pCommandStream, - uint32_t aluRegister, - AluRegisters operation, - uint32_t mask); }; template diff --git a/opencl/source/command_queue/gpgpu_walker_base.inl b/opencl/source/command_queue/gpgpu_walker_base.inl index 2da4f5783c..b34795e737 100644 --- a/opencl/source/command_queue/gpgpu_walker_base.inl +++ b/opencl/source/command_queue/gpgpu_walker_base.inl @@ -23,103 +23,6 @@ namespace NEO { -// Performs ReadModifyWrite operation on value of a register: Register = Register Operation Mask -template -void GpgpuWalkerHelper::addAluReadModifyWriteRegister( - LinearStream *pCommandStream, - uint32_t aluRegister, - AluRegisters operation, - uint32_t mask) { - // Load "Register" value into CS_GPR_R0 - using MI_LOAD_REGISTER_REG = typename GfxFamily::MI_LOAD_REGISTER_REG; - using MI_MATH = typename GfxFamily::MI_MATH; - using MI_MATH_ALU_INST_INLINE = typename GfxFamily::MI_MATH_ALU_INST_INLINE; - - auto pCmd = pCommandStream->getSpaceForCmd(); - MI_LOAD_REGISTER_REG cmdReg = GfxFamily::cmdInitLoadRegisterReg; - cmdReg.setSourceRegisterAddress(aluRegister); - cmdReg.setDestinationRegisterAddress(RegisterOffsets::csGprR0); - *pCmd = cmdReg; - - // Load "Mask" into CS_GPR_R1 - LriHelper::program(pCommandStream, - RegisterOffsets::csGprR1, - mask, - false, - false); - - // Add instruction MI_MATH with 4 MI_MATH_ALU_INST_INLINE operands - auto pCmd3 = reinterpret_cast(pCommandStream->getSpace(sizeof(MI_MATH) + RegisterConstants::numAluInstForReadModifyWrite * sizeof(MI_MATH_ALU_INST_INLINE))); - MI_MATH mathCmd; - mathCmd.DW0.Value = 0x0; - mathCmd.DW0.BitField.InstructionType = MI_MATH::COMMAND_TYPE_MI_COMMAND; - mathCmd.DW0.BitField.InstructionOpcode = MI_MATH::MI_COMMAND_OPCODE_MI_MATH; - // 0x3 - 5 Dwords length cmd (-2): 1 for MI_MATH, 4 for MI_MATH_ALU_INST_INLINE - mathCmd.DW0.BitField.DwordLength = RegisterConstants::numAluInstForReadModifyWrite - 1; - *reinterpret_cast(pCmd3) = mathCmd; - - pCmd3++; - MI_MATH_ALU_INST_INLINE *pAluParam = reinterpret_cast(pCmd3); - MI_MATH_ALU_INST_INLINE cmdAluParam; - cmdAluParam.DW0.Value = 0x0; - - // Setup first operand of MI_MATH - load CS_GPR_R0 into register A - cmdAluParam.DW0.BitField.ALUOpcode = - static_cast(AluRegisters::opcodeLoad); - cmdAluParam.DW0.BitField.Operand1 = - static_cast(AluRegisters::srca); - cmdAluParam.DW0.BitField.Operand2 = - static_cast(AluRegisters::gpr0); - *pAluParam = cmdAluParam; - pAluParam++; - - cmdAluParam.DW0.Value = 0x0; - // Setup second operand of MI_MATH - load CS_GPR_R1 into register B - cmdAluParam.DW0.BitField.ALUOpcode = - static_cast(AluRegisters::opcodeLoad); - cmdAluParam.DW0.BitField.Operand1 = - static_cast(AluRegisters::srcb); - cmdAluParam.DW0.BitField.Operand2 = - static_cast(AluRegisters::gpr1); - *pAluParam = cmdAluParam; - pAluParam++; - - cmdAluParam.DW0.Value = 0x0; - // Setup third operand of MI_MATH - "Operation" on registers A and B - cmdAluParam.DW0.BitField.ALUOpcode = static_cast(operation); - cmdAluParam.DW0.BitField.Operand1 = 0; - cmdAluParam.DW0.BitField.Operand2 = 0; - *pAluParam = cmdAluParam; - pAluParam++; - - cmdAluParam.DW0.Value = 0x0; - // Setup fourth operand of MI_MATH - store result into CS_GPR_R0 - cmdAluParam.DW0.BitField.ALUOpcode = - static_cast(AluRegisters::opcodeStore); - cmdAluParam.DW0.BitField.Operand1 = - static_cast(AluRegisters::gpr0); - cmdAluParam.DW0.BitField.Operand2 = - static_cast(AluRegisters::accu); - *pAluParam = cmdAluParam; - - // LOAD value of CS_GPR_R0 into "Register" - auto pCmd4 = pCommandStream->getSpaceForCmd(); - cmdReg = GfxFamily::cmdInitLoadRegisterReg; - cmdReg.setSourceRegisterAddress(RegisterOffsets::csGprR0); - cmdReg.setDestinationRegisterAddress(aluRegister); - *pCmd4 = cmdReg; - - // Add PIPE_CONTROL to flush caches - auto pCmd5 = pCommandStream->getSpaceForCmd(); - PIPE_CONTROL cmdPipeControl = GfxFamily::cmdInitPipeControl; - cmdPipeControl.setCommandStreamerStallEnable(true); - cmdPipeControl.setDcFlushEnable(true); - cmdPipeControl.setTextureCacheInvalidationEnable(true); - cmdPipeControl.setPipeControlFlushEnable(true); - cmdPipeControl.setStateCacheInvalidationEnable(true); - *pCmd5 = cmdPipeControl; -} - template void GpgpuWalkerHelper::dispatchPerfCountersCommandsStart( CommandQueue &commandQueue, @@ -152,15 +55,6 @@ void GpgpuWalkerHelper::dispatchPerfCountersCommandsEnd( pPerformanceCounters->getGpuCommands(commandBufferType, hwPerfCounter, false, size, pBuffer); } -template -void GpgpuWalkerHelper::applyWADisableLSQCROPERFforOCL(NEO::LinearStream *pCommandStream, const Kernel &kernel, bool disablePerfMode) { -} - -template -size_t GpgpuWalkerHelper::getSizeForWADisableLSQCROPERFforOCL(const Kernel *pKernel) { - return (size_t)0; -} - template size_t GpgpuWalkerHelper::getSizeForWaDisableRccRhwoOptimization(const Kernel *pKernel) { return 0u; diff --git a/opencl/source/command_queue/gpgpu_walker_bdw_and_later.inl b/opencl/source/command_queue/gpgpu_walker_bdw_and_later.inl index 4c8f757312..224e980650 100644 --- a/opencl/source/command_queue/gpgpu_walker_bdw_and_later.inl +++ b/opencl/source/command_queue/gpgpu_walker_bdw_and_later.inl @@ -86,7 +86,6 @@ size_t EnqueueOperation::getSizeRequiredCSKernel(bool reserveProfilin size += 2 * sizeof(PIPE_CONTROL) + 2 * sizeof(typename GfxFamily::MI_STORE_REGISTER_MEM); } size += PerformanceCounters::getGpuCommandsSize(commandQueue.getPerfCounters(), commandQueue.getGpgpuEngine().osContext->getEngineType(), reservePerfCounters); - size += GpgpuWalkerHelper::getSizeForWADisableLSQCROPERFforOCL(pKernel); size += GpgpuWalkerHelper::getSizeForWaDisableRccRhwoOptimization(pKernel); return size; @@ -97,10 +96,6 @@ size_t EnqueueOperation::getSizeRequiredForTimestampPacketWrite() { return sizeof(PIPE_CONTROL); } -template -void GpgpuWalkerHelper::adjustMiStoreRegMemMode(MI_STORE_REG_MEM *storeCmd) { -} - template void GpgpuWalkerHelper::dispatchProfilingCommandsStart( TagNodeBase &hwTimeStamps, diff --git a/opencl/source/command_queue/hardware_interface_bdw_and_later.inl b/opencl/source/command_queue/hardware_interface_bdw_and_later.inl index ceb7f196d8..144476c7e6 100644 --- a/opencl/source/command_queue/hardware_interface_bdw_and_later.inl +++ b/opencl/source/command_queue/hardware_interface_bdw_and_later.inl @@ -28,24 +28,6 @@ inline void HardwareInterface::getDefaultDshSpace( dsh->getSpace(totalInterfaceDescriptorTableSize); } -template -inline void HardwareInterface::dispatchWorkarounds( - LinearStream *commandStream, - CommandQueue &commandQueue, - Kernel &kernel, - const bool &enable) { - - if (enable) { - PreemptionHelper::applyPreemptionWaCmdsBegin(commandStream, commandQueue.getDevice()); - // Implement enabling special WA DisableLSQCROPERFforOCL if needed - GpgpuWalkerHelper::applyWADisableLSQCROPERFforOCL(commandStream, kernel, enable); - } else { - // Implement disabling special WA DisableLSQCROPERFforOCL if needed - GpgpuWalkerHelper::applyWADisableLSQCROPERFforOCL(commandStream, kernel, enable); - PreemptionHelper::applyPreemptionWaCmdsEnd(commandStream, commandQueue.getDevice()); - } -} - template template inline void HardwareInterface::programWalker( diff --git a/opencl/source/helpers/cl_gfx_core_helper_bdw_and_later.inl b/opencl/source/helpers/cl_gfx_core_helper_bdw_and_later.inl index 4aff8b0f50..2d04cf0faa 100644 --- a/opencl/source/helpers/cl_gfx_core_helper_bdw_and_later.inl +++ b/opencl/source/helpers/cl_gfx_core_helper_bdw_and_later.inl @@ -18,11 +18,6 @@ inline cl_command_queue_capabilities_intel ClGfxCoreHelperHw::getAddi return 0; } -template -cl_device_feature_capabilities_intel ClGfxCoreHelperHw::getSupportedDeviceFeatureCapabilities(const RootDeviceEnvironment &rootDeviceEnvironment) const { - return 0; -} - static const std::vector redescribeFormats = { {CL_R, CL_UNSIGNED_INT8}, {CL_R, CL_UNSIGNED_INT16}, diff --git a/shared/source/os_interface/product_helper_bdw_and_later.inl b/shared/source/os_interface/product_helper_bdw_and_later.inl index 876dc9a78a..d750418dce 100644 --- a/shared/source/os_interface/product_helper_bdw_and_later.inl +++ b/shared/source/os_interface/product_helper_bdw_and_later.inl @@ -25,11 +25,6 @@ void ProductHelperHw::enableCompression(HardwareInfo *hwInfo) const hwInfo->capabilityTable.ftrRenderCompressedBuffers = hwInfo->featureTable.flags.ftrE2ECompression; } -template -uint32_t ProductHelperHw::getMaxThreadsForWorkgroupInDSSOrSS(const HardwareInfo &hwInfo, uint32_t maxNumEUsPerSubSlice, uint32_t maxNumEUsPerDualSubSlice) const { - return getMaxThreadsForWorkgroup(hwInfo, maxNumEUsPerSubSlice); -} - template bool ProductHelperHw::obtainBlitterPreference(const HardwareInfo &hwInfo) const { return false;