diff --git a/shared/source/gen11/hw_info_ehl.cpp b/shared/source/gen11/hw_info_ehl.cpp index a72a5b0fa3..b4e6e1c3a3 100644 --- a/shared/source/gen11/hw_info_ehl.cpp +++ b/shared/source/gen11/hw_info_ehl.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019-2023 Intel Corporation + * Copyright (C) 2019-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -77,7 +77,8 @@ const RuntimeCapabilityTable EHL::capabilityTable{ false, // p2pAtomicAccessSupported false, // fusedEuEnabled false, // l0DebuggerSupported; - false // supportsFloatAtomics + false, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable EHL::workaroundTable = {}; diff --git a/shared/source/gen11/hw_info_icllp.cpp b/shared/source/gen11/hw_info_icllp.cpp index 5fef07a91d..284a11865e 100644 --- a/shared/source/gen11/hw_info_icllp.cpp +++ b/shared/source/gen11/hw_info_icllp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019-2023 Intel Corporation + * Copyright (C) 2019-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -77,7 +77,8 @@ const RuntimeCapabilityTable ICLLP::capabilityTable{ false, // p2pAtomicAccessSupported false, // fusedEuEnabled false, // l0DebuggerSupported; - false // supportsFloatAtomics + false, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable ICLLP::workaroundTable = {}; diff --git a/shared/source/gen11/hw_info_lkf.cpp b/shared/source/gen11/hw_info_lkf.cpp index 83440417c7..4a1cbf79ea 100644 --- a/shared/source/gen11/hw_info_lkf.cpp +++ b/shared/source/gen11/hw_info_lkf.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019-2023 Intel Corporation + * Copyright (C) 2019-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -77,7 +77,8 @@ const RuntimeCapabilityTable LKF::capabilityTable{ false, // p2pAtomicAccessSupported false, // fusedEuEnabled false, // l0DebuggerSupported; - false // supportsFloatAtomics + false, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable LKF::workaroundTable = {}; diff --git a/shared/source/gen12lp/hw_info_adln.cpp b/shared/source/gen12lp/hw_info_adln.cpp index 5907c01ee3..78e762cab3 100644 --- a/shared/source/gen12lp/hw_info_adln.cpp +++ b/shared/source/gen12lp/hw_info_adln.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2022-2023 Intel Corporation + * Copyright (C) 2022-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -80,7 +80,8 @@ const RuntimeCapabilityTable ADLN::capabilityTable{ false, // p2pAtomicAccessSupported true, // fusedEuEnabled false, // l0DebuggerSupported; - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable ADLN::workaroundTable = {}; diff --git a/shared/source/gen12lp/hw_info_adlp.cpp b/shared/source/gen12lp/hw_info_adlp.cpp index 657e4ed8d7..6608cd79f2 100644 --- a/shared/source/gen12lp/hw_info_adlp.cpp +++ b/shared/source/gen12lp/hw_info_adlp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021-2023 Intel Corporation + * Copyright (C) 2021-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -80,7 +80,8 @@ const RuntimeCapabilityTable ADLP::capabilityTable{ false, // p2pAtomicAccessSupported true, // fusedEuEnabled false, // l0DebuggerSupported; - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable ADLP::workaroundTable = {}; diff --git a/shared/source/gen12lp/hw_info_adls.cpp b/shared/source/gen12lp/hw_info_adls.cpp index dd88be513c..2c0e3ca5f8 100644 --- a/shared/source/gen12lp/hw_info_adls.cpp +++ b/shared/source/gen12lp/hw_info_adls.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2020-2023 Intel Corporation + * Copyright (C) 2020-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -80,7 +80,8 @@ const RuntimeCapabilityTable ADLS::capabilityTable{ false, // p2pAtomicAccessSupported true, // fusedEuEnabled false, // l0DebuggerSupported; - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable ADLS::workaroundTable = {}; diff --git a/shared/source/gen12lp/hw_info_dg1.cpp b/shared/source/gen12lp/hw_info_dg1.cpp index b5129b3f63..1242f07e7a 100644 --- a/shared/source/gen12lp/hw_info_dg1.cpp +++ b/shared/source/gen12lp/hw_info_dg1.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2020-2023 Intel Corporation + * Copyright (C) 2020-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -80,7 +80,8 @@ const RuntimeCapabilityTable DG1::capabilityTable{ false, // p2pAtomicAccessSupported true, // fusedEuEnabled true, // l0DebuggerSupported; - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable DG1::workaroundTable = {}; diff --git a/shared/source/gen12lp/hw_info_rkl.cpp b/shared/source/gen12lp/hw_info_rkl.cpp index d6687ecde5..ecc32a53a7 100644 --- a/shared/source/gen12lp/hw_info_rkl.cpp +++ b/shared/source/gen12lp/hw_info_rkl.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2020-2023 Intel Corporation + * Copyright (C) 2020-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -80,7 +80,8 @@ const RuntimeCapabilityTable RKL::capabilityTable{ false, // p2pAtomicAccessSupported true, // fusedEuEnabled false, // l0DebuggerSupported; - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable RKL::workaroundTable = {}; diff --git a/shared/source/gen12lp/hw_info_tgllp.cpp b/shared/source/gen12lp/hw_info_tgllp.cpp index ab8c9b18b4..ded0e23d77 100644 --- a/shared/source/gen12lp/hw_info_tgllp.cpp +++ b/shared/source/gen12lp/hw_info_tgllp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019-2023 Intel Corporation + * Copyright (C) 2019-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -80,7 +80,8 @@ const RuntimeCapabilityTable TGLLP::capabilityTable{ false, // p2pAtomicAccessSupported true, // fusedEuEnabled false, // l0DebuggerSupported; - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable TGLLP::workaroundTable = {}; diff --git a/shared/source/gen8/hw_info_bdw.cpp b/shared/source/gen8/hw_info_bdw.cpp index 7aab898da2..a201aaf691 100644 --- a/shared/source/gen8/hw_info_bdw.cpp +++ b/shared/source/gen8/hw_info_bdw.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2023 Intel Corporation + * Copyright (C) 2018-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -77,7 +77,8 @@ const RuntimeCapabilityTable BDW::capabilityTable{ false, // p2pAtomicAccessSupported false, // fusedEuEnabled false, // l0DebuggerSupported; - false // supportsFloatAtomics + false, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable BDW::workaroundTable = {}; diff --git a/shared/source/gen9/hw_info_bxt.cpp b/shared/source/gen9/hw_info_bxt.cpp index 4e3d9dc447..10a42ab166 100644 --- a/shared/source/gen9/hw_info_bxt.cpp +++ b/shared/source/gen9/hw_info_bxt.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2023 Intel Corporation + * Copyright (C) 2018-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -77,7 +77,8 @@ const RuntimeCapabilityTable BXT::capabilityTable{ false, // p2pAtomicAccessSupported false, // fusedEuEnabled false, // l0DebuggerSupported; - false // supportsFloatAtomics + false, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable BXT::workaroundTable = {}; diff --git a/shared/source/gen9/hw_info_cfl.cpp b/shared/source/gen9/hw_info_cfl.cpp index 281cc12c0f..8693caae51 100644 --- a/shared/source/gen9/hw_info_cfl.cpp +++ b/shared/source/gen9/hw_info_cfl.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2023 Intel Corporation + * Copyright (C) 2018-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -78,7 +78,8 @@ const RuntimeCapabilityTable CFL::capabilityTable{ false, // p2pAtomicAccessSupported false, // fusedEuEnabled false, // l0DebuggerSupported; - false // supportsFloatAtomics + false, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable CFL::workaroundTable = {}; diff --git a/shared/source/gen9/hw_info_glk.cpp b/shared/source/gen9/hw_info_glk.cpp index d390cc8250..497387bde1 100644 --- a/shared/source/gen9/hw_info_glk.cpp +++ b/shared/source/gen9/hw_info_glk.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2023 Intel Corporation + * Copyright (C) 2018-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -77,7 +77,8 @@ const RuntimeCapabilityTable GLK::capabilityTable{ false, // p2pAtomicAccessSupported false, // fusedEuEnabled false, // l0DebuggerSupported; - false // supportsFloatAtomics + false, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable GLK::workaroundTable = {}; diff --git a/shared/source/gen9/hw_info_kbl.cpp b/shared/source/gen9/hw_info_kbl.cpp index 8db75381f4..2c1a92dc15 100644 --- a/shared/source/gen9/hw_info_kbl.cpp +++ b/shared/source/gen9/hw_info_kbl.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2023 Intel Corporation + * Copyright (C) 2018-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -78,7 +78,8 @@ const RuntimeCapabilityTable KBL::capabilityTable{ false, // p2pAtomicAccessSupported false, // fusedEuEnabled false, // l0DebuggerSupported; - false // supportsFloatAtomics + false, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable KBL::workaroundTable = {}; diff --git a/shared/source/gen9/hw_info_skl.cpp b/shared/source/gen9/hw_info_skl.cpp index afeff7ac45..3244fd33ad 100644 --- a/shared/source/gen9/hw_info_skl.cpp +++ b/shared/source/gen9/hw_info_skl.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2023 Intel Corporation + * Copyright (C) 2018-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -77,7 +77,8 @@ const RuntimeCapabilityTable SKL::capabilityTable{ false, // p2pAtomicAccessSupported false, // fusedEuEnabled false, // l0DebuggerSupported; - false // supportsFloatAtomics + false, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable SKL::workaroundTable = {}; diff --git a/shared/source/helpers/hw_info.h b/shared/source/helpers/hw_info.h index 783b368d89..73886ee6f5 100644 --- a/shared/source/helpers/hw_info.h +++ b/shared/source/helpers/hw_info.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2023 Intel Corporation + * Copyright (C) 2018-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -68,6 +68,7 @@ struct RuntimeCapabilityTable { bool fusedEuEnabled; bool l0DebuggerSupported; bool supportsFloatAtomics; + uint32_t cxlType; }; inline bool operator==(const RuntimeCapabilityTable &lhs, const RuntimeCapabilityTable &rhs) { diff --git a/shared/source/xe_hpc_core/hw_info_pvc.cpp b/shared/source/xe_hpc_core/hw_info_pvc.cpp index b80c9af841..aba0273e48 100644 --- a/shared/source/xe_hpc_core/hw_info_pvc.cpp +++ b/shared/source/xe_hpc_core/hw_info_pvc.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021-2023 Intel Corporation + * Copyright (C) 2021-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -93,7 +93,8 @@ const RuntimeCapabilityTable PVC::capabilityTable{ true, // p2pAtomicAccessSupported false, // fusedEuEnabled true, // l0DebuggerSupported; - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; void PVC::setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo) { diff --git a/shared/source/xe_hpg_core/hw_info_arl.cpp b/shared/source/xe_hpg_core/hw_info_arl.cpp index 3f94f5555a..d304d2e343 100644 --- a/shared/source/xe_hpg_core/hw_info_arl.cpp +++ b/shared/source/xe_hpg_core/hw_info_arl.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2023 Intel Corporation + * Copyright (C) 2023-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -78,7 +78,8 @@ const RuntimeCapabilityTable ARL::capabilityTable{ false, // p2pAtomicAccessSupported true, // fusedEuEnabled false, // l0DebuggerSupported - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable ARL::workaroundTable = {}; diff --git a/shared/source/xe_hpg_core/hw_info_dg2.cpp b/shared/source/xe_hpg_core/hw_info_dg2.cpp index fc01167d6a..a126a98887 100644 --- a/shared/source/xe_hpg_core/hw_info_dg2.cpp +++ b/shared/source/xe_hpg_core/hw_info_dg2.cpp @@ -83,7 +83,8 @@ const RuntimeCapabilityTable DG2::capabilityTable{ false, // p2pAtomicAccessSupported true, // fusedEuEnabled true, // l0DebuggerSupported - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable DG2::workaroundTable = {}; diff --git a/shared/source/xe_hpg_core/hw_info_mtl.cpp b/shared/source/xe_hpg_core/hw_info_mtl.cpp index d99f793b7d..6cafd5c974 100644 --- a/shared/source/xe_hpg_core/hw_info_mtl.cpp +++ b/shared/source/xe_hpg_core/hw_info_mtl.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2022-2023 Intel Corporation + * Copyright (C) 2022-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -79,7 +79,8 @@ const RuntimeCapabilityTable MTL::capabilityTable{ false, // p2pAtomicAccessSupported true, // fusedEuEnabled true, // l0DebuggerSupported - true // supportsFloatAtomics + true, // supportsFloatAtomics + 0 // cxlType }; WorkaroundTable MTL::workaroundTable = {}; diff --git a/shared/test/unit_test/gen11/test_device_caps_gen11.cpp b/shared/test/unit_test/gen11/test_device_caps_gen11.cpp index 55b463485c..e65e59781b 100644 --- a/shared/test/unit_test/gen11/test_device_caps_gen11.cpp +++ b/shared/test/unit_test/gen11/test_device_caps_gen11.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019-2023 Intel Corporation + * Copyright (C) 2019-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -79,3 +79,7 @@ GEN11TEST_F(Gen11DeviceCaps, givenGen11WhenCheckingCoherencySupportThenReturnFal GEN11TEST_F(Gen11DeviceCaps, givenGen11WhenCheckingFloatAtomicsSupportThenReturnFalse) { EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.supportsFloatAtomics); } + +GEN11TEST_F(Gen11DeviceCaps, givenGen11WhenCheckingCxlTypeThenReturnZero) { + EXPECT_EQ(0u, pDevice->getHardwareInfo().capabilityTable.cxlType); +} diff --git a/shared/test/unit_test/gen12lp/test_device_caps_gen12lp.inl b/shared/test/unit_test/gen12lp/test_device_caps_gen12lp.inl index 248cc3f217..0b39167f7c 100644 --- a/shared/test/unit_test/gen12lp/test_device_caps_gen12lp.inl +++ b/shared/test/unit_test/gen12lp/test_device_caps_gen12lp.inl @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019-2023 Intel Corporation + * Copyright (C) 2019-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -87,3 +87,7 @@ HWTEST2_F(Gen12LpDeviceCaps, givenGen12lpWhenCheckFtrSupportsInteger64BitAtomics GEN12LPTEST_F(Gen12LpDeviceCaps, givenGen12LpWhenCheckingFloatAtomicsSupportThenReturnTrue) { EXPECT_TRUE(pDevice->getHardwareInfo().capabilityTable.supportsFloatAtomics); } + +GEN12LPTEST_F(Gen12LpDeviceCaps, givenGen12LpWhenCheckingCxlTypeThenReturnZero) { + EXPECT_EQ(0u, pDevice->getHardwareInfo().capabilityTable.cxlType); +} \ No newline at end of file diff --git a/shared/test/unit_test/gen8/test_device_caps_gen8.cpp b/shared/test/unit_test/gen8/test_device_caps_gen8.cpp index 1a63cb7b75..8ec91e9852 100644 --- a/shared/test/unit_test/gen8/test_device_caps_gen8.cpp +++ b/shared/test/unit_test/gen8/test_device_caps_gen8.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2023 Intel Corporation + * Copyright (C) 2018-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -102,3 +102,7 @@ GEN8TEST_F(Gen8DeviceCaps, givenGen8WhenCheckingDeviceEnqueueSupportThenReturnFa GEN8TEST_F(Gen8DeviceCaps, givenGen8WhenCheckingFloatAtomicsSupportThenReturnFalse) { EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.supportsFloatAtomics); } + +GEN8TEST_F(Gen8DeviceCaps, givenGen8WhenCheckingCxlTypeThenReturnZero) { + EXPECT_EQ(0u, pDevice->getHardwareInfo().capabilityTable.cxlType); +} diff --git a/shared/test/unit_test/gen9/test_device_caps_gen9.cpp b/shared/test/unit_test/gen9/test_device_caps_gen9.cpp index a050de6ad7..a69353497e 100644 --- a/shared/test/unit_test/gen9/test_device_caps_gen9.cpp +++ b/shared/test/unit_test/gen9/test_device_caps_gen9.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2023 Intel Corporation + * Copyright (C) 2018-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -66,3 +66,7 @@ GEN9TEST_F(Gen9DeviceCaps, givenGen9WhenCheckingMediaBlockSupportThenReturnTrue) GEN9TEST_F(Gen9DeviceCaps, givenGen9WhenCheckingFloatAtomicsSupportThenReturnFalse) { EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.supportsFloatAtomics); } + +GEN9TEST_F(Gen9DeviceCaps, givenGen9WhenCheckingCxlTypeThenReturnZero) { + EXPECT_EQ(0u, pDevice->getHardwareInfo().capabilityTable.cxlType); +} \ No newline at end of file diff --git a/shared/test/unit_test/xe_hpc_core/test_device_caps_xe_hpc_core.cpp b/shared/test/unit_test/xe_hpc_core/test_device_caps_xe_hpc_core.cpp index 3e1ec023b1..92ac6aaf6c 100644 --- a/shared/test/unit_test/xe_hpc_core/test_device_caps_xe_hpc_core.cpp +++ b/shared/test/unit_test/xe_hpc_core/test_device_caps_xe_hpc_core.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2022-2023 Intel Corporation + * Copyright (C) 2022-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -37,6 +37,10 @@ XE_HPC_CORETEST_F(XeHpcCoreDeviceCaps, givenXeHpcCoreWhenCheckingFloatAtomicsSup EXPECT_TRUE(pDevice->getHardwareInfo().capabilityTable.supportsFloatAtomics); } +XE_HPC_CORETEST_F(XeHpcCoreDeviceCaps, givenXeHpcCoreWhenCheckingCxlTypeThenReturnZero) { + EXPECT_EQ(0u, pDevice->getHardwareInfo().capabilityTable.cxlType); +} + XE_HPC_CORETEST_F(XeHpcCoreDeviceCaps, givenHwInfoWhenSlmSizeIsRequiredThenReturnCorrectValue) { EXPECT_EQ(128u, pDevice->getHardwareInfo().capabilityTable.slmSize); } diff --git a/shared/test/unit_test/xe_hpg_core/test_device_caps_xe_hpg_core.cpp b/shared/test/unit_test/xe_hpg_core/test_device_caps_xe_hpg_core.cpp index 735e0844d3..4aee01f352 100644 --- a/shared/test/unit_test/xe_hpg_core/test_device_caps_xe_hpg_core.cpp +++ b/shared/test/unit_test/xe_hpg_core/test_device_caps_xe_hpg_core.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2022-2023 Intel Corporation + * Copyright (C) 2022-2024 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -37,6 +37,10 @@ XE_HPG_CORETEST_F(XeHpgCoreDeviceCaps, givenXeHpgCoreWhenCheckingFloatAtomicsSup EXPECT_TRUE(pDevice->getHardwareInfo().capabilityTable.supportsFloatAtomics); } +XE_HPG_CORETEST_F(XeHpgCoreDeviceCaps, givenXeHpgCoreWhenCheckingCxlTypeThenReturnZero) { + EXPECT_EQ(0u, pDevice->getHardwareInfo().capabilityTable.cxlType); +} + XE_HPG_CORETEST_F(XeHpgCoreDeviceCaps, givenEnabledFtrPooledEuAndNotA0SteppingWhenCalculatingMaxEuPerSSThenDontIgnoreEuCountPerPoolMin) { HardwareInfo myHwInfo = *defaultHwInfo; GT_SYSTEM_INFO &mySysInfo = myHwInfo.gtSystemInfo;