test: correct expectations

Related-To: NEO-13163
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
This commit is contained in:
Kamil Kopryk
2025-03-25 12:50:34 +00:00
committed by Compute-Runtime-Automation
parent 56bd1694e9
commit b462f95884
25 changed files with 243 additions and 46 deletions

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2023 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -70,6 +70,9 @@ TEST_F(ClCreateCommandQueueTest, givenOoqParametersWhenQueueIsCreatedThenQueueIs
}
HWTEST_F(ClCreateCommandQueueTest, givenOoqParametersWhenQueueIsCreatedThenCommandStreamReceiverSwitchesToBatchingMode) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
using BaseType = typename CommandQueue::BaseType;
cl_int retVal = CL_SUCCESS;
cl_queue_properties ooq = CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE;
@@ -119,6 +122,9 @@ HWTEST_F(ClCreateCommandQueueTest, givenForcedDispatchModeAndOoqParametersWhenQu
}
HWTEST_F(ClCreateCommandQueueTest, givenOoqParametersWhenQueueIsCreatedThenCommandStreamReceiverSwitchesToNTo1SubmissionModel) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
using BaseType = typename CommandQueue::BaseType;
cl_int retVal = CL_SUCCESS;
cl_queue_properties ooq = CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE;

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2023 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -205,7 +205,11 @@ HWTEST_F(BarrierTest, WhenEnqueingBarrierWithWaitListThenDependenciesShouldSync)
// in this case only cmdQ raises the taskLevel while csr stays intact
EXPECT_EQ(8u, pCmdQ->taskLevel);
if (csr.peekTimestampPacketWriteEnabled()) {
EXPECT_EQ(pCmdQ->taskLevel + 1, commandStreamReceiver.peekTaskLevel());
auto expectedTaskLevel = pCmdQ->taskLevel;
if (!commandStreamReceiver.isUpdateTagFromWaitEnabled()) {
expectedTaskLevel++;
}
EXPECT_EQ(expectedTaskLevel, commandStreamReceiver.peekTaskLevel());
} else {
EXPECT_EQ(7u, commandStreamReceiver.peekTaskLevel());
}

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@@ -239,7 +239,11 @@ HWTEST_F(DispatchFlagsTests, whenEnqueueCommandWithoutKernelThenPassCorrectDispa
EXPECT_EQ(blocking, mockCsr->passedDispatchFlags.blocking);
EXPECT_FALSE(mockCsr->passedDispatchFlags.implicitFlush);
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
if (mockCsr->isUpdateTagFromWaitEnabled()) {
EXPECT_FALSE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
} else {
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
}
EXPECT_EQ(L3CachingSettings::notApplicable, mockCsr->passedDispatchFlags.l3CacheSettings);
EXPECT_EQ(GrfConfig::notApplicable, mockCsr->passedDispatchFlags.numGrfRequired);
EXPECT_EQ(device->getPreemptionMode(), mockCsr->passedDispatchFlags.preemptionMode);

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@@ -137,7 +137,12 @@ HWTEST_F(EnqueueCopyBufferRectTest, WhenCopyingBufferRect2DThenTaskCountIsAligne
enqueueCopyBufferRect2D<FamilyType>();
EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
auto cmdQtaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
cmdQtaskLevel++;
}
EXPECT_EQ(csr.peekTaskLevel(), cmdQtaskLevel);
}
HWCMDTEST_F(IGFX_GEN12LP_CORE, EnqueueCopyBufferRectTest, WhenCopyingBufferRect2DThenGpgpuWalkerIsCorrect) {

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@@ -132,8 +132,14 @@ HWTEST_F(EnqueueCopyBufferTest, WhenCopyingBufferThenTaskCountIsAlignedWithCsr)
csr.taskLevel = pCmdQ->taskLevel + 50;
enqueueCopyBuffer();
auto cmdQTaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
cmdQTaskLevel++;
}
EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
EXPECT_EQ(csr.peekTaskLevel(), cmdQTaskLevel);
}
HWCMDTEST_F(IGFX_GEN12LP_CORE, EnqueueCopyBufferTest, WhenCopyingBufferThenGpgpuWalkerIsCorrect) {

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@@ -68,7 +68,12 @@ HWTEST_F(EnqueueCopyBufferToImageTest, WhenCopyingBufferToImageThenTaskCountIsAl
EnqueueCopyBufferToImageHelper<>::enqueueCopyBufferToImage(pCmdQ, srcBuffer, dstImage);
EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
auto cmdQTaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
cmdQTaskLevel++;
}
EXPECT_EQ(csr.peekTaskLevel(), cmdQTaskLevel);
}
HWTEST_F(EnqueueCopyBufferToImageTest, WhenCopyingBufferToImageThenTaskLevelIsIncremented) {

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@@ -64,7 +64,13 @@ HWTEST_F(EnqueueCopyImageTest, WhenCopyingImageThenTaskCountIsAlignedWithCsr) {
EnqueueCopyImageHelper<>::enqueueCopyImage(pCmdQ, srcImage, dstImage);
EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
auto cmdQTaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
cmdQTaskLevel++;
}
EXPECT_EQ(csr.peekTaskLevel(), cmdQTaskLevel);
}
HWTEST_F(EnqueueCopyImageTest, GivenGpuHangAndBlockingCallWhenCopyingImageThenOutOfResourcesIsReturned) {

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@@ -69,7 +69,12 @@ HWTEST_F(EnqueueCopyImageToBufferTest, WhenCopyingImageToBufferThenTaskCountIsAl
enqueueCopyImageToBuffer<FamilyType>();
EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
auto cmdQTaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
cmdQTaskLevel++;
}
EXPECT_EQ(csr.peekTaskLevel(), cmdQTaskLevel);
}
HWTEST_F(EnqueueCopyImageToBufferTest, WhenCopyingImageToBufferThenTaskLevelIsIncremented) {

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@@ -42,7 +42,13 @@ HWTEST_F(EnqueueFillImageTest, WhenFillingImageThenTaskCountIsAlignedWithCsr) {
EnqueueFillImageHelper<>::enqueueFillImage(pCmdQ, image);
EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
auto cmdQTaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
cmdQTaskLevel++;
}
EXPECT_EQ(csr.peekTaskLevel(), cmdQTaskLevel);
}
HWCMDTEST_F(IGFX_GEN12LP_CORE, EnqueueFillImageTest, WhenFillingImageThenGpgpuWalkerIsCorrect) {

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@@ -538,7 +538,12 @@ HWTEST_F(EnqueueKernelTest, WhenEnqueingKernelThenCsrTaskLevelIsIncremented) {
callOneWorkItemNDRKernel();
EXPECT_EQ(pCmdQ->taskCount, csr.peekTaskCount());
EXPECT_EQ(pCmdQ->taskLevel + 1, csr.peekTaskLevel());
auto expectedTaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
expectedTaskLevel++;
}
EXPECT_EQ(expectedTaskLevel, csr.peekTaskLevel());
}
HWTEST_F(EnqueueKernelTest, WhenEnqueingKernelThenCommandsAreAdded) {
@@ -1045,6 +1050,9 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, EnqueueKernelTest, givenTwoEnqueueProgrammedWithinS
}
HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenFinishIsCalledThenBatchesSubmissionsAreFlushed) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());
mockCsr->overrideDispatchPolicy(DispatchMode::batchedDispatch);
mockCsr->useNewResourceImplicitFlush = false;
@@ -1066,6 +1074,10 @@ HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenFinishIsCalledThenBatchesS
}
HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenThressEnqueueKernelsAreCalledThenBatchesSubmissionsAreFlushed) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());
mockCsr->overrideDispatchPolicy(DispatchMode::batchedDispatch);
mockCsr->useNewResourceImplicitFlush = false;
@@ -1088,6 +1100,8 @@ HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenThressEnqueueKernelsAreCal
}
HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenWaitForEventsIsCalledThenBatchedSubmissionsAreFlushed) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());
mockCsr->overrideDispatchPolicy(DispatchMode::batchedDispatch);
mockCsr->useNewResourceImplicitFlush = false;
@@ -1114,6 +1128,10 @@ HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenWaitForEventsIsCalledThenB
}
HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenCommandIsFlushedThenFlushStampIsUpdatedInCommandQueueCsrAndEvent) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());
mockCsr->overrideDispatchPolicy(DispatchMode::batchedDispatch);
mockCsr->useNewResourceImplicitFlush = false;
@@ -1171,6 +1189,9 @@ HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenNonBlockingMapFollowsNdrCa
}
HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenCommandWithEventIsFollowedByCommandWithoutEventThenFlushStampIsUpdatedInCommandQueueCsrAndEvent) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());
mockCsr->overrideDispatchPolicy(DispatchMode::batchedDispatch);
mockCsr->useNewResourceImplicitFlush = false;
@@ -1255,6 +1276,10 @@ HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenWaitForEventsIsCalledWithU
}
HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenFinishIsCalledWithUnflushedTaskCountThenBatchedSubmissionsAreFlushed) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());
mockCsr->overrideDispatchPolicy(DispatchMode::batchedDispatch);
pDevice->resetCommandStreamReceiver(mockCsr);
@@ -1279,6 +1304,9 @@ HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenFinishIsCalledWithUnflushe
}
HWTEST_F(EnqueueKernelTest, givenOutOfOrderCommandQueueWhenEnqueueKernelIsMadeThenPipeControlPositionIsRecorded) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
const cl_queue_properties props[3] = {CL_QUEUE_PROPERTIES, CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE, 0};
auto ooq = clCreateCommandQueueWithProperties(context, pClDevice, props, nullptr);
@@ -1303,6 +1331,9 @@ HWTEST_F(EnqueueKernelTest, givenOutOfOrderCommandQueueWhenEnqueueKernelIsMadeTh
}
HWTEST_F(EnqueueKernelTest, givenInOrderCommandQueueWhenEnqueueKernelIsMadeThenPipeControlPositionIsRecorded) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
const cl_queue_properties props[] = {0};
auto inOrderQueue = clCreateCommandQueueWithProperties(context, pClDevice, props, nullptr);
@@ -1325,6 +1356,8 @@ HWTEST_F(EnqueueKernelTest, givenInOrderCommandQueueWhenEnqueueKernelIsMadeThenP
}
HWTEST_F(EnqueueKernelTest, givenInOrderCommandQueueWhenEnqueueKernelThatHasSharedObjectsAsArgIsMadeThenPipeControlPositionIsRecorded) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
const cl_queue_properties props[] = {0};
auto inOrderQueue = clCreateCommandQueueWithProperties(context, pClDevice, props, nullptr);
@@ -1393,7 +1426,11 @@ HWTEST_F(EnqueueKernelTest, givenInOrderCommandQueueWhenEnqueueKernelReturningEv
}
HWTEST_F(EnqueueKernelTest, givenInOrderCommandQueueWhenEnqueueKernelReturningEventIsMadeAndCommandStreamReceiverIsInNTo1ModeThenPipeControlPositionIsRecorded) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
const cl_queue_properties props[] = {0};
auto inOrderQueue = clCreateCommandQueueWithProperties(context, pClDevice, props, nullptr);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());
@@ -1422,6 +1459,9 @@ HWTEST_F(EnqueueKernelTest, givenInOrderCommandQueueWhenEnqueueKernelReturningEv
}
HWTEST_F(EnqueueKernelTest, givenOutOfOrderCommandQueueWhenEnqueueKernelReturningEventIsMadeThenPipeControlPositionIsRecorded) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());
mockCsr->overrideDispatchPolicy(DispatchMode::batchedDispatch);
mockCsr->useNewResourceImplicitFlush = false;
@@ -1452,6 +1492,7 @@ HWTEST_F(EnqueueKernelTest, givenOutOfOrderCommandQueueWhenEnqueueKernelReturnin
HWTEST_F(EnqueueKernelTest, givenCsrInBatchingModeWhenBlockingCallIsMadeThenEventAssociatedWithCommandHasProperFlushStamp) {
DebugManagerStateRestore stateRestore;
debugManager.flags.MakeEachEnqueueBlocking.set(true);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment, pDevice->getRootDeviceIndex(), pDevice->getDeviceBitfield());
mockCsr->overrideDispatchPolicy(DispatchMode::batchedDispatch);
pDevice->resetCommandStreamReceiver(mockCsr);

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@@ -90,7 +90,12 @@ TEST_F(EventTests, WhenWaitingForEventThenPipeControlIsNotInserted) {
TaskCountType taskCountOfEvent = pEvent->peekTaskCount();
EXPECT_LE(taskCountOfEvent, pCmdQ->getHwTag());
// no more tasks after WFE, no need to write PC
EXPECT_EQ(pEvent->taskLevel + 1, csr.peekTaskLevel());
auto expectedTaskLevel = pEvent->taskLevel.load();
if (!csr.isUpdateTagFromWaitEnabled()) {
expectedTaskLevel++;
}
EXPECT_EQ(expectedTaskLevel, csr.peekTaskLevel());
pCmdQ->finish();
@@ -134,10 +139,14 @@ TEST_F(EventTests, GivenTwoEnqueuesWhenWaitingForBothEventsThenTaskLevelIsCorrec
retVal = Event::waitForEvents(2, event);
EXPECT_EQ(CL_SUCCESS, retVal);
EXPECT_EQ(pEvent1->taskLevel + 1, csr.peekTaskLevel());
auto expectedTaskLevel1 = pEvent1->taskLevel.load();
if (!csr.isUpdateTagFromWaitEnabled()) {
expectedTaskLevel1++;
}
EXPECT_EQ(expectedTaskLevel1, csr.peekTaskLevel());
pCmdQ->finish();
EXPECT_EQ(pEvent1->taskLevel + 1, csr.peekTaskLevel());
EXPECT_EQ(expectedTaskLevel1, csr.peekTaskLevel());
// Check CL_EVENT_COMMAND_TYPE
{
cl_command_type cmdType = 0;
@@ -169,15 +178,28 @@ TEST_F(EventTests, GivenNoEventsWhenEnqueuingKernelThenTaskLevelIsIncremented) {
retVal = Event::waitForEvents(1, &event);
EXPECT_EQ(CL_SUCCESS, retVal);
EXPECT_EQ(pEvent->taskLevel + 1, csr.peekTaskLevel());
auto taskLevelEvent = pEvent->taskLevel.load();
if (!csr.isUpdateTagFromWaitEnabled()) {
taskLevelEvent++;
}
EXPECT_EQ(taskLevelEvent, csr.peekTaskLevel());
retVal = callOneWorkItemNDRKernel(eventWaitList, numEventsInWaitList, nullptr);
ASSERT_EQ(CL_SUCCESS, retVal);
EXPECT_EQ(pEvent->taskLevel + 2, csr.peekTaskLevel());
taskLevelEvent = pEvent->taskLevel.load();
if (!csr.isUpdateTagFromWaitEnabled()) {
taskLevelEvent += 2;
} else {
taskLevelEvent += 1;
}
EXPECT_EQ(taskLevelEvent, csr.peekTaskLevel());
pCmdQ->finish();
EXPECT_EQ(pEvent->taskLevel + 2, csr.peekTaskLevel());
EXPECT_EQ(taskLevelEvent, csr.peekTaskLevel());
// Check CL_EVENT_COMMAND_TYPE
{

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2024 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -115,11 +115,16 @@ HWCMDTEST_F(IGFX_GEN12LP_CORE, TwoIOQsTwoDependentWalkers, GivenTwoCommandQueues
}
HWTEST_F(TwoIOQsTwoDependentWalkers, GivenTwoCommandQueuesWhenEnqueuingKernelThenOnePipeControlIsInsertedBetweenWalkers) {
typedef typename FamilyType::PIPE_CONTROL PIPE_CONTROL;
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
parseWalkers<FamilyType>();
auto itorCmd = find<PIPE_CONTROL *>(itorWalker1, itorWalker2);
// Should find a PC.
EXPECT_NE(itorWalker2, itorCmd);
if (pCmdQ2->getGpgpuCommandStreamReceiver().isUpdateTagFromWaitEnabled()) {
EXPECT_EQ(itorWalker2, itorCmd);
} else {
EXPECT_NE(itorWalker2, itorCmd);
}
}

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2024 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -36,6 +36,10 @@ HWCMDTEST_F(IGFX_GEN12LP_CORE, IOQWithTwoWalkers, GivenTwoCommandQueuesWhenEnque
}
HWTEST_F(IOQWithTwoWalkers, GivenTwoCommandQueuesWhenEnqueuingKernelThenOnePipeControlIsInsertedBetweenWalkers) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
commandStreamReceiver.timestampPacketWriteEnabled = false;

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2024 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -43,5 +43,10 @@ HWTEST_F(OOQWithTwoWalkers, GivenTwoCommandQueuesWhenEnqueuingKernelThenOnePipeC
auto itorCmd = find<typename FamilyType::PIPE_CONTROL *>(itorWalker1, itorWalker2);
// Workaround for DRM i915 coherency patch
// EXPECT_EQ(itorWalker2, itorCmd);
EXPECT_NE(itorWalker2, itorCmd);
if (pCmdQ->getGpgpuCommandStreamReceiver().isUpdateTagFromWaitEnabled()) {
EXPECT_EQ(itorWalker2, itorCmd);
} else {
EXPECT_NE(itorWalker2, itorCmd);
}
}

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2024 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -191,7 +191,11 @@ HWTEST_F(MarkerTest, GivenEventWithWaitDependenciesWhenEnqueingMarkerThenCsrLeve
// Should sync CSR & CmdQ levels.
if (pCmdQ->getGpgpuCommandStreamReceiver().peekTimestampPacketWriteEnabled()) {
EXPECT_EQ(initialTaskLevel, pCmdQ->taskLevel);
EXPECT_EQ(initialTaskLevel + 1, commandStreamReceiver.peekTaskLevel());
if (!commandStreamReceiver.isUpdateTagFromWaitEnabled()) {
initialTaskLevel++;
}
EXPECT_EQ(initialTaskLevel, commandStreamReceiver.peekTaskLevel());
} else {
EXPECT_EQ(commandStreamReceiver.peekTaskLevel(), pCmdQ->taskLevel);
}

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2024 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -341,9 +341,14 @@ TEST_F(EnqueueReadBuffer, givenOutOfOrderQueueAndDisabledSupportCpuCopiesAndDstP
ASSERT_NE(nullptr, event);
auto pEvent = castToObject<Event>(event);
if (pCmdOOQ->getGpgpuCommandStreamReceiver().peekTimestampPacketWriteEnabled()) {
EXPECT_EQ(taskLevelEvent2 + 1, pCmdOOQ->taskLevel);
EXPECT_EQ(taskLevelEvent2 + 1, pEvent->taskLevel);
auto &csr = pCmdOOQ->getGpgpuCommandStreamReceiver();
if (csr.peekTimestampPacketWriteEnabled()) {
auto taskLevel = taskLevelEvent2;
if (!csr.isUpdateTagFromWaitEnabled()) {
taskLevel++;
}
EXPECT_EQ(taskLevel, pCmdOOQ->taskLevel);
EXPECT_EQ(taskLevel, pEvent->taskLevel);
} else {
EXPECT_EQ(19u, pCmdOOQ->taskLevel);
EXPECT_EQ(19u, pEvent->taskLevel);

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2024 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -338,9 +338,15 @@ TEST_F(EnqueueWriteBufferTypeTest, givenOutOfOrderQueueAndDisabledSupportCpuCopi
ASSERT_NE(nullptr, event);
auto pEvent = castToObject<Event>(event);
if (pCmdOOQ->getGpgpuCommandStreamReceiver().peekTimestampPacketWriteEnabled()) {
EXPECT_EQ(taskLevelEvent2 + 1, pCmdOOQ->taskLevel);
EXPECT_EQ(taskLevelEvent2 + 1, pEvent->taskLevel);
auto &csr = pCmdOOQ->getGpgpuCommandStreamReceiver();
if (csr.peekTimestampPacketWriteEnabled()) {
if (!csr.isUpdateTagFromWaitEnabled()) {
taskLevelEvent2++;
}
EXPECT_EQ(taskLevelEvent2, pCmdOOQ->taskLevel);
EXPECT_EQ(taskLevelEvent2, pEvent->taskLevel);
} else {
EXPECT_EQ(19u, pCmdOOQ->taskLevel);
EXPECT_EQ(19u, pEvent->taskLevel);

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@@ -124,7 +124,13 @@ HWTEST_F(EnqueueWriteBufferRectTest, GivenNonBlockingEnqueueWhenWritingBufferThe
enqueueWriteBufferRect2D<FamilyType>(CL_FALSE);
EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
auto cmdQTaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
cmdQTaskLevel++;
}
EXPECT_EQ(csr.peekTaskLevel(), cmdQTaskLevel);
}
HWCMDTEST_F(IGFX_GEN12LP_CORE, EnqueueWriteBufferRectTest, Given2dRegionWhenWritingBufferThenCommandsAreProgrammedCorrectly) {

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@@ -94,7 +94,12 @@ HWTEST_F(EnqueueWriteBufferTypeTest, GivenNonBlockingEnqueueWhenWritingBufferThe
EnqueueWriteBufferHelper<>::enqueueWriteBuffer(pCmdQ, srcBuffer.get(), CL_FALSE);
EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
auto cmdQTaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
cmdQTaskLevel++;
}
EXPECT_EQ(csr.peekTaskLevel(), cmdQTaskLevel);
}
HWCMDTEST_F(IGFX_GEN12LP_CORE, EnqueueWriteBufferTypeTest, WhenWritingBufferThenCommandsAreProgrammedCorrectly) {

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@@ -94,7 +94,12 @@ HWTEST_F(EnqueueWriteImageTest, GivenNonBlockingEnqueueWhenWritingImageThenTaskL
EnqueueWriteImageHelper<>::enqueueWriteImage(pCmdQ, dstImage, CL_FALSE);
EXPECT_EQ(csr.peekTaskCount(), pCmdQ->taskCount);
EXPECT_EQ(csr.peekTaskLevel(), pCmdQ->taskLevel + 1);
auto cmdQTaskLevel = pCmdQ->taskLevel;
if (!csr.isUpdateTagFromWaitEnabled()) {
cmdQTaskLevel++;
}
EXPECT_EQ(csr.peekTaskLevel(), cmdQTaskLevel);
}
HWTEST_F(EnqueueWriteImageTest, WhenWritingImageThenTaskLevelIsIncremented) {
@@ -716,6 +721,9 @@ HWTEST_F(EnqueueWriteImageTest, givenMultiRootDeviceImageWhenNonBlockedEnqueueWr
HWTEST_F(EnqueueWriteImageTest, givenMultiRootDeviceImageWhenNonBlockedEnqueueWriteImageIsCalledThenTlbCacheIsInvalidated) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
MockDefaultContext context{true};
auto pCmdQ1 = createCommandQueue(context.getDevice(0), nullptr, &context);

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@@ -541,6 +541,9 @@ HWCMDTEST_F(IGFX_GEN12LP_CORE, CommandStreamReceiverFlushTaskTests, givenNothing
}
HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInBatchingModeWhenFlushTaskIsCalledThenFlushedTaskCountIsNotModifed) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
CommandQueueHw<FamilyType> commandQueue(nullptr, pClDevice, 0, false);
auto &commandStream = commandQueue.getCS(4096u);
@@ -692,6 +695,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInDefaultModeWhenFlushTask
HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInBatchingModeWhenFlushTaskIsCalledGivenNumberOfTimesThenFlushIsCalled) {
DebugManagerStateRestore restorer;
debugManager.flags.PerformImplicitFlushEveryEnqueueCount.set(2);
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
CommandQueueHw<FamilyType> commandQueue(nullptr, pClDevice, 0, false);
auto &commandStream = commandQueue.getCS(4096u);
@@ -725,6 +729,9 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInBatchingModeWhenFlushTas
}
HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInBatchingModeWhenWaitForTaskCountIsCalledWithTaskCountThatWasNotYetFlushedThenBatchedCommandBuffersAreSubmitted) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
CommandQueueHw<FamilyType> commandQueue(nullptr, pClDevice, 0, false);
auto &commandStream = commandQueue.getCS(4096u);
@@ -864,6 +871,9 @@ struct MockedMemoryManager : public OsAgnosticMemoryManager {
};
HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInBatchingModeWhenTotalResourceUsedExhaustsTheBudgetThenDoImplicitFlush) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
CommandQueueHw<FamilyType> commandQueue(nullptr, pClDevice, 0, false);
auto &commandStream = commandQueue.getCS(4096u);
ExecutionEnvironment *executionEnvironment = platform()->peekExecutionEnvironment();

View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2024 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -270,7 +270,11 @@ HWTEST_F(DispatchFlagsTests, givenCommandMapUnmapWhenSubmitThenPassCorrectDispat
EXPECT_TRUE(mockCsr->passedDispatchFlags.blocking);
EXPECT_TRUE(mockCsr->passedDispatchFlags.dcFlush);
EXPECT_FALSE(mockCsr->passedDispatchFlags.useSLM);
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
if (mockCsr->isUpdateTagFromWaitEnabled()) {
EXPECT_FALSE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
} else {
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
}
EXPECT_FALSE(mockCsr->passedDispatchFlags.gsba32BitRequired);
EXPECT_EQ(mockCmdQ->getPriority() == QueuePriority::low, mockCsr->passedDispatchFlags.lowPriority);
EXPECT_FALSE(mockCsr->passedDispatchFlags.implicitFlush);
@@ -313,7 +317,11 @@ HWTEST_F(DispatchFlagsTests, givenCommandComputeKernelWhenSubmitThenPassCorrectD
EXPECT_TRUE(mockCsr->passedDispatchFlags.blocking);
EXPECT_EQ(flushDC, mockCsr->passedDispatchFlags.dcFlush);
EXPECT_EQ(slmUsed, mockCsr->passedDispatchFlags.useSLM);
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
if (mockCsr->isUpdateTagFromWaitEnabled()) {
EXPECT_FALSE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
} else {
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
}
EXPECT_EQ(ndRangeKernel, mockCsr->passedDispatchFlags.gsba32BitRequired);
EXPECT_EQ(mockCmdQ->getPriority() == QueuePriority::low, mockCsr->passedDispatchFlags.lowPriority);
EXPECT_FALSE(mockCsr->passedDispatchFlags.implicitFlush);
@@ -357,7 +365,12 @@ HWTEST_F(DispatchFlagsTests, givenClCommandCopyImageWhenSubmitThenFlushTextureCa
EXPECT_EQ(flushDC, mockCsr->passedDispatchFlags.dcFlush);
EXPECT_EQ(mockCmdQ->isTextureCacheFlushNeeded(commandType), mockCsr->passedDispatchFlags.textureCacheFlush);
EXPECT_EQ(slmUsed, mockCsr->passedDispatchFlags.useSLM);
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
if (mockCsr->isUpdateTagFromWaitEnabled()) {
EXPECT_FALSE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
} else {
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
}
EXPECT_FALSE(mockCsr->passedDispatchFlags.gsba32BitRequired);
EXPECT_EQ(mockCmdQ->getPriority() == QueuePriority::low, mockCsr->passedDispatchFlags.lowPriority);
EXPECT_FALSE(mockCsr->passedDispatchFlags.implicitFlush);
@@ -396,7 +409,11 @@ HWTEST_F(DispatchFlagsTests, givenCommandWithoutKernelWhenSubmitThenPassCorrectD
EXPECT_TRUE(mockCsr->passedDispatchFlags.blocking);
EXPECT_FALSE(mockCsr->passedDispatchFlags.dcFlush);
EXPECT_FALSE(mockCsr->passedDispatchFlags.useSLM);
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
if (mockCsr->isUpdateTagFromWaitEnabled()) {
EXPECT_FALSE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
} else {
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
}
EXPECT_FALSE(mockCsr->passedDispatchFlags.gsba32BitRequired);
EXPECT_EQ(mockCmdQ->getPriority() == QueuePriority::low, mockCsr->passedDispatchFlags.lowPriority);
EXPECT_FALSE(mockCsr->passedDispatchFlags.implicitFlush);

View File

@@ -415,7 +415,8 @@ HWTEST_F(TimestampPacketTests, givenTimestampPacketWriteEnabledWhenEnqueueingThe
}
HWTEST_F(TimestampPacketTests, givenTimestampPacketWriteEnabledWhenEnqueueingThenWriteWalkerStamp) {
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
using WalkerVariant = typename FamilyType::WalkerVariant;
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
@@ -1384,7 +1385,11 @@ HWTEST_F(TimestampPacketTests, givenTimestampPacketWriteEnabledWhenEnqueueingBlo
EXPECT_EQ(0u, csrSemaphores.size());
EXPECT_TRUE(mockCsr->passedDispatchFlags.blocking);
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
if (mockCsr->isUpdateTagFromWaitEnabled()) {
EXPECT_FALSE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
} else {
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
}
EXPECT_EQ(device->getPreemptionMode(), mockCsr->passedDispatchFlags.preemptionMode);
cmdQ2->release();

View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2024 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -678,7 +678,11 @@ HWTEST_F(TimestampPacketTests, givenBlockedEnqueueWithoutKernelWhenSubmittingThe
EXPECT_EQ(0u, csrSemaphores.size());
EXPECT_TRUE(mockCsr->passedDispatchFlags.blocking);
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
if (mockCsr->isUpdateTagFromWaitEnabled()) {
EXPECT_FALSE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
} else {
EXPECT_TRUE(mockCsr->passedDispatchFlags.guardCommandBufferWithPipeControl);
}
EXPECT_EQ(device->getPreemptionMode(), mockCsr->passedDispatchFlags.preemptionMode);
cmdQ0->isQueueBlocked();

View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2024 Intel Corporation
* Copyright (C) 2018-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -1107,6 +1107,9 @@ HWTEST_F(ProfilingWithPerfCountersTests, GivenCommandQueueWithProfilingPerfCount
typedef typename FamilyType::PIPE_CONTROL PIPE_CONTROL;
typedef typename FamilyType::MI_REPORT_PERF_COUNT MI_REPORT_PERF_COUNT;
DebugManagerStateRestore restorer{};
debugManager.flags.ForceL3FlushAfterPostSync.set(0);
pCmdQ->setPerfCountersEnabled();
size_t globalOffsets[3] = {0, 0, 0};