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https://github.com/intel/compute-runtime.git
synced 2026-01-04 15:53:45 +08:00
fix: make misaligned user memory 2-Way coherent
Related-To: NEO-9004 Signed-off-by: Szymon Morek <szymon.morek@intel.com>
This commit is contained in:
committed by
Compute-Runtime-Automation
parent
52ad8f44c8
commit
bb10290828
@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2024 Intel Corporation
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* Copyright (C) 2018-2025 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -48,6 +48,10 @@ uint32_t MockGmmClientContextBase::cachePolicyGetPATIndex(GMM_RESOURCE_INFO *gmm
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return MockPatIndex::uncached;
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}
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if (usage == GMM_RESOURCE_USAGE_HW_CONTEXT) {
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return MockPatIndex::TwoWayCoherent;
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}
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return MockPatIndex::cached;
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2024 Intel Corporation
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* Copyright (C) 2018-2025 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -14,6 +14,7 @@ class MockGmmClientContextBase : public GmmClientContext {
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struct MockPatIndex {
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static constexpr uint32_t uncached = 1;
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static constexpr uint32_t cached = 2;
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static constexpr uint32_t TwoWayCoherent = 3;
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static constexpr uint32_t error = GMM_PAT_ERROR;
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};
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@@ -3803,10 +3803,7 @@ TEST_F(DrmMemoryManagerBasic, givenSpecificAddressSpaceWhenInitializingMemoryMan
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EXPECT_EQ(maxNBitValue(48 - 1), limit);
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}
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TEST_F(DrmMemoryManagerBasic, givenDisabledHostPtrTrackingWhenAllocateGraphicsMemoryForNonSvmHostPtrIsCalledWithNotAlignedPtrIsPassedThenAllocationIsCreated) {
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DebugManagerStateRestore restore;
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debugManager.flags.EnableHostPtrTracking.set(false);
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TEST_F(DrmMemoryManagerBasic, givenUnalignedHostPtrWhenAllocateGraphicsMemoryThenSetCorrectPatIndex) {
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AllocationData allocationData;
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std::unique_ptr<TestedDrmMemoryManager> memoryManager(new (std::nothrow) TestedDrmMemoryManager(false, false, false, executionEnvironment));
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@@ -3815,12 +3812,39 @@ TEST_F(DrmMemoryManagerBasic, givenDisabledHostPtrTrackingWhenAllocateGraphicsMe
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allocationData.size = 13;
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allocationData.hostPtr = reinterpret_cast<const void *>(0x5001);
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allocationData.rootDeviceIndex = rootDeviceIndex;
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auto allocation = memoryManager->allocateGraphicsMemoryForNonSvmHostPtr(allocationData);
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auto allocation = static_cast<DrmAllocation *>(memoryManager->allocateGraphicsMemoryForNonSvmHostPtr(allocationData));
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EXPECT_NE(nullptr, allocation);
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EXPECT_EQ(0x5001u, reinterpret_cast<uint64_t>(allocation->getUnderlyingBuffer()));
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EXPECT_EQ(13u, allocation->getUnderlyingBufferSize());
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EXPECT_EQ(1u, allocation->getAllocationOffset());
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auto &productHelper = executionEnvironment.rootDeviceEnvironments[0]->getHelper<ProductHelper>();
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if (productHelper.isMisalignedUserPtr2WayCoherent()) {
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EXPECT_EQ(MockGmmClientContextBase::MockPatIndex::TwoWayCoherent, allocation->getBO()->peekPatIndex());
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} else {
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EXPECT_EQ(MockGmmClientContextBase::MockPatIndex::cached, allocation->getBO()->peekPatIndex());
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}
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memoryManager->freeGraphicsMemory(allocation);
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}
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TEST_F(DrmMemoryManagerBasic, givenAlignedHostPtrWhenAllocateGraphicsMemoryThenSetCorrectPatIndex) {
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AllocationData allocationData;
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std::unique_ptr<TestedDrmMemoryManager> memoryManager(new (std::nothrow) TestedDrmMemoryManager(false, false, false, executionEnvironment));
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memoryManager->forceLimitedRangeAllocator(MemoryConstants::max48BitAddress);
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allocationData.size = MemoryConstants::cacheLineSize;
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allocationData.hostPtr = reinterpret_cast<const void *>(MemoryConstants::pageSize);
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allocationData.rootDeviceIndex = rootDeviceIndex;
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auto allocation = static_cast<DrmAllocation *>(memoryManager->allocateGraphicsMemoryForNonSvmHostPtr(allocationData));
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EXPECT_NE(nullptr, allocation);
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EXPECT_EQ(MemoryConstants::pageSize, reinterpret_cast<uint64_t>(allocation->getUnderlyingBuffer()));
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EXPECT_EQ(MemoryConstants::cacheLineSize, allocation->getUnderlyingBufferSize());
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EXPECT_EQ(0u, allocation->getAllocationOffset());
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EXPECT_EQ(MockGmmClientContextBase::MockPatIndex::cached, allocation->getBO()->peekPatIndex());
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memoryManager->freeGraphicsMemory(allocation);
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}
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@@ -1050,7 +1050,7 @@ TEST_F(WddmMemoryManagerSimpleTest, whenCreateAllocationFromHandleAndMapCallFail
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EXPECT_EQ(1u, memoryManager->freeGraphicsMemoryImplCalled);
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}
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TEST_F(WddmMemoryManagerSimpleTest, givenAllocateGraphicsMemoryForNonSvmHostPtrIsCalledWhenNotAlignedPtrIsPassedThenAlignedGraphicsAllocationIsCreated) {
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TEST_F(WddmMemoryManagerSimpleTest, givenAllocateGraphicsMemoryForNonSvmHostPtrIsCalledWhenNotAlignedPtrIsPassedThenAlignedGraphicsAllocationIsCreatedWithCorrectGmmResource) {
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memoryManager.reset(new MockWddmMemoryManager(false, false, executionEnvironment));
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auto size = 13u;
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auto hostPtr = reinterpret_cast<const void *>(0x10001);
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@@ -1063,6 +1063,14 @@ TEST_F(WddmMemoryManagerSimpleTest, givenAllocateGraphicsMemoryForNonSvmHostPtrI
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EXPECT_EQ(hostPtr, allocation->getUnderlyingBuffer());
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EXPECT_EQ(size, allocation->getUnderlyingBufferSize());
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EXPECT_EQ(1u, allocation->getAllocationOffset());
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const auto &productHelper = rootDeviceEnvironment->getHelper<ProductHelper>();
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auto expectedUsage = GMM_RESOURCE_USAGE_OCL_SYSTEM_MEMORY_BUFFER;
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if (productHelper.isMisalignedUserPtr2WayCoherent()) {
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expectedUsage = GMM_RESOURCE_USAGE_HW_CONTEXT;
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}
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EXPECT_EQ(expectedUsage, allocation->getGmm(0)->resourceParams.Usage);
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memoryManager->freeGraphicsMemory(allocation);
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2024 Intel Corporation
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* Copyright (C) 2018-2025 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -62,6 +62,8 @@ struct SkuInfoBaseReference {
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refWaTable.WaAuxTable16KGranular = 1;
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refWaTable.WaAuxTable64KGranular = 1;
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refWaTable.Wa_15010089951 = 1;
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refWaTable.Wa_14018976079 = 1;
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refWaTable.Wa_14018984349 = 1;
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}
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static void fillReferenceFtrToReceive(FeatureTable &refFtrTable) {
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@@ -149,6 +151,8 @@ struct SkuInfoBaseReference {
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refWaTable.flags.waDisableFusedThreadScheduling = true;
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refWaTable.flags.waAuxTable64KGranular = true;
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refWaTable.flags.wa_15010089951 = true;
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refWaTable.flags.wa_14018976079 = true;
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refWaTable.flags.wa_14018984349 = true;
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}
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}; // namespace SkuInfoBaseReference
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} // namespace NEO
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