Add cross regular and intermediate command lists base address state transitions

- updates coming from regular list are updated in csr last sent variables
- all per context and per kernel transitions kept in single place
- state updates from intermediate to regular are set in csr properties
- global atomics support duplicates removed

Related-To: NEO-5055

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
This commit is contained in:
Zbigniew Zdanowicz
2023-02-02 18:57:24 +00:00
committed by Compute-Runtime-Automation
parent 140e59810f
commit bf2072c3ea
16 changed files with 363 additions and 337 deletions

View File

@@ -136,8 +136,6 @@ struct EncodeDispatchKernel {
static void adjustWalkOrder(WALKER_TYPE &walkerCmd, uint32_t requiredWorkGroupOrder, const RootDeviceEnvironment &rootDeviceEnvironment);
static constexpr bool shouldUpdateGlobalAtomics(bool &currentVal, bool refVal, bool updateCurrent);
static size_t getSizeRequiredDsh(const KernelDescriptor &kernelDescriptor, uint32_t iddCount);
static size_t getSizeRequiredSsh(const KernelInfo &kernelInfo);
inline static size_t additionalSizeRequiredDsh(uint32_t iddCount);