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performance: Limit tlb flush in state cache flush to wddm

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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
This commit is contained in:
Lukasz Jobczyk
2024-05-06 09:27:41 +00:00
committed by Compute-Runtime-Automation
parent 0a59a26a2c
commit c1004b77bf
9 changed files with 21 additions and 10 deletions
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shared/source/command_stream/command_stream_receiver_hw_base.inl
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@@ -1220,7 +1220,7 @@ SubmissionStatus CommandStreamReceiverHw<GfxFamily>::flushPipeControl(bool state
args.textureCacheInvalidationEnable = true;
args.renderTargetCacheFlushEnable = true;
args.stateCacheInvalidationEnable = true;
args.tlbInvalidation = true;
args.tlbInvalidation = this->isTlbFlushRequiredForStateCacheFlush();
}
auto dispatchSize = MemorySynchronizationCommands<GfxFamily>::getSizeForBarrierWithPostSyncOperation(peekRootDeviceEnvironment(), args.tlbInvalidation) + this->getCmdSizeForPrologue();