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refactor: enable 64b mi_atomic operands and add cmp/wr operation

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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
This commit is contained in:
Bartosz Dunajski
2024-03-27 16:03:11 +00:00
committed by Compute-Runtime-Automation
parent 3d9e95d177
commit c3546f9e62
10 changed files with 75 additions and 31 deletions
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8
shared/source/command_container/command_encoder.h
View File

@@ -451,8 +451,8 @@ struct EncodeAtomic {
DATA_SIZE dataSize,
uint32_t returnDataControl,
uint32_t csStall,
uint32_t operand1dword0,
uint32_t operand1dword1);
uint64_t operand1Data,
uint64_t operand2Data);
static void programMiAtomic(MI_ATOMIC *atomic,
uint64_t writeAddress,
@@ -460,8 +460,8 @@ struct EncodeAtomic {
DATA_SIZE dataSize,
uint32_t returnDataControl,
uint32_t csStall,
uint32_t operand1dword0,
uint32_t operand1dword1);
uint64_t operand1Data,
uint64_t operand2Data);
static void setMiAtomicAddress(MI_ATOMIC &atomic, uint64_t writeAddress);
};

22
shared/source/command_container/command_encoder.inl
View File

@@ -956,20 +956,24 @@ void EncodeAtomic<Family>::programMiAtomic(MI_ATOMIC *atomic,
DATA_SIZE dataSize,
uint32_t returnDataControl,
uint32_t csStall,
uint32_t operand1dword0,
uint32_t operand1dword1) {
uint64_t operand1Data,
uint64_t operand2Data) {
MI_ATOMIC cmd = Family::cmdInitAtomic;
cmd.setAtomicOpcode(opcode);
cmd.setDataSize(dataSize);
EncodeAtomic<Family>::setMiAtomicAddress(cmd, writeAddress);
cmd.setReturnDataControl(returnDataControl);
cmd.setCsStall(csStall);
if (opcode == ATOMIC_OPCODES::ATOMIC_4B_MOVE ||
opcode == ATOMIC_OPCODES::ATOMIC_8B_MOVE) {
if (opcode == ATOMIC_OPCODES::ATOMIC_4B_MOVE || opcode == ATOMIC_OPCODES::ATOMIC_8B_MOVE || opcode == ATOMIC_OPCODES::ATOMIC_8B_CMP_WR) {
cmd.setDwordLength(MI_ATOMIC::DWORD_LENGTH::DWORD_LENGTH_INLINE_DATA_1);
cmd.setInlineData(0x1);
cmd.setOperand1DataDword0(operand1dword0);
cmd.setOperand1DataDword1(operand1dword1);
cmd.setOperand1DataDword0(getLowPart(operand1Data));
cmd.setOperand1DataDword1(getHighPart(operand1Data));
cmd.setOperand2DataDword0(getLowPart(operand2Data));
cmd.setOperand2DataDword1(getHighPart(operand2Data));
}
*atomic = cmd;
@@ -982,10 +986,10 @@ void EncodeAtomic<Family>::programMiAtomic(LinearStream &commandStream,
DATA_SIZE dataSize,
uint32_t returnDataControl,
uint32_t csStall,
uint32_t operand1dword0,
uint32_t operand1dword1) {
uint64_t operand1Data,
uint64_t operand2Data) {
auto miAtomic = commandStream.getSpaceForCmd<MI_ATOMIC>();
EncodeAtomic<Family>::programMiAtomic(miAtomic, writeAddress, opcode, dataSize, returnDataControl, csStall, operand1dword0, operand1dword1);
EncodeAtomic<Family>::programMiAtomic(miAtomic, writeAddress, opcode, dataSize, returnDataControl, csStall, operand1Data, operand2Data);
}
template <typename Family>

3
shared/source/generated/gen11/hw_cmds_generated_gen11.inl
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2023 Intel Corporation
* Copyright (C) 2019-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -879,6 +879,7 @@ typedef struct tagMI_ATOMIC {
ATOMIC_8B_MOVE = 0x24,
ATOMIC_8B_INCREMENT = 0x25,
ATOMIC_8B_DECREMENT = 0x26,
ATOMIC_8B_CMP_WR = 0x2E,
} ATOMIC_OPCODES;
inline void init() {
memset(&TheStructure, 0, sizeof(TheStructure));

3
shared/source/generated/gen12lp/hw_cmds_generated_gen12lp.inl
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2023 Intel Corporation
* Copyright (C) 2019-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -915,6 +915,7 @@ typedef struct tagMI_ATOMIC {
ATOMIC_8B_MOVE = 0x24,
ATOMIC_8B_INCREMENT = 0x25,
ATOMIC_8B_DECREMENT = 0x26,
ATOMIC_8B_CMP_WR = 0x2E,
} ATOMIC_OPCODES;
inline void init() {
memset(&TheStructure, 0, sizeof(TheStructure));

3
shared/source/generated/gen8/hw_cmds_generated_gen8.inl
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2023 Intel Corporation
* Copyright (C) 2019-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -1015,6 +1015,7 @@ typedef struct tagMI_ATOMIC {
ATOMIC_8B_MOVE = 0x24,
ATOMIC_8B_INCREMENT = 0x25,
ATOMIC_8B_DECREMENT = 0x26,
ATOMIC_8B_CMP_WR = 0x2E,
} ATOMIC_OPCODES;
inline void init() {
memset(&TheStructure, 0, sizeof(TheStructure));

3
shared/source/generated/gen9/hw_cmds_generated_gen9.inl
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2023 Intel Corporation
* Copyright (C) 2019-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -1012,6 +1012,7 @@ typedef struct tagMI_ATOMIC {
ATOMIC_8B_MOVE = 0x24,
ATOMIC_8B_INCREMENT = 0x25,
ATOMIC_8B_DECREMENT = 0x26,
ATOMIC_8B_CMP_WR = 0x2E,
} ATOMIC_OPCODES;
inline void init() {
memset(&TheStructure, 0, sizeof(TheStructure));

3
shared/source/generated/xe_hpc_core/hw_cmds_generated_xe_hpc_core.inl
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
* Copyright (C) 2021-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -1094,6 +1094,7 @@ typedef struct tagMI_ATOMIC {
ATOMIC_8B_MOVE = 0x24,
ATOMIC_8B_INCREMENT = 0x25,
ATOMIC_8B_DECREMENT = 0x26,
ATOMIC_8B_CMP_WR = 0x2E,
} ATOMIC_OPCODES;
inline void init() {
memset(&TheStructure, 0, sizeof(TheStructure));

1
shared/source/generated/xe_hpg_core/hw_cmds_generated_xe_hpg_core.inl
View File

@@ -836,6 +836,7 @@ typedef struct tagMI_ATOMIC {
ATOMIC_8B_MOVE = 0x24,
ATOMIC_8B_INCREMENT = 0x25,
ATOMIC_8B_DECREMENT = 0x26,
ATOMIC_8B_CMP_WR = 0x2E,
} ATOMIC_OPCODES;
inline void init() {
memset(&TheStructure, 0, sizeof(TheStructure));

53
shared/test/unit_test/encoders/test_encode_atomic.cpp
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2020-2023 Intel Corporation
* Copyright (C) 2020-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -50,19 +50,27 @@ HWTEST_F(CommandEncodeAtomic, WhenProgrammingMiAtomicMoveOperationThenExpectInli
using DATA_SIZE = typename FamilyType::MI_ATOMIC::DATA_SIZE;
using DWORD_LENGTH = typename FamilyType::MI_ATOMIC::DWORD_LENGTH;
constexpr size_t bufferSize = 128u;
constexpr size_t bufferSize = sizeof(MI_ATOMIC) * 3;
uint8_t buffer[bufferSize];
uint64_t address = (static_cast<uint64_t>(3) << 32) + 0x123400;
LinearStream cmdbuffer(buffer, bufferSize);
constexpr uint32_t operand1DataLow = 0x10u;
constexpr uint32_t operand1DataHigh = 0x20u;
constexpr uint64_t operand1Data = (static_cast<uint64_t>(operand1DataHigh) << 32) | operand1DataLow;
constexpr uint32_t operand2DataLow = 0x1fu;
constexpr uint32_t operand2DataHigh = 0x2fu;
constexpr uint64_t operand2Data = (static_cast<uint64_t>(operand2DataHigh) << 32) | operand2DataLow;
EncodeAtomic<FamilyType>::programMiAtomic(cmdbuffer,
address,
ATOMIC_OPCODES::ATOMIC_4B_MOVE,
DATA_SIZE::DATA_SIZE_DWORD,
0x0u,
0x0u,
0x10u,
0x20u);
operand1Data,
operand2Data);
EncodeAtomic<FamilyType>::programMiAtomic(cmdbuffer,
address,
@@ -70,8 +78,17 @@ HWTEST_F(CommandEncodeAtomic, WhenProgrammingMiAtomicMoveOperationThenExpectInli
DATA_SIZE::DATA_SIZE_QWORD,
0x0u,
0x0u,
0x20u,
0x1fu);
operand1Data,
operand2Data);
EncodeAtomic<FamilyType>::programMiAtomic(cmdbuffer,
address,
ATOMIC_OPCODES::ATOMIC_8B_CMP_WR,
DATA_SIZE::DATA_SIZE_QWORD,
0x0u,
0x0u,
operand1Data,
operand2Data);
MI_ATOMIC *miAtomicCmd = reinterpret_cast<MI_ATOMIC *>(cmdbuffer.getCpuBase());
@@ -81,8 +98,10 @@ HWTEST_F(CommandEncodeAtomic, WhenProgrammingMiAtomicMoveOperationThenExpectInli
EXPECT_EQ(0x0u, miAtomicCmd->getReturnDataControl());
EXPECT_EQ(DWORD_LENGTH::DWORD_LENGTH_INLINE_DATA_1, miAtomicCmd->getDwordLength());
EXPECT_EQ(0x1u, miAtomicCmd->getInlineData());
EXPECT_EQ(0x10u, miAtomicCmd->getOperand1DataDword0());
EXPECT_EQ(0x20u, miAtomicCmd->getOperand1DataDword1());
EXPECT_EQ(operand1DataLow, miAtomicCmd->getOperand1DataDword0());
EXPECT_EQ(operand1DataHigh, miAtomicCmd->getOperand1DataDword1());
EXPECT_EQ(operand2DataLow, miAtomicCmd->getOperand2DataDword0());
EXPECT_EQ(operand2DataHigh, miAtomicCmd->getOperand2DataDword1());
miAtomicCmd++;
EXPECT_EQ(ATOMIC_OPCODES::ATOMIC_8B_MOVE, miAtomicCmd->getAtomicOpcode());
@@ -91,6 +110,20 @@ HWTEST_F(CommandEncodeAtomic, WhenProgrammingMiAtomicMoveOperationThenExpectInli
EXPECT_EQ(0x0u, miAtomicCmd->getReturnDataControl());
EXPECT_EQ(DWORD_LENGTH::DWORD_LENGTH_INLINE_DATA_1, miAtomicCmd->getDwordLength());
EXPECT_EQ(0x1u, miAtomicCmd->getInlineData());
EXPECT_EQ(0x20u, miAtomicCmd->getOperand1DataDword0());
EXPECT_EQ(0x1fu, miAtomicCmd->getOperand1DataDword1());
EXPECT_EQ(operand1DataLow, miAtomicCmd->getOperand1DataDword0());
EXPECT_EQ(operand1DataHigh, miAtomicCmd->getOperand1DataDword1());
EXPECT_EQ(operand2DataLow, miAtomicCmd->getOperand2DataDword0());
EXPECT_EQ(operand2DataHigh, miAtomicCmd->getOperand2DataDword1());
miAtomicCmd++;
EXPECT_EQ(ATOMIC_OPCODES::ATOMIC_8B_CMP_WR, miAtomicCmd->getAtomicOpcode());
EXPECT_EQ(DATA_SIZE::DATA_SIZE_QWORD, miAtomicCmd->getDataSize());
EXPECT_EQ(address, UnitTestHelper<FamilyType>::getAtomicMemoryAddress(*miAtomicCmd));
EXPECT_EQ(0x0u, miAtomicCmd->getReturnDataControl());
EXPECT_EQ(DWORD_LENGTH::DWORD_LENGTH_INLINE_DATA_1, miAtomicCmd->getDwordLength());
EXPECT_EQ(0x1u, miAtomicCmd->getInlineData());
EXPECT_EQ(operand1DataLow, miAtomicCmd->getOperand1DataDword0());
EXPECT_EQ(operand1DataHigh, miAtomicCmd->getOperand1DataDword1());
EXPECT_EQ(operand2DataLow, miAtomicCmd->getOperand2DataDword0());
EXPECT_EQ(operand2DataHigh, miAtomicCmd->getOperand2DataDword1());
}