intel/compute-runtime
1
0
Fork 0
mirror of https://github.com/intel/compute-runtime.git synced 2026-01-03 06:49:52 +08:00
Code Issues Packages Projects Releases Wiki Activity

Sysman: Add support to check whether resizable PCI BAR is enabled

Browse Source 
Related-To: LOCI-2414

Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
This commit is contained in:
Jitendra Sharma
2021-07-30 13:33:54 +00:00
committed by Compute-Runtime-Automation
parent 81609c7695
commit c54152bbbc
11 changed files with 168 additions and 117 deletions
Download Patch File Download Diff File Expand all files Collapse all files

82
level_zero/tools/source/sysman/pci/linux/os_pci_imp.cpp
View File

@@ -152,13 +152,12 @@ ze_result_t LinuxPciImp::initializeBarProperties(std::vector<zes_pci_bar_propert
return result;
}
// Parse PCIe configuration space to see if resizable Bar is supported
bool LinuxPciImp::resizableBarSupported() {
uint32_t LinuxPciImp::getRebarCapabilityPos() {
uint32_t pos = PCI_CFG_SPACE_SIZE;
uint32_t header = 0;
if (!configMemory) {
return false;
return 0;
}
// Minimum 8 bytes per capability. Hence maximum capabilities that
@@ -167,24 +166,89 @@ bool LinuxPciImp::resizableBarSupported() {
auto loopCount = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
header = getDwordFromConfig(pos);
if (!header) {
return false;
return 0;
}
while (loopCount-- > 0) {
if (PCI_EXT_CAP_ID(header) == PCI_EXT_CAP_ID_REBAR) {
return true;
return pos;
}
pos = PCI_EXT_CAP_NEXT(header);
if (pos < PCI_CFG_SPACE_SIZE) {
return false;
return 0;
}
header = getDwordFromConfig(pos);
}
return false;
return 0;
}
bool LinuxPciImp::resizableBarEnabled() {
return false;
// Parse PCIe configuration space to see if resizable Bar is supported
bool LinuxPciImp::resizableBarSupported() {
return (getRebarCapabilityPos() > 0);
}
bool LinuxPciImp::resizableBarEnabled(uint32_t barIndex) {
bool isBarResizable = false;
uint32_t capabilityRegister = 0, controlRegister = 0;
uint32_t nBars = 1;
auto rebarCapabilityPos = getRebarCapabilityPos();
// If resizable Bar is not supported then return false.
if (!rebarCapabilityPos) {
return false;
}
// As per PCI spec, resizable BAR's capability structure's 52 byte length could be represented as:
// --------------------------------------------------------------
// | byte offset | Description of register |
// -------------------------------------------------------------|
// | +000h | PCI Express Extended Capability Header |
// -------------------------------------------------------------|
// | +004h | Resizable BAR Capability Register (0) |
// -------------------------------------------------------------|
// | +008h | Resizable BAR Control Register (0) |
// -------------------------------------------------------------|
// | +00Ch | Resizable BAR Capability Register (1) |
// -------------------------------------------------------------|
// | +010h | Resizable BAR Control Register (1) |
// -------------------------------------------------------------|
// | +014h | --- |
// -------------------------------------------------------------|
// Only first Control register(at offset 008h, as shown above), could tell about number of resizable Bars
controlRegister = getDwordFromConfig(rebarCapabilityPos + PCI_REBAR_CTRL);
nBars = BITS(controlRegister, 5, 3); // control register's bits 5,6 and 7 contain number of resizable bars information
for (auto barNumber = 0u; barNumber < nBars; barNumber++) {
uint32_t barId = 0;
controlRegister = getDwordFromConfig(rebarCapabilityPos + PCI_REBAR_CTRL);
barId = BITS(controlRegister, 0, 3); // Control register's bit 0,1,2 tells the index of bar
if (barId == barIndex) {
isBarResizable = true;
break;
}
rebarCapabilityPos += 8;
}
if (isBarResizable == false) {
return false;
}
capabilityRegister = getDwordFromConfig(rebarCapabilityPos + PCI_REBAR_CAP);
// Capability register's bit 4 to 31 indicates supported Bar sizes.
// In possibleBarSizes, position of each set bit indicates supported bar size. Example, if set bit
// position of possibleBarSizes is from 0 to n, then this indicates BAR size from 2^0 MB to 2^n MB
auto possibleBarSizes = (capabilityRegister & PCI_REBAR_CAP_SIZES) >> 4; // First 4 bits are reserved
uint32_t largestPossibleBarSize = 0;
while (possibleBarSizes >>= 1) { // most significant set bit position of possibleBarSizes would tell larget possible bar size
largestPossibleBarSize++;
}
// Control register's bit 8 to 13 indicates current BAR size in encoded form.
// Example, real value of current size could be 2^currentSize MB
auto currentSize = BITS(controlRegister, 8, 6);
// If current size is equal to larget possible BAR size, it indicates resizable BAR is enabled.
return (currentSize == largestPossibleBarSize);
}
ze_result_t LinuxPciImp::getState(zes_pci_state_t *state) {

3
level_zero/tools/source/sysman/pci/linux/os_pci_imp.h
View File

@@ -25,7 +25,7 @@ class LinuxPciImp : public OsPci, NEO::NonCopyableOrMovableClass {
ze_result_t getState(zes_pci_state_t *state) override;
ze_result_t getProperties(zes_pci_properties_t *properties) override;
bool resizableBarSupported() override;
bool resizableBarEnabled() override;
bool resizableBarEnabled(uint32_t barIndex) override;
ze_result_t initializeBarProperties(std::vector<zes_pci_bar_properties_t *> &pBarProperties) override;
LinuxPciImp() = default;
LinuxPciImp(OsSysman *pOsSysman);
@@ -51,6 +51,7 @@ class LinuxPciImp : public OsPci, NEO::NonCopyableOrMovableClass {
return configMemory[pos] | (configMemory[pos + 1] << 8) |
(configMemory[pos + 2] << 16) | (configMemory[pos + 3] << 24);
}
uint32_t getRebarCapabilityPos();
};
} // namespace L0

2
level_zero/tools/source/sysman/pci/os_pci.h
View File

@@ -25,7 +25,7 @@ class OsPci {
virtual ze_result_t getState(zes_pci_state_t *state) = 0;
virtual ze_result_t getProperties(zes_pci_properties_t *properties) = 0;
virtual bool resizableBarSupported() = 0;
virtual bool resizableBarEnabled() = 0;
virtual bool resizableBarEnabled(uint32_t barIndex) = 0;
virtual ze_result_t initializeBarProperties(std::vector<zes_pci_bar_properties_t *> &pBarProperties) = 0;
static OsPci *create(OsSysman *pOsSysman);
virtual ~OsPci() = default;

19
level_zero/tools/source/sysman/pci/pci_imp.cpp
View File

@@ -99,15 +99,17 @@ ze_result_t PciImp::pciGetInitializedBars(uint32_t *pCount, zes_pci_bar_properti
pProperties[i].size = pciBarProperties[i]->size;
pProperties[i].type = pciBarProperties[i]->type;
if (pProperties[i].pNext != nullptr && pProperties[i].stype == zes_structure_type_t::ZES_STRUCTURE_TYPE_PCI_BAR_PROPERTIES_1_2) {
if (pProperties[i].pNext != nullptr) {
zes_pci_bar_properties_1_2_t *pBarPropsExt = static_cast<zes_pci_bar_properties_1_2_t *>(pProperties[i].pNext);
// base, index, size and type are the same as the non 1.2 struct.
pBarPropsExt->base = pciBarProperties[i]->base;
pBarPropsExt->index = pciBarProperties[i]->index;
pBarPropsExt->size = pciBarProperties[i]->size;
pBarPropsExt->type = pciBarProperties[i]->type;
pBarPropsExt->resizableBarEnabled = static_cast<ze_bool_t>(resizableBarEnabled);
pBarPropsExt->resizableBarSupported = static_cast<ze_bool_t>(resizableBarSupported);
if (pBarPropsExt->stype == zes_structure_type_t::ZES_STRUCTURE_TYPE_PCI_BAR_PROPERTIES_1_2) {
// base, index, size and type are the same as the non 1.2 struct.
pBarPropsExt->base = pciBarProperties[i]->base;
pBarPropsExt->index = pciBarProperties[i]->index;
pBarPropsExt->size = pciBarProperties[i]->size;
pBarPropsExt->type = pciBarProperties[i]->type;
pBarPropsExt->resizableBarSupported = static_cast<ze_bool_t>(resizableBarSupported);
pBarPropsExt->resizableBarEnabled = static_cast<ze_bool_t>(pOsPci->resizableBarEnabled(pBarPropsExt->index));
}
}
}
}
@@ -120,7 +122,6 @@ ze_result_t PciImp::pciGetState(zes_pci_state_t *pState) {
void PciImp::pciGetStaticFields() {
pOsPci->getProperties(&pciProperties);
resizableBarEnabled = pOsPci->resizableBarEnabled();
resizableBarSupported = pOsPci->resizableBarSupported();
std::string bdf;
pOsPci->getPciBdf(bdf);

1
level_zero/tools/source/sysman/pci/pci_imp.h
View File

@@ -35,7 +35,6 @@ class PciImp : public Pci, NEO::NonCopyableOrMovableClass {
private:
OsSysman *pOsSysman = nullptr;
bool resizableBarSupported = false;
bool resizableBarEnabled = false;
zes_pci_properties_t pciProperties = {};
std::vector<zes_pci_bar_properties_t *> pciBarProperties = {};
};

2
level_zero/tools/source/sysman/pci/windows/os_pci_imp.cpp
View File

@@ -190,7 +190,7 @@ bool WddmPciImp::resizableBarSupported() {
return supported;
}
bool WddmPciImp::resizableBarEnabled() {
bool WddmPciImp::resizableBarEnabled(uint32_t barIndex) {
uint32_t valueSmall = 0;
bool enabled = false;
KmdSysman::RequestProperty request;

2
level_zero/tools/source/sysman/pci/windows/os_pci_imp.h
View File

@@ -21,7 +21,7 @@ class WddmPciImp : public OsPci, NEO::NonCopyableOrMovableClass {
ze_result_t getState(zes_pci_state_t *state) override;
ze_result_t getProperties(zes_pci_properties_t *properties) override;
bool resizableBarSupported() override;
bool resizableBarEnabled() override;
bool resizableBarEnabled(uint32_t barIndex) override;
ze_result_t initializeBarProperties(std::vector<zes_pci_bar_properties_t *> &pBarProperties) override;
WddmPciImp(OsSysman *pOsSysman);
WddmPciImp() = default;

3
level_zero/tools/source/sysman/sysman_const.h
View File

@@ -59,4 +59,5 @@ constexpr uint32_t microFacor = milliFactor * milliFactor;
constexpr uint64_t gigaUnitTransferToUnitTransfer = 1000 * 1000 * 1000;
constexpr int32_t memoryBusWidth = 128; // bus width in bits
constexpr int32_t numMemoryChannels = 8;
constexpr int32_t numMemoryChannels = 8;
#define BITS(x, at, width) (((x) >> (at)) & ((1 << (width)) - 1))