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Fix L3 and Math programming

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Change-Id: I4ffd729beeed95b0806dd284665c72fb424b0ffc
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
This commit is contained in:
Zbigniew Zdanowicz
2020-10-12 12:39:32 +02:00
committed by sys_ocldev
parent 483447238a
commit ca023fa532
13 changed files with 312 additions and 63 deletions
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4
shared/source/command_container/command_encoder.inl
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@@ -72,7 +72,7 @@ void EncodeMathMMIO<Family>::encodeMulRegVal(CommandContainer &container, uint32
}
EncodeSetMMIO<Family>::encodeREG(container, CS_GPR_R0, offset);
EncodeSetMMIO<Family>::encodeIMM(container, CS_GPR_R1, 0, false);
EncodeSetMMIO<Family>::encodeIMM(container, CS_GPR_R1, 0, true);
i = 0;
while (i < logLws) {
@@ -100,7 +100,7 @@ void EncodeMathMMIO<Family>::encodeMulRegVal(CommandContainer &container, uint32
template <typename Family>
void EncodeMathMMIO<Family>::encodeGreaterThanPredicate(CommandContainer &container, uint64_t firstOperand, uint32_t secondOperand) {
EncodeSetMMIO<Family>::encodeMEM(container, CS_GPR_R0, firstOperand);
EncodeSetMMIO<Family>::encodeIMM(container, CS_GPR_R1, secondOperand, false);
EncodeSetMMIO<Family>::encodeIMM(container, CS_GPR_R1, secondOperand, true);
/* CS_GPR_R* registers map to AluRegisters::R_* registers */
EncodeMath<Family>::greaterThan(container, AluRegisters::R_0,