Fix L3 and Math programming

Change-Id: I4ffd729beeed95b0806dd284665c72fb424b0ffc
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
This commit is contained in:
Zbigniew Zdanowicz
2020-10-12 12:39:32 +02:00
committed by sys_ocldev
parent 483447238a
commit ca023fa532
13 changed files with 312 additions and 63 deletions

View File

@@ -10,7 +10,6 @@ if(TESTS_GEN12LP)
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/simd_helper_tests_gen12lp.cpp
${CMAKE_CURRENT_SOURCE_DIR}/test_preamble_gen12lp.cpp
${CMAKE_CURRENT_SOURCE_DIR}/test_command_encoder_gen12lp.cpp
)
set_property(GLOBAL PROPERTY NEO_CORE_TESTS_GEN12LP ${NEO_CORE_TESTS_GEN12LP})
add_subdirectories()
@@ -19,6 +18,8 @@ if(TESTS_GEN12LP)
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_tests_gen12lp.cpp
${CMAKE_CURRENT_SOURCE_DIR}/image_surface_state_tests_gen12lp.cpp
${CMAKE_CURRENT_SOURCE_DIR}/test_command_encoder_gen12lp.cpp
${CMAKE_CURRENT_SOURCE_DIR}/test_encode_math_gen12lp.cpp
${CMAKE_CURRENT_SOURCE_DIR}/test_preemption_gen12lp.cpp
${COMPUTE_RUNTIME_ULT_GEN12LP}
${NEO_SOURCE_DIR}/opencl/test/unit_test/gen12lp/special_ult_helper_gen12lp.cpp

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@@ -10,15 +10,15 @@
#include "shared/source/helpers/preamble.h"
#include "shared/source/os_interface/os_context.h"
#include "shared/test/unit_test/cmd_parse/gen_cmd_parse.h"
#include "shared/test/unit_test/fixtures/device_fixture.h"
#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
#include "test.h"
#include "reg_configs_common.h"
using namespace NEO;
using CommandEncoderTest = Test<ClDeviceFixture>;
using CommandEncoderTest = Test<DeviceFixture>;
GEN12LPTEST_F(CommandEncoderTest, givenAdjustStateComputeModeStateComputeModeShowsNonCoherencySet) {
using STATE_COMPUTE_MODE = typename FamilyType::STATE_COMPUTE_MODE;
@@ -49,7 +49,7 @@ GEN12LPTEST_F(CommandEncoderTest, givenAdjustStateComputeModeStateComputeModeSho
EXPECT_TRUE(memcmp(&expectedScmCmd, scmCmd, sizeof(STATE_COMPUTE_MODE)) == 0);
}
GEN12LPTEST_F(CommandEncoderTest, givenCommandContainerWhenEncodeL3StateThenSetCorrectMMIO) {
GEN12LPTEST_F(CommandEncoderTest, givenCommandContainerWhenEncodeL3StateThenDoNotDispatchMMIOCommand) {
CommandContainer cmdContainer;
cmdContainer.initialize(pDevice);
EncodeL3State<FamilyType>::encode(cmdContainer, false);
@@ -59,10 +59,7 @@ GEN12LPTEST_F(CommandEncoderTest, givenCommandContainerWhenEncodeL3StateThenSetC
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
auto itorLRI = find<MI_LOAD_REGISTER_IMM *>(commands.begin(), commands.end());
ASSERT_NE(itorLRI, commands.end());
auto cmd = genCmdCast<MI_LOAD_REGISTER_IMM *>(*itorLRI);
EXPECT_EQ(cmd->getRegisterOffset(), 0xB134u);
EXPECT_EQ(cmd->getDataDword(), 0xD0000020u);
EXPECT_EQ(itorLRI, commands.end());
}
struct MockOsContext : public OsContext {
@@ -117,3 +114,32 @@ GEN12LPTEST_F(CommandEncoderTest, givenVariousEngineTypesWhenEstimateCommandBuff
EXPECT_EQ(expectedDiff, diff);
}
GEN12LPTEST_F(CommandEncoderTest, GivenGen12LpWhenProgrammingL3StateOnThenExpectNoCommandsDispatched) {
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
CommandContainer cmdContainer;
cmdContainer.initialize(pDevice);
EncodeL3State<FamilyType>::encode(cmdContainer, true);
GenCmdList commands;
CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed());
auto itorLRI = find<MI_LOAD_REGISTER_IMM *>(commands.begin(), commands.end());
EXPECT_EQ(itorLRI, commands.end());
}
GEN12LPTEST_F(CommandEncoderTest, GivenGen12LpWhenProgrammingL3StateOffThenExpectNoCommandsDispatched) {
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
CommandContainer cmdContainer;
cmdContainer.initialize(pDevice);
EncodeL3State<FamilyType>::encode(cmdContainer, false);
GenCmdList commands;
CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed());
auto itorLRI = find<MI_LOAD_REGISTER_IMM *>(commands.begin(), commands.end());
EXPECT_EQ(itorLRI, commands.end());
}

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@@ -0,0 +1,67 @@
/*
* Copyright (C) 2020 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/command_container/command_encoder.h"
#include "shared/source/helpers/register_offsets.h"
#include "shared/test/unit_test/cmd_parse/gen_cmd_parse.h"
#include "shared/test/unit_test/fixtures/device_fixture.h"
#include "test.h"
using namespace NEO;
using CommandEncoderMathTestGen12Lp = Test<DeviceFixture>;
GEN12LPTEST_F(CommandEncoderMathTestGen12Lp, WhenAppendsAGreaterThanThenPredicateCorrectlySetAndRemapEnabled) {
using MI_LOAD_REGISTER_MEM = typename FamilyType::MI_LOAD_REGISTER_MEM;
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
using MI_LOAD_REGISTER_REG = typename FamilyType::MI_LOAD_REGISTER_REG;
using MI_MATH = typename FamilyType::MI_MATH;
using MI_MATH_ALU_INST_INLINE = typename FamilyType::MI_MATH_ALU_INST_INLINE;
CommandContainer cmdContainer;
cmdContainer.initialize(pDevice);
EncodeMathMMIO<FamilyType>::encodeGreaterThanPredicate(cmdContainer, 0xDEADBEEFCAF0u, 17u);
GenCmdList commands;
CmdParse<FamilyType>::parseCommandBuffer(commands, ptrOffset(cmdContainer.getCommandStream()->getCpuBase(), 0), cmdContainer.getCommandStream()->getUsed());
auto itor = commands.begin();
itor = find<MI_LOAD_REGISTER_MEM *>(itor, commands.end());
ASSERT_NE(itor, commands.end());
auto cmdMEM = genCmdCast<MI_LOAD_REGISTER_MEM *>(*itor);
EXPECT_EQ(CS_GPR_R0, cmdMEM->getRegisterAddress());
EXPECT_EQ(0xDEADBEEFCAF0u, cmdMEM->getMemoryAddress());
itor = find<MI_LOAD_REGISTER_IMM *>(itor, commands.end());
ASSERT_NE(itor, commands.end());
auto cmdIMM = genCmdCast<MI_LOAD_REGISTER_IMM *>(*itor);
EXPECT_EQ(CS_GPR_R1, cmdIMM->getRegisterOffset());
EXPECT_EQ(17u, cmdIMM->getDataDword());
EXPECT_TRUE(cmdIMM->getMmioRemapEnable());
itor = find<MI_MATH *>(itor, commands.end());
ASSERT_NE(itor, commands.end());
auto cmdMATH = genCmdCast<MI_MATH *>(*itor);
EXPECT_EQ(cmdMATH->DW0.BitField.DwordLength, 3u);
itor = find<MI_LOAD_REGISTER_REG *>(itor, commands.end());
ASSERT_NE(itor, commands.end());
auto cmdREG = genCmdCast<MI_LOAD_REGISTER_REG *>(*itor);
EXPECT_EQ(cmdREG->getSourceRegisterAddress(), CS_GPR_R2);
EXPECT_EQ(cmdREG->getDestinationRegisterAddress(), CS_PREDICATE_RESULT);
auto cmdALU = reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(cmdMATH + 3);
EXPECT_EQ(cmdALU->DW0.BitField.ALUOpcode,
static_cast<uint32_t>(AluRegisters::OPCODE_SUB));
}