Add support of GPU preemption (v1.00).

https://github.com/intel/compute-runtime/pull/119

Change-Id: I3134d62b66751c8621b80002373a7a9b198e044e
This commit is contained in:
Liwei Wang
2019-03-21 22:21:52 -07:00
committed by ocldev
parent 1ce597a5c7
commit ca4b47f7f4
17 changed files with 80 additions and 56 deletions

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@@ -640,6 +640,7 @@ CompletionStamp CommandQueueHw<GfxFamily>::enqueueNonBlocked(
gtpinNotifyPreFlushTask(this);
}
printDebugString(DebugManager.flags.PrintDebugMessages.get(), stdout, "preemption = %d.\n", static_cast<int>(dispatchFlags.preemptionMode));
CompletionStamp completionStamp = getCommandStreamReceiver().flushTask(
commandStream,
commandStreamStart,

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@@ -70,8 +70,9 @@ PreemptionMode PreemptionHelper::taskPreemptionMode(Device &device, const MultiD
if (devMode > taskMode) {
devMode = taskMode;
}
printDebugString(DebugManager.flags.PrintDebugMessages.get(), stdout, "devMode = %d, taskMode = %d.\n",
static_cast<int>(device.getPreemptionMode()), static_cast<int>(taskMode));
}
return devMode;
}

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@@ -26,14 +26,12 @@ int HwInfoConfigHw<IGFX_BROXTON>::configureHardwareCustom(HardwareInfo *hwInfo,
pSysInfo->VEBoxInfo.IsValid = true;
pSkuTable->ftrVEBOX = true;
pSkuTable->ftrULT = true;
pSkuTable->ftrGpGpuMidBatchPreempt = true;
pSkuTable->ftrGpGpuThreadGroupLevelPreempt = true;
pSkuTable->ftrGpGpuMidThreadLevelPreempt = false;
pSkuTable->ftrGpGpuMidThreadLevelPreempt = true;
pSkuTable->ftr3dMidBatchPreempt = true;
pSkuTable->ftr3dObjectLevelPreempt = true;
pSkuTable->ftrPerCtxtPreemptionGranularityControl = true;
pSkuTable->ftrLCIA = true;
pSkuTable->ftrPPGTT = true;
pSkuTable->ftrL3IACoherency = true;

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@@ -26,14 +26,12 @@ int HwInfoConfigHw<IGFX_KABYLAKE>::configureHardwareCustom(HardwareInfo *hwInfo,
pSysInfo->VEBoxInfo.Instances.Bits.VEBox0Enabled = 1;
pSysInfo->VEBoxInfo.IsValid = true;
pSkuTable->ftrVEBOX = true;
pSkuTable->ftrGpGpuMidBatchPreempt = true;
pSkuTable->ftrGpGpuThreadGroupLevelPreempt = true;
pSkuTable->ftrGpGpuMidThreadLevelPreempt = false;
pSkuTable->ftrGpGpuMidThreadLevelPreempt = true;
pSkuTable->ftr3dMidBatchPreempt = true;
pSkuTable->ftr3dObjectLevelPreempt = true;
pSkuTable->ftrPerCtxtPreemptionGranularityControl = true;
pSkuTable->ftrPPGTT = true;
pSkuTable->ftrSVM = true;
pSkuTable->ftrL3IACoherency = true;

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@@ -27,14 +27,12 @@ int HwInfoConfigHw<IGFX_SKYLAKE>::configureHardwareCustom(HardwareInfo *hwInfo,
pSysInfo->VDBoxInfo.Instances.Bits.VDBox0Enabled = 1;
pSysInfo->VEBoxInfo.IsValid = true;
pSysInfo->VDBoxInfo.IsValid = true;
pSkuTable->ftrGpGpuMidBatchPreempt = true;
pSkuTable->ftrGpGpuThreadGroupLevelPreempt = true;
pSkuTable->ftrGpGpuMidThreadLevelPreempt = false;
pSkuTable->ftrGpGpuMidThreadLevelPreempt = true;
pSkuTable->ftr3dMidBatchPreempt = true;
pSkuTable->ftr3dObjectLevelPreempt = true;
pSkuTable->ftrPerCtxtPreemptionGranularityControl = true;
pSkuTable->ftrPPGTT = true;
pSkuTable->ftrSVM = true;
pSkuTable->ftrL3IACoherency = true;

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@@ -132,11 +132,9 @@ bool Drm::is48BitAddressRangeSupported() {
}
void Drm::checkPreemptionSupport() {
#if defined(I915_PARAM_HAS_PREEMPTION)
int value = 0;
auto ret = getParam(I915_PARAM_HAS_PREEMPTION, &value);
preemptionSupported = (ret == 0 && value == 1);
#endif
auto ret = getParamIoctl(I915_PARAM_HAS_SCHEDULER, &value);
preemptionSupported = ((0 == ret) && (value & I915_SCHEDULER_CAP_PREEMPTION));
}
void Drm::setLowPriorityContextParam(uint32_t drmContextId) {

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2017-2018 Intel Corporation
* Copyright (C) 2017-2019 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -10,7 +10,10 @@
typedef DeviceFactoryLinuxTest DeviceFactoryLinuxTestCnl;
GEN10TEST_F(DeviceFactoryLinuxTestCnl, queryWhitelistedPreemptionRegister) {
pDrm->StoredPreemptionSupport = 1;
pDrm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
HardwareInfo *hwInfo = nullptr;
size_t numDevices = 0;

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@@ -44,7 +44,7 @@ BXTTEST_F(HwInfoConfigTestLinuxBxt, configureHwInfo) {
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrULT);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrGpGpuMidBatchPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrGpGpuThreadGroupLevelPreempt);
EXPECT_EQ(0u, outHwInfo.pSkuTable->ftrGpGpuMidThreadLevelPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrGpGpuMidThreadLevelPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftr3dMidBatchPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftr3dObjectLevelPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrPerCtxtPreemptionGranularityControl);

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@@ -45,7 +45,7 @@ KBLTEST_F(HwInfoConfigTestLinuxKbl, configureHwInfo) {
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrVEBOX);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrGpGpuMidBatchPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrGpGpuThreadGroupLevelPreempt);
EXPECT_EQ(0u, outHwInfo.pSkuTable->ftrGpGpuMidThreadLevelPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrGpGpuMidThreadLevelPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftr3dMidBatchPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftr3dObjectLevelPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrPerCtxtPreemptionGranularityControl);

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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2017-2018 Intel Corporation
* Copyright (C) 2017-2019 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -10,7 +10,10 @@
typedef DeviceFactoryLinuxTest DeviceFactoryLinuxTestSkl;
GEN9TEST_F(DeviceFactoryLinuxTestSkl, queryWhitelistedPreemptionRegister) {
pDrm->StoredPreemptionSupport = 1;
pDrm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
HardwareInfo *hwInfo = nullptr;
size_t numDevices = 0;

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@@ -46,7 +46,7 @@ SKLTEST_F(HwInfoConfigTestLinuxSkl, configureHwInfo) {
EXPECT_TRUE(outHwInfo.pSysInfo->VDBoxInfo.IsValid);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrGpGpuMidBatchPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrGpGpuThreadGroupLevelPreempt);
EXPECT_EQ(0u, outHwInfo.pSkuTable->ftrGpGpuMidThreadLevelPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrGpGpuMidThreadLevelPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftr3dMidBatchPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftr3dObjectLevelPreempt);
EXPECT_EQ(1u, outHwInfo.pSkuTable->ftrPerCtxtPreemptionGranularityControl);

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@@ -268,20 +268,6 @@ TEST_F(DrmTests, givenKernelSupportingTurboPatchWhenDeviceIsCreatedThenSimplifie
EXPECT_FALSE(drm->getSimplifiedMocsTableUsage());
}
TEST_F(DrmTests, checkPreemption) {
auto drm = DrmWrap::createDrm(0);
EXPECT_NE(drm, nullptr);
drm->checkPreemptionSupport();
#if defined(I915_PARAM_HAS_PREEMPTION)
EXPECT_TRUE(drm->isPreemptionSupported());
#else
EXPECT_FALSE(drm->isPreemptionSupported());
#endif
DrmWrap::closeDevice(0);
drm = DrmWrap::get(0);
EXPECT_EQ(drm, nullptr);
}
TEST_F(DrmTests, failOnContextCreate) {
auto drm = DrmWrap::createDrm(0);
EXPECT_NE(drm, nullptr);

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@@ -17,7 +17,9 @@ int fakeFd = 1023;
int haveDri = 0; // index of dri to serve, -1 - none
int deviceId = OCLRT::deviceDescriptorTable[0].deviceId; // default supported DeviceID
int haveSoftPin = 1;
int havePreemption = 1;
int havePreemption = I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
int failOnDeviceId = 0;
int failOnRevisionId = 0;
int failOnSoftPin = 0;
@@ -64,8 +66,8 @@ int drmGetParam(drm_i915_getparam_t *param) {
*param->value = haveSoftPin;
ret = failOnSoftPin;
break;
#if defined(I915_PARAM_HAS_PREEMPTION)
case I915_PARAM_HAS_PREEMPTION:
#if defined(I915_PARAM_HAS_SCHEDULER)
case I915_PARAM_HAS_SCHEDULER:
*param->value = havePreemption;
ret = failOnPreemption;
break;
@@ -86,7 +88,7 @@ int drmSetContextParam(drm_i915_gem_context_param *param) {
case I915_CONTEXT_PRIVATE_PARAM_BOOST:
ret = failOnParamBoost;
break;
#if defined(I915_PARAM_HAS_PREEMPTION)
#if defined(I915_PARAM_HAS_SCHEDULER)
case I915_CONTEXT_PARAM_PRIORITY:
ret = failOnSetPriority;
break;
@@ -127,7 +129,6 @@ int ioctl(int fd, unsigned long int request, ...) throw() {
int res;
va_list vl;
va_start(vl, request);
if (fd == fakeFd) {
res = ioctlSeq[ioctlCnt % (sizeof(ioctlSeq) / sizeof(int))];
ioctlCnt++;

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@@ -36,6 +36,8 @@ extern int failOnSoftPin;
extern int failOnParamBoost;
extern int failOnContextCreate;
extern int failOnSetPriority;
extern int failOnPreemption;
extern int havePreemption;
extern int failOnDrmVersion;
extern char providedDrmVersion[5];
extern int ioctlSeq[8];

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@@ -107,12 +107,10 @@ class DrmMock : public Drm {
}
return this->StoredRetValForMinEUinPool;
}
#if defined(I915_PARAM_HAS_PREEMPTION)
if (gp->param == I915_PARAM_HAS_PREEMPTION) {
if (gp->param == I915_PARAM_HAS_SCHEDULER) {
*((int *)(gp->value)) = this->StoredPreemptionSupport;
return this->StoredRetVal;
}
#endif
if (gp->param == I915_PARAM_HAS_ALIASING_PPGTT) {
*((int *)(gp->value)) = this->StoredPPGTT;
return this->StoredRetVal;
@@ -224,10 +222,6 @@ class DrmMock : public Drm {
void setDeviceID(int deviceId) { this->deviceId = deviceId; }
void setDeviceRevID(int revisionId) { this->revisionId = revisionId; }
void checkPreemptionSupport() override {
preemptionSupported = StoredPreemptionSupport;
}
int StoredEUVal = -1;
int StoredSSVal = -1;
int StoredDeviceID = 1;
@@ -242,7 +236,10 @@ class DrmMock : public Drm {
int StoredRetValForPooledEU = 0;
int StoredRetValForMinEUinPool = 0;
int StoredPPGTT = 3;
int StoredPreemptionSupport = 0;
int StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
int StoredExecSoftPin = 0;
uint32_t StoredCtxId = 1;
uint32_t receivedDestroyContextId = 0;

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@@ -129,13 +129,30 @@ TEST(DrmTest, GivenDrmWhenAskedFor48BitAddressCorrectValueReturned) {
TEST(DrmTest, GivenDrmWhenAskedForPreemptionCorrectValueReturned) {
DrmMock *pDrm = new DrmMock;
pDrm->StoredPreemptionSupport = 1;
pDrm->StoredRetVal = 0;
pDrm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
pDrm->checkPreemptionSupport();
EXPECT_TRUE(pDrm->isPreemptionSupported());
pDrm->StoredPreemptionSupport = 0;
pDrm->checkPreemptionSupport();
EXPECT_FALSE(pDrm->isPreemptionSupported());
pDrm->StoredRetVal = -1;
pDrm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
pDrm->checkPreemptionSupport();
EXPECT_FALSE(pDrm->isPreemptionSupported());
pDrm->StoredPreemptionSupport = 0;
pDrm->checkPreemptionSupport();
EXPECT_FALSE(pDrm->isPreemptionSupported());
delete pDrm;
}

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@@ -247,7 +247,10 @@ TEST_F(HwInfoConfigTestLinuxDummy, dummyNegativeUnknownDeviceId) {
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledMidThreadOn) {
pInHwInfo->capabilityTable.defaultPreemptionMode = PreemptionMode::MidThread;
drm->StoredPreemptionSupport = 1;
drm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
drm->StoredDeviceID = hwConfigTestMidThreadBit;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
@@ -257,7 +260,10 @@ TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledMidThreadOn) {
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledThreadGroupOn) {
pInHwInfo->capabilityTable.defaultPreemptionMode = PreemptionMode::MidThread;
drm->StoredPreemptionSupport = 1;
drm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
drm->StoredDeviceID = hwConfigTestThreadGroupBit;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
@@ -267,7 +273,10 @@ TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledThreadGroupOn)
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledMidBatchOn) {
pInHwInfo->capabilityTable.defaultPreemptionMode = PreemptionMode::MidThread;
drm->StoredPreemptionSupport = 1;
drm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
drm->StoredDeviceID = hwConfigTestMidBatchBit;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
@@ -277,7 +286,10 @@ TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledMidBatchOn) {
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledNoPreemption) {
pInHwInfo->capabilityTable.defaultPreemptionMode = PreemptionMode::MidThread;
drm->StoredPreemptionSupport = 1;
drm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
drm->StoredDeviceID = 1;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
@@ -297,7 +309,10 @@ TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmDisabledAllPreemption
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledAllPreemptionDriverThreadGroup) {
pInHwInfo->capabilityTable.defaultPreemptionMode = PreemptionMode::ThreadGroup;
drm->StoredPreemptionSupport = 1;
drm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
drm->StoredDeviceID = hwConfigTestMidThreadBit | hwConfigTestThreadGroupBit | hwConfigTestMidBatchBit;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
@@ -307,7 +322,10 @@ TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledAllPreemptionD
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledAllPreemptionDriverMidBatch) {
pInHwInfo->capabilityTable.defaultPreemptionMode = PreemptionMode::MidBatch;
drm->StoredPreemptionSupport = 1;
drm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
drm->StoredDeviceID = hwConfigTestMidThreadBit | hwConfigTestThreadGroupBit | hwConfigTestMidBatchBit;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);
@@ -317,7 +335,10 @@ TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledAllPreemptionD
TEST_F(HwInfoConfigTestLinuxDummy, dummyConfigPreemptionDrmEnabledAllPreemptionDriverDisabled) {
pInHwInfo->capabilityTable.defaultPreemptionMode = PreemptionMode::Disabled;
drm->StoredPreemptionSupport = 1;
drm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
drm->StoredDeviceID = hwConfigTestMidThreadBit | hwConfigTestThreadGroupBit | hwConfigTestMidBatchBit;
int ret = hwConfig.configureHwInfo(pInHwInfo, &outHwInfo, osInterface);
EXPECT_EQ(0, ret);