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Change maxBlitWidth value

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Change-Id: I7c1ebc479392ad5039873e026aee90fd1332c01c
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
This commit is contained in:
Bartosz Dunajski
2020-07-23 11:28:40 +02:00
parent 493d1bfa3f
commit caba50046b
2 changed files with 2 additions and 2 deletions
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2
opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests.cpp
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@@ -1844,6 +1844,6 @@ TEST_F(ScratchSpaceControllerTest, whenScratchSpaceControllerIsDestroyedThenItRe
} }
TEST(BcsConstantsTests, givenBlitConstantsThenTheyHaveDesiredValues) { TEST(BcsConstantsTests, givenBlitConstantsThenTheyHaveDesiredValues) {
EXPECT_EQ(BlitterConstants::maxBlitWidth, 0x7FC0u); EXPECT_EQ(BlitterConstants::maxBlitWidth, 0x3FC0u);
EXPECT_EQ(BlitterConstants::maxBlitHeight, 0x3FC0u); EXPECT_EQ(BlitterConstants::maxBlitHeight, 0x3FC0u);
} }

2
shared/source/helpers/constants.h
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@@ -58,7 +58,7 @@ constexpr uint64_t MB = MemoryConstants::megaByte;
constexpr uint64_t GB = MemoryConstants::gigaByte; constexpr uint64_t GB = MemoryConstants::gigaByte;
namespace BlitterConstants { namespace BlitterConstants {
constexpr uint64_t maxBlitWidth = 0x7FC0; // 0x7FFF aligned to cacheline size constexpr uint64_t maxBlitWidth = 0x3FC0; // 0x4000 aligned to cacheline size
constexpr uint64_t maxBlitHeight = 0x3FC0; // 0x4000 aligned to cacheline size constexpr uint64_t maxBlitHeight = 0x3FC0; // 0x4000 aligned to cacheline size
constexpr uint64_t maxBlitSetWidth = 0x1FFC0; // 0x20000 aligned to cacheline size constexpr uint64_t maxBlitSetWidth = 0x1FFC0; // 0x20000 aligned to cacheline size
constexpr uint64_t maxBlitSetHeight = 0x1FFC0; // 0x20000 aligned to cacheline size constexpr uint64_t maxBlitSetHeight = 0x1FFC0; // 0x20000 aligned to cacheline size