Reuse common logic of programming SCM fields for gen 9 and gen 11

Logic related to programming non coherent and thread arbitration policy for
gens 9 and 11 has been moved to EncodeComputeMode object, where similar
logic for gens gen12lp and newer is located.

Functions PreambleHelper::programThreadArbitration and
PreambleHelper::getThreadArbitrationCommandsSize have been removed.

Redundant setForceNonCoherent call has been removed from XE HPG

Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
This commit is contained in:
Filip Hazubski
2022-03-08 14:18:31 +00:00
committed by Compute-Runtime-Automation
parent 5d90e2ab1d
commit cd95572443
31 changed files with 190 additions and 273 deletions

View File

@@ -9,6 +9,8 @@
#include "shared/source/gen11/hw_cmds_base.h"
#include "shared/source/gen11/reg_configs.h"
#include "reg_configs_common.h"
using Family = NEO::ICLFamily;
#include "shared/source/command_container/command_encoder.inl"
@@ -18,21 +20,6 @@ using Family = NEO::ICLFamily;
namespace NEO {
template <>
size_t EncodeComputeMode<Family>::getCmdSizeForComputeMode(const HardwareInfo &hwInfo, bool hasSharedHandles, bool isRcs) {
return sizeof(typename Family::MI_LOAD_REGISTER_IMM);
}
template <>
void EncodeComputeMode<Family>::programComputeModeCommandWithSynchronization(
LinearStream &csr, StateComputeModeProperties &properties, const PipelineSelectArgs &args,
bool hasSharedHandles, const HardwareInfo &hwInfo, bool isRcs) {
LriHelper<Family>::program(&csr,
gen11HdcModeRegister::address,
DwordBuilder::build(gen11HdcModeRegister::forceNonCoherentEnableBit, true, !properties.isCoherencyRequired.value),
false);
}
template <>
bool EncodeSurfaceState<Family>::doBindingTablePrefetch() {
return false;
@@ -53,6 +40,36 @@ void EncodeSurfaceState<Family>::setFlagsForMediaCompression(R_SURFACE_STATE *su
}
}
template <typename Family>
size_t EncodeComputeMode<Family>::getCmdSizeForComputeMode(const HardwareInfo &hwInfo, bool hasSharedHandles, bool isRcs) {
return sizeof(typename Family::PIPE_CONTROL) + 2u * sizeof(typename Family::MI_LOAD_REGISTER_IMM);
}
template <>
void EncodeComputeMode<Family>::programComputeModeCommand(LinearStream &csr, StateComputeModeProperties &properties,
const HardwareInfo &hwInfo) {
using PIPE_CONTROL = typename Family::PIPE_CONTROL;
if (properties.threadArbitrationPolicy.isDirty) {
auto pipeControl = csr.getSpaceForCmd<PIPE_CONTROL>();
PIPE_CONTROL cmd = Family::cmdInitPipeControl;
cmd.setCommandStreamerStallEnable(true);
*pipeControl = cmd;
LriHelper<Family>::program(&csr,
RowChickenReg4::address,
RowChickenReg4::regDataForArbitrationPolicy[properties.threadArbitrationPolicy.value],
false);
}
if (properties.isCoherencyRequired.isDirty) {
auto nonCoherentEnable = !properties.isCoherencyRequired.value;
LriHelper<Family>::program(&csr,
gen11HdcModeRegister::address,
DwordBuilder::build(gen11HdcModeRegister::forceNonCoherentEnableBit, true, nonCoherentEnable),
false);
}
}
template struct EncodeDispatchKernel<Family>;
template struct EncodeStates<Family>;
template struct EncodeMath<Family>;

View File

@@ -17,15 +17,6 @@ namespace NEO {
typedef ICLFamily Family;
static auto gfxCore = IGFX_GEN11_CORE;
template <>
void CommandStreamReceiverHw<Family>::programComputeMode(LinearStream &stream, DispatchFlags &dispatchFlags, const HardwareInfo &hwInfo) {
if (this->streamProperties.stateComputeMode.isCoherencyRequired.isDirty) {
EncodeComputeMode<Family>::programComputeModeCommandWithSynchronization(
stream, this->streamProperties.stateComputeMode, dispatchFlags.pipelineSelectArgs,
hasSharedHandles(), hwInfo, isRcs());
}
}
template <>
void CommandStreamReceiverHw<Family>::programMediaSampler(LinearStream &stream, DispatchFlags &dispatchFlags) {
using PWR_CLK_STATE_REGISTER = Family::PWR_CLK_STATE_REGISTER;

View File

@@ -63,26 +63,6 @@ void PreambleHelper<ICLFamily>::addPipeControlBeforeVfeCmd(LinearStream *pComman
*pipeControl = cmd;
}
template <>
void PreambleHelper<ICLFamily>::programThreadArbitration(LinearStream *pCommandStream, int32_t requiredThreadArbitrationPolicy) {
UNRECOVERABLE_IF(requiredThreadArbitrationPolicy == ThreadArbitrationPolicy::NotPresent);
auto pipeControl = pCommandStream->getSpaceForCmd<PIPE_CONTROL>();
PIPE_CONTROL cmd = ICLFamily::cmdInitPipeControl;
cmd.setCommandStreamerStallEnable(true);
*pipeControl = cmd;
LriHelper<ICLFamily>::program(pCommandStream,
RowChickenReg4::address,
RowChickenReg4::regDataForArbitrationPolicy[requiredThreadArbitrationPolicy],
false);
}
template <>
size_t PreambleHelper<ICLFamily>::getThreadArbitrationCommandsSize() {
return sizeof(MI_LOAD_REGISTER_IMM) + sizeof(PIPE_CONTROL);
}
template <>
std::vector<int32_t> PreambleHelper<ICLFamily>::getSupportedThreadArbitrationPolicies() {
std::vector<int32_t> retVal;