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https://github.com/intel/compute-runtime.git
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Reuse common logic of programming SCM fields for gen 9 and gen 11
Logic related to programming non coherent and thread arbitration policy for gens 9 and 11 has been moved to EncodeComputeMode object, where similar logic for gens gen12lp and newer is located. Functions PreambleHelper::programThreadArbitration and PreambleHelper::getThreadArbitrationCommandsSize have been removed. Redundant setForceNonCoherent call has been removed from XE HPG Related-To: NEO-6728 Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
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Compute-Runtime-Automation
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5d90e2ab1d
commit
cd95572443
@@ -9,6 +9,8 @@
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#include "shared/source/gen11/hw_cmds_base.h"
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#include "shared/source/gen11/reg_configs.h"
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#include "reg_configs_common.h"
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using Family = NEO::ICLFamily;
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#include "shared/source/command_container/command_encoder.inl"
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@@ -18,21 +20,6 @@ using Family = NEO::ICLFamily;
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namespace NEO {
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template <>
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size_t EncodeComputeMode<Family>::getCmdSizeForComputeMode(const HardwareInfo &hwInfo, bool hasSharedHandles, bool isRcs) {
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return sizeof(typename Family::MI_LOAD_REGISTER_IMM);
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}
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template <>
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void EncodeComputeMode<Family>::programComputeModeCommandWithSynchronization(
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LinearStream &csr, StateComputeModeProperties &properties, const PipelineSelectArgs &args,
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bool hasSharedHandles, const HardwareInfo &hwInfo, bool isRcs) {
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LriHelper<Family>::program(&csr,
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gen11HdcModeRegister::address,
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DwordBuilder::build(gen11HdcModeRegister::forceNonCoherentEnableBit, true, !properties.isCoherencyRequired.value),
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false);
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}
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template <>
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bool EncodeSurfaceState<Family>::doBindingTablePrefetch() {
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return false;
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@@ -53,6 +40,36 @@ void EncodeSurfaceState<Family>::setFlagsForMediaCompression(R_SURFACE_STATE *su
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}
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}
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template <typename Family>
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size_t EncodeComputeMode<Family>::getCmdSizeForComputeMode(const HardwareInfo &hwInfo, bool hasSharedHandles, bool isRcs) {
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return sizeof(typename Family::PIPE_CONTROL) + 2u * sizeof(typename Family::MI_LOAD_REGISTER_IMM);
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}
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template <>
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void EncodeComputeMode<Family>::programComputeModeCommand(LinearStream &csr, StateComputeModeProperties &properties,
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const HardwareInfo &hwInfo) {
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using PIPE_CONTROL = typename Family::PIPE_CONTROL;
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if (properties.threadArbitrationPolicy.isDirty) {
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auto pipeControl = csr.getSpaceForCmd<PIPE_CONTROL>();
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PIPE_CONTROL cmd = Family::cmdInitPipeControl;
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cmd.setCommandStreamerStallEnable(true);
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*pipeControl = cmd;
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LriHelper<Family>::program(&csr,
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RowChickenReg4::address,
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RowChickenReg4::regDataForArbitrationPolicy[properties.threadArbitrationPolicy.value],
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false);
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}
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if (properties.isCoherencyRequired.isDirty) {
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auto nonCoherentEnable = !properties.isCoherencyRequired.value;
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LriHelper<Family>::program(&csr,
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gen11HdcModeRegister::address,
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DwordBuilder::build(gen11HdcModeRegister::forceNonCoherentEnableBit, true, nonCoherentEnable),
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false);
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}
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}
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template struct EncodeDispatchKernel<Family>;
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template struct EncodeStates<Family>;
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template struct EncodeMath<Family>;
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@@ -17,15 +17,6 @@ namespace NEO {
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typedef ICLFamily Family;
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static auto gfxCore = IGFX_GEN11_CORE;
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template <>
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void CommandStreamReceiverHw<Family>::programComputeMode(LinearStream &stream, DispatchFlags &dispatchFlags, const HardwareInfo &hwInfo) {
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if (this->streamProperties.stateComputeMode.isCoherencyRequired.isDirty) {
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EncodeComputeMode<Family>::programComputeModeCommandWithSynchronization(
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stream, this->streamProperties.stateComputeMode, dispatchFlags.pipelineSelectArgs,
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hasSharedHandles(), hwInfo, isRcs());
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}
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}
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template <>
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void CommandStreamReceiverHw<Family>::programMediaSampler(LinearStream &stream, DispatchFlags &dispatchFlags) {
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using PWR_CLK_STATE_REGISTER = Family::PWR_CLK_STATE_REGISTER;
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@@ -63,26 +63,6 @@ void PreambleHelper<ICLFamily>::addPipeControlBeforeVfeCmd(LinearStream *pComman
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*pipeControl = cmd;
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}
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template <>
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void PreambleHelper<ICLFamily>::programThreadArbitration(LinearStream *pCommandStream, int32_t requiredThreadArbitrationPolicy) {
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UNRECOVERABLE_IF(requiredThreadArbitrationPolicy == ThreadArbitrationPolicy::NotPresent);
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auto pipeControl = pCommandStream->getSpaceForCmd<PIPE_CONTROL>();
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PIPE_CONTROL cmd = ICLFamily::cmdInitPipeControl;
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cmd.setCommandStreamerStallEnable(true);
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*pipeControl = cmd;
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LriHelper<ICLFamily>::program(pCommandStream,
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RowChickenReg4::address,
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RowChickenReg4::regDataForArbitrationPolicy[requiredThreadArbitrationPolicy],
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false);
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}
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template <>
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size_t PreambleHelper<ICLFamily>::getThreadArbitrationCommandsSize() {
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return sizeof(MI_LOAD_REGISTER_IMM) + sizeof(PIPE_CONTROL);
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}
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template <>
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std::vector<int32_t> PreambleHelper<ICLFamily>::getSupportedThreadArbitrationPolicies() {
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std::vector<int32_t> retVal;
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